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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?E4ikZ3MQh2YiaQ2QojirraUzV5Rh038ZkDtkodkuFX0hNW5rW6xltyZjRPqO?= =?us-ascii?Q?N4TCzynQ90tX2pfG/EA5Tp74iyylKCeGfKivMQDyyzdOB7F670EHb0G2V1l3?= =?us-ascii?Q?0JCLClVM0L3VaWFjukRAdvbEp/94dicf71nnp9oMgI6GDYUwhCt/R4jFLguc?= =?us-ascii?Q?w1XwtyT5yeHJKjDsAUmeKCcybzrMoQzlCxulZ6Vp/kEsQVWp+jV0OXXyKBpE?= =?us-ascii?Q?gIai1LUQUvp/UqTVzPtyKWr1tvBll+GOIvf/UM5+mOU2FYlmPBv8VccXUTbz?= =?us-ascii?Q?D67MoFNWPjHorNqd4eXDgrJArPoljtCRni9RRpPZPppR+dzXfSqlsb1vrwlr?= =?us-ascii?Q?e/IW+OsqDLczb/F35KWTX9Xw0ljFvVfwhCEyGh9hVEoN81qAVktV/eJHT91a?= =?us-ascii?Q?4qJ/2s0LXrs69ByMx4ZIpxTdwyxOZkB/Pm4+1vsg5PbTwavhMhRKMEkUTzaF?= =?us-ascii?Q?lqKEK+HpRekTLDEgR5rHzLjK0k50iAT32ZNF25V8DZxqH2A2K2varp9YAgHs?= =?us-ascii?Q?RITF7zlrno8WXeLQ1TDnW4xeMjTzd/Pt73I1ZzwiHL/GGS1iHD5b/3vqvvp7?= =?us-ascii?Q?c/zU4IX8xQb4E1WJYWqnQ9DQHybwTj/8JLpBXmduDC31y9C+9NYtgembgImK?= =?us-ascii?Q?7ZW7pwjAdChkA8n0pmkwvQ43AfumoqWe2Rk6y94Dl1paq9hsExFHjbjIzT+N?= =?us-ascii?Q?jy+N+1MeR1VyE2wtMZ+2Z8Q1+HiVKbFHRfpreg7j0fLa562f/2vBqvpjwQbN?= =?us-ascii?Q?XQVkff6KqgO/EXx67oVaTYPiwGgmEKP46or3ntd+qiMAyL3Dv7FaGpCxs+cZ?= =?us-ascii?Q?ZC/QSjHyixnxrv8cmNf1yP+1tzwCFiXu5mf1A5X+oPZceyTtG0HZ7Tma8lLZ?= =?us-ascii?Q?BjyS3ENnNg8/rW1pnWBYWYj+0Hf94xCtDlQ5c6zp/HkVT1A/DoIr4HzeNUv4?= =?us-ascii?Q?cC9Tp+0dZKPGIYPv+bjcjKDs9sFCVJVnM75upcH5jFsLIWMuNtnZTxK5AtGg?= =?us-ascii?Q?iUSd8vScnoOX881lAq2Xa2GSsA9FZrqHzxkUzRvHbPIPMDrF+q7gpqSdfscV?= =?us-ascii?Q?hob+c7M2J4B9GYXrvW/V7F7eTB8oILk44Fucb5c/Nu3C1vo4TR2vKvdp8ys5?= =?us-ascii?Q?uaWB420aNV43rDa9ZuvNnMOpguWCXG4Rv4u5LuraBZsN1atoZAWvgR1INa+5?= =?us-ascii?Q?89Ra0a78i+FC8WhMwELO00iJAvJSBOFPfJ+Q4nR9hMRyQATkkSB1ww99z8WD?= =?us-ascii?Q?y8uRr9eItZS1rwn5RRNtr1+Eggh03FfqqIcCiZJQrGA2dDBhQ+CJUiPx7WNf?= =?us-ascii?Q?8PUJtckGD6AjxeGyqDHzUFuZmnGKFn1wEtdCVWqnBQsmID59hLAl5qtZmYAt?= =?us-ascii?Q?nHzO57WgtMWtlAX0BNHdZahxQvHgWs1dJLERLuCBb6EgEPuYpXxbpi62mnZx?= =?us-ascii?Q?d2GL0/hNsc5TwXIxONFjybwcfRnsgU1lqZSh3uvFTMw0rVolO0ySkjKCD7qD?= =?us-ascii?Q?jZxphMtDJI4ASL6KfKMyd1DfpB/muaI/QE+MgtYhLJJNtxDSlzXI//W1t+zW?= =?us-ascii?Q?cxOtqSfX2m6zsAdN3PhTeRPGkYkM8X6atpWlsmTOXrSEVFbhnADb+oESOivL?= =?us-ascii?Q?PA=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: fc867ab2-bc05-4f42-7349-08dad4fff2e8 X-MS-Exchange-CrossTenant-AuthSource: MWHPR1101MB2126.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Dec 2022 07:28:18.4665 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: QHC+tbfusZ1pPTGbk+nsmT+yWFWm200jffjo7SyB7ELmIfoqJVhO0109WCV8AcE3yt47NvWU4+2UtdX0C7JO5FO8bBXjaG1qlwBSQTOx4Cg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR11MB5397 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Jonathan Cameron wrote: > On Thu, 01 Dec 2022 13:33:59 -0800 > Dan Williams wrote: > > > From: Robert Richter > > > > A port of a CXL host bridge links to the bridge's ACPI device > > (&adev->dev) with its corresponding uport/dport device (uport_dev and > > dport_dev respectively). The device is not a direct parent device in > > the PCI topology as pdev->dev.parent points to a PCI bridge's (struct > > pci_host_bridge) device. The following CXL memory device hierarchy > > would be valid for an endpoint once an RCD EP would be enabled (note > > this will be done in a later patch): > > > > VH mode: > > > > cxlmd->dev.parent->parent > > ^^^\^^^^^^\ ^^^^^^\ > > \ \ pci_dev (Type 1, Downstream Port) > > \ pci_dev (Type 0, PCI Express Endpoint) > > cxl mem device > > > > RCD mode: > > > > cxlmd->dev.parent->parent > > ^^^\^^^^^^\ ^^^^^^\ > > \ \ pci_host_bridge > > \ pci_dev (Type 0, RCiEP) > > cxl mem device > > > > In VH mode a downstream port is created by port enumeration and thus > > always exists. > > > > Now, in RCD mode the host bridge also already exists but it references > > to an ACPI device. A port lookup by the PCI device's parent device > > will fail as a direct link to the registered port is missing. The ACPI > > device of the bridge must be determined first. > > > > To prevent this, change port registration of a CXL host to use the > > bridge device instead. Do this also for the VH case as port topology > > will better reflect the PCI topology then. > > > > Signed-off-by: Robert Richter > > [djbw: rebase on brige mocking] > > Reviewed-by: Robert Richter > > Signed-off-by: Dan Williams > Trivial comment inline. Looks fine to me otherwise... > > Reviewed-by: Jonathan Cameron > > > > --- > > drivers/cxl/acpi.c | 35 +++++++++++++++++++---------------- > > 1 file changed, 19 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c > > index b8407b77aff6..50d82376097c 100644 > > --- a/drivers/cxl/acpi.c > > +++ b/drivers/cxl/acpi.c > > @@ -193,35 +193,34 @@ static int add_host_bridge_uport(struct device *match, void *arg) > > { > > struct cxl_port *root_port = arg; > > struct device *host = root_port->dev.parent; > > - struct acpi_device *bridge = to_cxl_host_bridge(host, match); > > + struct acpi_device *hb = to_cxl_host_bridge(host, match); > > struct acpi_pci_root *pci_root; > > struct cxl_dport *dport; > > struct cxl_port *port; > > + struct device *bridge; > > int rc; > > > > - if (!bridge) > > + if (!hb) > > return 0; > > > > - dport = cxl_find_dport_by_dev(root_port, match); > > + pci_root = acpi_pci_find_root(hb->handle); > > + bridge = pci_root->bus->bridge; > > + dport = cxl_find_dport_by_dev(root_port, bridge); > > if (!dport) { > > dev_dbg(host, "host bridge expected and not found\n"); > > return 0; > > } > > > > - /* > > - * Note that this lookup already succeeded in > > - * to_cxl_host_bridge(), so no need to check for failure here > > - */ > > - pci_root = acpi_pci_find_root(bridge->handle); > > - rc = devm_cxl_register_pci_bus(host, match, pci_root->bus); > > + rc = devm_cxl_register_pci_bus(host, bridge, pci_root->bus); > > if (rc) > > return rc; > > > > - port = devm_cxl_add_port(host, match, dport->component_reg_phys, dport); > > + port = devm_cxl_add_port(host, bridge, dport->component_reg_phys, > > + dport); > > if (IS_ERR(port)) > > return PTR_ERR(port); > > > > - dev_info(pci_root->bus->bridge, "host supports CXL\n"); > > + dev_info(bridge, "host supports CXL\n"); > > > > return 0; > > } > > @@ -253,18 +252,20 @@ static int cxl_get_chbcr(union acpi_subtable_headers *header, void *arg, > > static int add_host_bridge_dport(struct device *match, void *arg) > > { > > acpi_status status; > > + struct device *bridge; > > unsigned long long uid; > > struct cxl_dport *dport; > > struct cxl_chbs_context ctx; > > + struct acpi_pci_root *pci_root; > > struct cxl_port *root_port = arg; > > struct device *host = root_port->dev.parent; > > - struct acpi_device *bridge = to_cxl_host_bridge(host, match); > > + struct acpi_device *hb = to_cxl_host_bridge(host, match); > > > > - if (!bridge) > > + if (!hb) > > return 0; > > > > - status = acpi_evaluate_integer(bridge->handle, METHOD_NAME__UID, NULL, > > - &uid); > > + status = > > + acpi_evaluate_integer(hb->handle, METHOD_NAME__UID, NULL, &uid); > > Bit ugly. Maybe a good case for a slightly longer line! I just went ahead and shortened @status to @rc since there's no other usages in this function.