Linux CXL
 help / color / mirror / Atom feed
From: Dan Williams <dan.j.williams@intel.com>
To: "Verma, Vishal L" <vishal.l.verma@intel.com>,
	"Williams, Dan J" <dan.j.williams@intel.com>,
	"Schofield, Alison" <alison.schofield@intel.com>,
	"Jiang, Dave" <dave.jiang@intel.com>,
	"bwidawsk@kernel.org" <bwidawsk@kernel.org>,
	"Weiny, Ira" <ira.weiny@intel.com>
Cc: "linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
	"dave@stgolabs.net" <dave@stgolabs.net>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Weight, Russell H" <russell.h.weight@intel.com>
Subject: Re: [PATCH 3/4] cxl: add a firmware update mechanism using the sysfs firmware loader
Date: Wed, 31 May 2023 14:56:33 -0700	[thread overview]
Message-ID: <6477c29121ae3_168e29438@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <a7443a348b9c2b51cf141ad1131c9befbb09724e.camel@intel.com>

Verma, Vishal L wrote:
> On Mon, 2023-05-22 at 20:21 -0700, Dan Williams wrote:
> > Vishal Verma wrote:
> 
> <snip>
> Everything else not addressed here sounds good and I've made those
> changes.
> 
> > > 
> > > +       remaining = size - cur_size;
> > > +       size_in = cur_size + sizeof(*transfer);
> > > +
> > > +       mutex_lock(&cxlds->fw.fw_mutex);
> > 
> > What is this lock protecting? I.e. will the fw_loader really try to send
> > multiple overlapping firmware update attempts?
> 
> The lock is just to provide predictable points at which a cancel
> request may be intercepted. The loader won't try overlapping firmware
> transfer requests, but the ->cancel request comes from user space, and
> could happen while there is a transfer in progress. With the lock, the
> cancel will only be 'processed' after the current chunk's transfer is
> done. 

So right now cancel is only considered at certain points within either
the ->write() or ->poll_complete() callbacks. The firmware upload core
is guaranteeing that ->prepare(), ->write() and ->poll_complete() never
overlap for a given session, and that if any of those return an error
the upload session is terminated.

While the lock does flush in flight ->write() and ->prepare() it does
nothing to enforce when the cancellation is processed. It will still be
the case that the next invocation of ->write() or ->poll_complete() will
consider the cancel state before doing the next step.

I am failing to see what the lock is protecting. The other usage is for
checking that ->prepare() has completed before ->write() is invoked, but
again that is enforced by the firmware uploader workqueue.

I think the lock and the clear_to_send bit can be eliminated. Clear to
send is implied by ->prepare() succeeding. Convert cancel to an atomic
flag where cxl_fw_cancel() does:

set_bit(CXL_FW_CANCEL, &cxlds->fw.state);

...and cxl_fw_write() and cxl_fw_poll_complete() can just do:

if (test_and_clear_bit(CXL_FW_CANCEL, &cxlds->fw.state))
	do_cancel();

  parent reply	other threads:[~2023-05-31 21:56 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-22  3:09 [PATCH 0/4] cxl: Add a firmware update mechanism and cxl_test emulation Vishal Verma
2023-04-22  3:09 ` [PATCH 1/4] cxl/pci: Allocate irq vectors earlier in pci probe Vishal Verma
2023-05-11 15:13   ` Jonathan Cameron
2023-04-22  3:09 ` [PATCH 2/4] cxl/mbox: Add background cmd handling machinery Vishal Verma
2023-04-22  3:09 ` [PATCH 3/4] cxl: add a firmware update mechanism using the sysfs firmware loader Vishal Verma
2023-05-11 16:06   ` Jonathan Cameron
2023-05-19  2:58   ` Alison Schofield
2023-05-19 20:24     ` Verma, Vishal L
2023-05-23  3:33       ` Dan Williams
2023-05-23  3:21   ` Dan Williams
     [not found]     ` <a7443a348b9c2b51cf141ad1131c9befbb09724e.camel@intel.com>
2023-05-31 21:56       ` Dan Williams [this message]
2023-04-22  3:09 ` [PATCH 4/4] tools/testing/cxl: add firmware update emulation to CXL memdevs Vishal Verma
2023-05-11 16:18   ` Jonathan Cameron
2023-05-19  3:01     ` Alison Schofield
2023-05-19 15:12       ` Jonathan Cameron
2023-06-02 18:01     ` Verma, Vishal L
2023-05-23  3:30   ` Dan Williams
2023-04-24 17:39 ` [PATCH 0/4] cxl: Add a firmware update mechanism and cxl_test emulation Davidlohr Bueso
2023-06-02 17:48   ` Verma, Vishal L

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6477c29121ae3_168e29438@dwillia2-xfh.jf.intel.com.notmuch \
    --to=dan.j.williams@intel.com \
    --cc=alison.schofield@intel.com \
    --cc=bwidawsk@kernel.org \
    --cc=dave.jiang@intel.com \
    --cc=dave@stgolabs.net \
    --cc=ira.weiny@intel.com \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=russell.h.weight@intel.com \
    --cc=vishal.l.verma@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox