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Wed, 12 Jun 2024 04:43:59 +0000 Date: Tue, 11 Jun 2024 21:43:57 -0700 From: Dan Williams To: , , , , , CC: Alejandro Lucero Subject: Re: [RFC PATCH 02/13] cxl: add type2 device basic support Message-ID: <6669278d7fea_3101294e7@dwillia2-xfh.jf.intel.com.notmuch> References: <20240516081202.27023-1-alucerop@amd.com> <20240516081202.27023-3-alucerop@amd.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240516081202.27023-3-alucerop@amd.com> X-ClientProxiedBy: MW4PR03CA0155.namprd03.prod.outlook.com (2603:10b6:303:8d::10) To PH8PR11MB8107.namprd11.prod.outlook.com (2603:10b6:510:256::6) Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH8PR11MB8107:EE_|SJ1PR11MB6083:EE_ X-MS-Office365-Filtering-Correlation-Id: 994cb7cc-f55e-433f-7f11-08dc8a9a4657 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230032|1800799016|366008|376006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?MKMfb8ZkJw+itrFDLJPcRtZsfa1ePVGWHX2iqtkiEKHJbQPps6cJsrUJGGsn?= =?us-ascii?Q?wBWPa4ayOAMU55l5CJsbeipLyuOpgh5azC3UopKhH7OiZ4mih1tXA1b23KYA?= =?us-ascii?Q?ZiN4JC0DWrjIN1x/6j5kskXiEAGM/FMk5mjA46XUDzcOOmiOGHkepEPYAZFV?= =?us-ascii?Q?7hArrk/f2qPEZk2Z9qJx3Scug3fYXg7sbpZ3RVNbYyK+LjyPXUmDNIEqEwOu?= =?us-ascii?Q?+/dxM5PJ1ih4txgpZsxg+WP9p7pbg5uznAJlOPy07MAe37hmMg1qfsiCty8g?= =?us-ascii?Q?OcM+L+BQC69gWq06A888AZDbpU+oyW8d8D7WbPj+3QSlyfpLrYHzDPUG3/Hr?= =?us-ascii?Q?+ytUOu7xbdqvOMzWXjgSp+fMnNY7wPW7kx1OmJoF6xoG2MbxQ4OxftyqGZu2?= =?us-ascii?Q?LG0bORMntEWAZvKBVZ7tzoHJ00nda8x2qnBwYQfcqZc4RDmBtGgKTsI87STg?= =?us-ascii?Q?5yPQEeWNgnVwZRqx8G9Io9xDWJaIk4wQ3Qlgyb7gUp2vSz0QLpzPiU4aOpNL?= =?us-ascii?Q?JYfmRGiddvAswoiQA3hHKD2Y6yMeDLOUhzrHR73X/LZKjOjrMHTIdiWaNdOa?= =?us-ascii?Q?nBwpvvktbuf4iZDvP3iaOH8DcofQoB4//fcTF1iX98eSrERGDl1iEuYmNwJk?= =?us-ascii?Q?gTcfF5PQhmZIiLn9pngofyxUPqgDkQfCX5Zwo9uMopmQbIvDV2iRAyXHhu8e?= =?us-ascii?Q?eTk2I9+DMYlmCup73lxDH4voXYKJHz0JF1fmPQtwGUXN8hwtEufbaVnVk3qb?= =?us-ascii?Q?kdTKjyY0wjwgs7FTPTHRDJHifb3gdiVnnqBCPyUG21RJpAXOUFZNxpllXk6w?= =?us-ascii?Q?kNXh6pi9q5wufMwTesfEFCOdzQBneJ07fzbPN2GTIpqJV7uAoMFDT941rqrD?= =?us-ascii?Q?Q2vBDC2+hhbrLNjHrmGvrgPGnp5qDvCEZxsfpYKpOYH362FcB98VN9oCnnkg?= =?us-ascii?Q?Z7xc9Pgi4v8p9n4vd/Ct8mQc9N9NYtOzhW1fbi5UUJy5fClnBYM4EL5RFClr?= =?us-ascii?Q?D8XTo7Mplh8U4lR2VbM9xIU5I42aIUehREz/+9IsgRB0hSR0epEIMDfVXflM?= =?us-ascii?Q?OVMGSWEpWEuU8ORUtmVZv6pKGM93P5Pkv+LqueZYIC8dVaS/vr3Tj9WLTFpE?= =?us-ascii?Q?MNq8WNGI635BA+XRYSBs/DtgkXg8VbO68V+3k20IXU/T8j/oG+3uXFuZqHL+?= =?us-ascii?Q?Zc1wtsUZZah/DoAcpN3bU2TW6UwBlE/flUL3MwroxkJ/1QskQPpQ119sEjzW?= =?us-ascii?Q?lEI8SPn4JYMKixgXOqeT3/AqATA3nAg12h5CXL7jLil/7TOMp/Fwqivusrfy?= =?us-ascii?Q?rVeHNex8v7kIOLEZ5hKuQIp37ITLH3DglgNgfIAHfNFPnjEhNzi+BG7tS6v6?= =?us-ascii?Q?d2Hn4TpCAi2ZBbbnRcUiip5Xo6tuXQkLcY/QPuEXxsQ8qV7L0nLLbmSs8hpf?= =?us-ascii?Q?fLMz4Fqp5OjV+VLvL7peyvnIlLpbAOjQbTRSUrf8ccNB0Uxjs3ZF26jj+qqf?= =?us-ascii?Q?Sxw+JFbeeR5jbS6qA/lc2z7Rq1XvGCx5M/xELEb9kqWWlZjLH7fsNxTEVrTP?= =?us-ascii?Q?O9FzOiAYoTw7nwBdt2gqycSWtC8JCSDJx1giR7DFz5wBGM9PAHmWdT8L+1OA?= =?us-ascii?Q?CA=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 994cb7cc-f55e-433f-7f11-08dc8a9a4657 X-MS-Exchange-CrossTenant-AuthSource: PH8PR11MB8107.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2024 04:43:59.0288 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: xxvDRFDHlnajNS/FvGcp3eJ9KxnJ9KuR3ecoYoYSom7w5gFrxSa1T3XPjFkfsR0ibiadug9eRb8Q4e1J//VlPHxyrv0O2ECs+wMLqcrnEz4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR11MB6083 X-OriginatorOrg: intel.com alucerop@ wrote: > From: Alejandro Lucero > > Differientiating Type3, aka memory expanders, from Type2, aka device s/Differientiating/Differentiating/ ...actually to make this imperative tense don't use gerund phrases, so: s/Differentiating/Differentiate/ This "imperative tense" preference is borrowed from the x86 tip tree patch recommendations [1], which reminds me that CXL should create a document like that to make the grammar expectations known. [1]: https://www.kernel.org/doc/html/latest/process/maintainer-tip.html > accelerators, with a new function for initializing cxl_dev_state. > > Adding a type2 driver for a CXL emulated device inside CXL kernel s/Adding/Add/ I will also note that ChatGPT does a decent job at converting patch changelogs to imperative tense. > testing infrastructure as a client for the functionality added. > > Signed-off-by: Alejandro Lucero > Signed-off-by: Dan Williams It would really help me out if the changelog mentions what you adopted and what you modified. With a Link: to the patch where the code originated. I will still review the parts I wrote previously to see if I still agree with them, but its taxing to come back to this patch cold and think "did I write this routine, or is this new?". Can you repost with the changelog commentary fixed up to reflect that? > --- > drivers/cxl/core/memdev.c | 15 ++++++ > include/linux/cxlmem.h | 2 + > tools/testing/cxl/Kbuild | 1 + > tools/testing/cxl/type2/Kbuild | 7 +++ > tools/testing/cxl/type2/pci_type2.c | 80 +++++++++++++++++++++++++++++ > 5 files changed, 105 insertions(+) > create mode 100644 tools/testing/cxl/type2/Kbuild > create mode 100644 tools/testing/cxl/type2/pci_type2.c > > diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c > index 07cd0b8b026f..0336b3f14f4a 100644 > --- a/drivers/cxl/core/memdev.c > +++ b/drivers/cxl/core/memdev.c > @@ -659,6 +659,21 @@ static void detach_memdev(struct work_struct *work) > > static struct lock_class_key cxl_memdev_key; > > +struct cxl_dev_state *cxl_accel_state_create(struct device *dev) > +{ > + struct cxl_dev_state *cxlds; > + > + cxlds = devm_kzalloc(dev, sizeof(*cxlds), GFP_KERNEL); > + if (!cxlds) > + return ERR_PTR(-ENOMEM); > + > + cxlds->dev = dev; > + cxlds->type = CXL_DEVTYPE_DEVMEM; > + > + return cxlds; > +} > +EXPORT_SYMBOL_NS_GPL(cxl_accel_state_create, CXL); > + > static struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds, > const struct file_operations *fops) > { > diff --git a/include/linux/cxlmem.h b/include/linux/cxlmem.h > index 0d26a45a4af2..e8d12b543db1 100644 > --- a/include/linux/cxlmem.h > +++ b/include/linux/cxlmem.h > @@ -859,4 +859,6 @@ struct cxl_hdm { > struct seq_file; > struct dentry *cxl_debugfs_create_dir(const char *dir); > void cxl_dpa_debug(struct seq_file *file, struct cxl_dev_state *cxlds); > + > +struct cxl_dev_state *cxl_accel_state_create(struct device *dev); > #endif /* __CXL_MEM_H__ */ > diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild > index 030b388800f0..a285719c4db6 100644 > --- a/tools/testing/cxl/Kbuild > +++ b/tools/testing/cxl/Kbuild > @@ -69,3 +69,4 @@ cxl_core-y += cxl_core_exports.o > KBUILD_CFLAGS := $(filter-out -Wmissing-prototypes -Wmissing-declarations, $(KBUILD_CFLAGS)) > > obj-m += test/ > +obj-m += type2/ > diff --git a/tools/testing/cxl/type2/Kbuild b/tools/testing/cxl/type2/Kbuild > new file mode 100644 > index 000000000000..a96ad4d64924 > --- /dev/null > +++ b/tools/testing/cxl/type2/Kbuild > @@ -0,0 +1,7 @@ > +# SPDX-License-Identifier: GPL-2.0 > + > +obj-m += pci_type2.o > + > +cxl_pci_type2-y := cxl_pci_type2.o > + > +KBUILD_CFLAGS := $(filter-out -Wmissing-prototypes -Wmissing-declarations, $(KBUILD_CFLAGS)) > diff --git a/tools/testing/cxl/type2/pci_type2.c b/tools/testing/cxl/type2/pci_type2.c > new file mode 100644 > index 000000000000..863ce7dc28ef > --- /dev/null > +++ b/tools/testing/cxl/type2/pci_type2.c > @@ -0,0 +1,80 @@ > +#include > +#include > +#include > +#include > +#include > + > +struct cxl_dev_state *cxlds; > + > +#define CXL_TYPE2_MEM_SIZE (1024*1024*256) > + > +static int type2_pci_probe(struct pci_dev *pci_dev, > + const struct pci_device_id *entry) So to date, tools/testing/cxl/ has been for cxl_test which skips all the PCI register emulation and just runs based on mocking core-kernel and core-cxl interfaces. I would like to explore how far the cxl_test approach can go and leave the PCI integration to when a driver can reference real PCI ids. Otherwise, I feel like too much development effort can be diverted to this "proxy" and increase the timeline to seeing the real thing. > + > +{ > + u16 dvsec; > + > + dvsec = pci_find_dvsec_capability(pci_dev, PCI_DVSEC_VENDOR_ID_CXL, CXL_DVSEC_PCIE_DEVICE); > + > + if (!dvsec) { > + pci_info(pci_dev, "No CXL capability (vendor: %x\n", pci_dev->vendor); > + return 0; > + } else { > + pci_info(pci_dev, "CXL CXL_DVSEC_PCIE_DEVICE capability found"); > + } > + > + cxlds = cxl_accel_state_create(&pci_dev->dev); > + if (IS_ERR(cxlds)) > + return PTR_ERR(cxlds); > + > + pci_info(pci_dev, "Initializing cxlds..."); > + cxlds->cxl_dvsec = dvsec; > + cxlds->serial = pci_dev->dev.id; > + > + /* Should not this be based on DVSEC range size registers */ > + cxlds->dpa_res = DEFINE_RES_MEM(0, CXL_TYPE2_MEM_SIZE); > + cxlds->ram_res = DEFINE_RES_MEM_NAMED(0, CXL_TYPE2_MEM_SIZE, "ram"); Especially at this stage of the driver there is nothing that require QEMU emulation versus cxl_test mocking. > + > + return 0; > +} > + > +static void type2_pci_remove(struct pci_dev *pci_dev) > +{ > + > +} > + > +/* PCI device ID table */ > +static const struct pci_device_id type2_pci_table[] = { > + {PCI_DEVICE(PCI_VENDOR_ID_AMD, 0xbabe)}, Real vendor-ids should have real device-ids, also that particular device-id choice is not appropriate.