From: Dan Williams <dan.j.williams@intel.com>
To: Li Ming <ming4.li@intel.com>, <linux-cxl@vger.kernel.org>,
<dan.j.williams@intel.com>
Cc: Li Ming <ming4.li@intel.com>
Subject: Re: [PATCH v2 1/1] cxl/mem: Fix no cxl_nvd during pmem region auto-assembing
Date: Mon, 17 Jun 2024 16:50:44 -0700 [thread overview]
Message-ID: <6670cbd4beec2_310129497@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <20240605101524.2244180-1-ming4.li@intel.com>
Li Ming wrote:
> When CXL subsystem is auto-assembling a pmem region during cxl
> endpoint port probing, always hit below calltrack.
>
> BUG: kernel NULL pointer dereference, address: 0000000000000078
> #PF: supervisor read access in kernel mode
> #PF: error_code(0x0000) - not-present page
> RIP: 0010:cxl_pmem_region_probe+0x22e/0x360 [cxl_pmem]
> Call Trace:
> <TASK>
> ? __die+0x24/0x70
> ? page_fault_oops+0x82/0x160
> ? do_user_addr_fault+0x65/0x6b0
> ? exc_page_fault+0x7d/0x170
> ? asm_exc_page_fault+0x26/0x30
> ? cxl_pmem_region_probe+0x22e/0x360 [cxl_pmem]
> ? cxl_pmem_region_probe+0x1ac/0x360 [cxl_pmem]
> cxl_bus_probe+0x1b/0x60 [cxl_core]
> really_probe+0x173/0x410
> ? __pfx___device_attach_driver+0x10/0x10
> __driver_probe_device+0x80/0x170
> driver_probe_device+0x1e/0x90
> __device_attach_driver+0x90/0x120
> bus_for_each_drv+0x84/0xe0
> __device_attach+0xbc/0x1f0
> bus_probe_device+0x90/0xa0
> device_add+0x51c/0x710
> devm_cxl_add_pmem_region+0x1b5/0x380 [cxl_core]
> cxl_bus_probe+0x1b/0x60 [cxl_core]
>
> Because the cxl_nvd of the memdev is necessary during pmem region
> probing, but the cxl_nvd can be registered only after endpoint port
> probing done, that is a collision dependency, so adjust the sequence
> between cxl_nvd registration and adding endpoint port to guarantee there
> is a cxl_nvd in memdev during the pmem region auto-assembling.
>
> Fixes: f17b558d6663 ("cxl/pmem: Refactor nvdimm device registration, delete the workqueue")
> Suggested-by: Dan Williams <dan.j.williams@intel.com>
> Signed-off-by: Li Ming <ming4.li@intel.com>
Looks good to me:
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
prev parent reply other threads:[~2024-06-17 23:50 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-05 10:15 [PATCH v2 1/1] cxl/mem: Fix no cxl_nvd during pmem region auto-assembing Li Ming
2024-06-17 23:50 ` Dan Williams [this message]
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