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Fri, 9 Aug 2024 21:44:28 +0000 Date: Fri, 9 Aug 2024 16:44:23 -0500 From: Ira Weiny To: Dan Williams , Li Ming , , , , , CC: Li Ming Subject: Re: [PATCH v2 0/2] Fix get a wrong pci host bridge in cxl_setup_parent_dport() Message-ID: <66b68db7b3f3c_6285029485@iweiny-mobl.notmuch> References: <20240809082750.3015641-1-ming4.li@intel.com> <66b68bce7fb41_2575294e4@dwillia2-xfh.jf.intel.com.notmuch> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <66b68bce7fb41_2575294e4@dwillia2-xfh.jf.intel.com.notmuch> X-ClientProxiedBy: MW4PR03CA0269.namprd03.prod.outlook.com (2603:10b6:303:b4::34) To SA1PR11MB6733.namprd11.prod.outlook.com (2603:10b6:806:25c::17) Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA1PR11MB6733:EE_|CH3PR11MB7820:EE_ X-MS-Office365-Filtering-Correlation-Id: 0b27bfd3-4171-43ab-3abf-08dcb8bc719d X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?ahEGkvuSPtddG/gCVu96xpstjn24ZrXG7rxLbWoRvgU9gGbCYc+lWVG8uzoK?= =?us-ascii?Q?S1LP4ClZkEA1kyrLWKD9egYQW/eLFm3RbcVNG3kpdIc6GaTFooO4bnmtqshq?= =?us-ascii?Q?N5Fg9bSA1UIsrRi3qSySethbCA9nABHWpOQI6CVm9ngLCt9atP5eDya/OTER?= =?us-ascii?Q?+LoetYLRNZNoxD8bNm7uNOUsGTEQ7nPQ/rh7VsvpbFAX2OmTSFgYQGLdt/x8?= =?us-ascii?Q?MxX1jtAtKRoFffi+wMEY+NvPxEx2ZbmMBhVmJ8yLeiwXmHJh9nJiwxcS45+x?= =?us-ascii?Q?93m0jNVSwAC/G0okNqg/4Xm70Xy3ILxhtrxqPhMqN8S1C56Ru3g+HtPcB9G4?= =?us-ascii?Q?IrKfqTOtpccxBBuIONjar/E7cYAzqKbVGVTulzu6+GCABsrpwOYvdRLIhPhI?= =?us-ascii?Q?0z9+d0/muAAaMAyyuPa6JiuRjP5lo1gUyZAesyPDhfqGO2ndDEcufRWpmqrl?= =?us-ascii?Q?H21M2Sr2my8VgorH9z692BfRteEIig4WTtaIf4C8ZsoZUQGuCxFo9MNWa5eG?= =?us-ascii?Q?1y/aoLQ/H11hZzZ9//NaxvUcOw/SGM0eIfNmHRtjSfAYUQtt/uY3+Ma+lllJ?= =?us-ascii?Q?ZBJj9/I+RDEtorvs0O1JtUYTWqJ1xXGayYg8F6YzSOCTo5ne3A7MG3SgtR/x?= =?us-ascii?Q?jNkbBzqSPPipFWdIfesMvAwmf0mMPS+bPYGTZbwhCV0zXPiVLvOcA05wkk2P?= =?us-ascii?Q?vqakjHyp77j1Nh5reB/C0vgB1Pnjw0A2qRn/XMB3zHbRSt3RASWqBlCyjSFY?= =?us-ascii?Q?ni9TsJOs6e16OqyaL+agGGKzSApBwc5gohf0ElaaLFmzwBrb6SO79Hdk4bCo?= =?us-ascii?Q?3eX3cML69wAMvCmZDWffYqyYfvl7XVypK9sJuh/CWkDHVSlNV5llD4rkB5AO?= =?us-ascii?Q?+m91DI9je57mPR1H+tMMBShzAP7bcPDju5lyFi/IXPnk3MfxJ3U7telCe640?= =?us-ascii?Q?g7fAoHJ4an0FkHCUxIqwJGG1M0JEsf+UsE1lp3AUcWZHAYES8mnw1LdKb47J?= =?us-ascii?Q?qT4JLmIraNAAeKEVzTUrrhMmQRlblxexqttIUVhTe6mUIVn1u/7hL7igLnjJ?= =?us-ascii?Q?u2fSN8CSVtE5tv186V7oO6gY94M77noR3NdXDcSkPjE+3HLjlqH8xfnLMzMe?= =?us-ascii?Q?9CZ3OrXZN87n61fSxS+YUmkZYpxLWRcCzJZGfcsCee5dT6eRaUoXr/UN/mC9?= =?us-ascii?Q?evUTjOedtvnYAVYNgV/PLc5dqHIYvDYOvs+Agpwqc8d8xc5famG3TNQ44BTB?= =?us-ascii?Q?SKr2QREFE8wFKaTqaK6o0yKxD/9dvx5Tmau/gOmX02xMYHsogczOuZ7pNjJ0?= =?us-ascii?Q?OJ/9vPoeCLckHCtAll+Ovsi+VhGJ7TYGuQeE3OgLyJaGR2jpvb0AbfF71wW+?= =?us-ascii?Q?qyrz7O2/oWbANuOsyIKBwSHRXUGclaesr2D1jTSLpGh3cCj++dei5YPxcShB?= =?us-ascii?Q?D5bGCnDcGtvi1iQE6XHZYznUjucC2+SREBbvDcje7fOOlPAjTq/Xujb1mjk1?= =?us-ascii?Q?irg/rvdbZUU0OsS+H7Fv4k4s5yZBydS0kHKCZquvM/c/p7FPTDXuPDSP/TPi?= =?us-ascii?Q?s19UbTvKLgqWyQ5MOfOcHmoZRhl+zCKhYz0UIh1K?= X-MS-Exchange-CrossTenant-Network-Message-Id: 0b27bfd3-4171-43ab-3abf-08dcb8bc719d X-MS-Exchange-CrossTenant-AuthSource: SA1PR11MB6733.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Aug 2024 21:44:28.1547 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 6jz9WvTztCmhAemKADgxbN16dmwbzmNgZUYBZBnO7wpJabsOqNsHd1ExnkHeN3f5UQU/rb9XT90WJYqhcaZUGA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR11MB7820 X-OriginatorOrg: intel.com Dan Williams wrote: > Li Ming wrote: > > The cxl_test unit test environment on qemu always hit below call trace > > with KASAN enabled: > > > > BUG: KASAN: slab-out-of-bounds in cxl_setup_parent_dport+0x480/0x530 [cxl_core] > > Read of size 1 at addr ff110000676014f8 by task (udev-worker)/676[ 24.424403] CPU: 2 PID: 676 Comm: (udev-worker) Tainted: G O N 6.10.0-qemucxl #1 > > Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS edk2-20240214-2.el9 02/14/2024 > > Call Trace: > > > > dump_stack_lvl+0xea/0x150 > > print_report+0xce/0x610 > > ? kasan_complete_mode_report_info+0x40/0x200 > > kasan_report+0xcc/0x110 > > __asan_report_load1_noabort+0x18/0x20 > > cxl_setup_parent_dport+0x480/0x530 [cxl_core] > > cxl_mem_probe+0x49b/0xaa0 [cxl_mem] > > > > The root cause is that a wrong host bridge was gotten from > > dport->dport_dev in cxl_setup_parent_dport(). In > > cxl_setup_parent_dport(), it always calls > > to_pci_host_bridge(dport->dport_dev) to get a pci_host_bridge structure. > > There are two issues in the implementation: > > > > * to_pci_host_bridge(dport->dport_dev) should be used only for RCH > > cases, dport->dport_dev points to a pci device rather than a pci host > > bridge in VH cases. The solution is checking if dport is in RCH mode > > then calling to_pci_host_bridge(). > > (Patch 1) > > > > * In cxl_test unit test environment, cxl_test will create a emulated CXL > > topology with emulated dports, the dport_dev of a emulated dport > > points to a platform device. to_pci_host_bridge(dport->dport_dev) also > > gets a wrong pci host bridge in the case. The solution is implementing > > a new wrap function called __wrap_cxl_setup_parent_dport() on cxl_test > > side, the function will filter all emulated dports, make sure only > > real dports can be handled by cxl_setup_parent_dport(). > > (Patch 2) > > > > v1 link: https://lore.kernel.org/linux-cxl/ZrHR+0w3bwM1Ik8h@xpf.sh.intel.com/T/#med6200e54ec12f09fdcc04571516adda261c9561 > > > > v2: > > - Add call trace log into changelog > > - Remove 'dev_is_platform(dport->dport_dev)' checking out of cxl driver > > scope. Check if dport is emulated in cxl_test. > > I am suprised we got this far without this being a problem earlier. > > For the series you can add: > > Reviewed-by: Dan Williams This fixes some of the issues I was seeing in the cxl-test failures. So I'm going to tag this too. That said, on patch 1 I would like to see further clean up. Diging into the details of the dport->rcrb.aer_cap usage this check and code should be moved to cxl_dport_map_rch_aer() and make aer_cap a local and remove struct cxl_rcrb_info completely. For now, for the series. Reviewed-by: Ira Weiny > > ...can you also follow along with a rename, documentation, and cleanup > patch? cxl_setup_parent_dport() tells the reader absolutely nothing > about what the function does, and that it is specifically initializing > PCI AER operation. > > It should be called something like cxl_dport_init_aer(), and it should > have kernel-doc associated with it. The cleanup opportunity I see is to > consolidate the ->native_aer check for the cxl_rcrb_to_aer() and > cxl_disable_rch_root_ints() into one location. It is a bit silly that > cxl_disable_rch_root_ints() needs to check if dport->regs.dport_aer was > initialized when it was just setup a few lines above. I.e. there are > just too many helper functions and it all could be consolidated in a > bigger cxl_dport_init_aer() function. > > > > > Li Ming (2): > > cxl/pci: Get AER capability address from RCRB only for RCH dport > > cxl/test: Skip cxl_setup_parent_dport() for emulated dports > > This is the right thing to do whenever possible. The usage of > dev_is_platform() only makes sense for scenarios where a function is > called by the cxl_core that needs to avoid getting confused by cxl_test. > > In this case, since cxl_mem is making the call to the exported > cxl_setup_parent_dport() symbol, then mocking it for cxl_test is > appropriate. >