From: Dan Williams <dan.j.williams@intel.com>
To: "Yasunori Gotou (Fujitsu)" <y-goto@fujitsu.com>,
'Dan Williams' <dan.j.williams@intel.com>,
"'linux-cxl@vger.kernel.org'" <linux-cxl@vger.kernel.org>
Subject: RE: Assistance Needed with CXL Memory Region Creation
Date: Thu, 16 Jan 2025 10:26:22 -0800 [thread overview]
Message-ID: <67894f4e5ed6_20fa2946@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <OSYPR01MB535212BCA854FDCC57DFFC1C901A2@OSYPR01MB5352.jpnprd01.prod.outlook.com>
Yasunori Gotou (Fujitsu) wrote:
> Ping....
> Is there anyone who can provide information to help resolve this issue?
I missed this earlier... holidays + merge window opening == inbox
overflow.
> I met this issue at kernel 6.13-rc4. Are there any fix for this issue?
> Otherwise, are there any kernel version which can create region under the special purpose memory?
>
> I'll add some more information below...
Thanks for that!
> I think cxl create-region should succeed in the special purpose memory area, but I cannot
> understand why the above code results in an ERANGE error...
[..]
> > Below is the relevant section from /proc/iomem:
> > ====
> > 89d500000-89fffffff : Reserved
> > 8a0000000-189fffffff : CXL Window 0
> > 8a0000000-189fffffff : Soft Reserved ------!!!!
> > fd00000000-fd03ffffff : Reserved
> > =====
This memory map is saying that BIOS created a CXL Window "CXL Window 0"
AND it populated that window with a CXL region marked "Soft Reserved".
The window is fully consumed by that existing BIOS created region. The
expectation is that the CXL subsystem parses the BIOS configuration and
creates a "cxl_region" object as a child of that Soft Reserved range.
However, for whatever reason it looks like the driver failed to parse
the CXL configuration. If that had worked the flow to create a new
region in that space would require first deleting the BIOS created
region.
So, the behavior you are seeing is expected. You can not create a
cxl_region in a space that already has a BIOS created cxl_region.
The work in this patchset [1] is aimed at making sure that even if the
kernel does not understand the BIOS CXL configuration it will still at
least transfer control of that address range to the device-dax
subsystem.
[1]: http://lore.kernel.org/cover.1737046620.git.nathan.fontenot@amd.com
...but that's just a fallback crutch. I would be interested to see more
details on why the kernel failed to assemble the region that the BIOS
created in this case.
The overall flow is:
- BIOS creates ACPI CFMWS
- BIOS optionally creates regions within one more CFMWS ranges
- BIOS builds EFI memory map with the CXL regions marked EFI_MEMORY_SP
- Linux boots and sees EFI_MEMORY_SP + CXL overlap and waits for the CXL
subsystem to assemble the region
- Region creation is only allowed with free capacity
The known bugs are:
- Corner case CXL configurations that trip up the driver (memory side
caching and CXL interleaved with DDR are current examples being
worked)
- Reliable fallback to "CXL unaware" behavior when region assembly
fails, should be address by [1]. A temporary workaround is to
disable the cxl_acpi driver so that hmem_register_device() skips CXL
range deferral.
- Inability to delete regions that were created by the BIOS. Should also
be addressed by [1].
next prev parent reply other threads:[~2025-01-16 18:26 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-07 2:21 Assistance Needed with CXL Memory Region Creation Yasunori Gotou (Fujitsu)
2025-01-16 11:13 ` Yasunori Gotou (Fujitsu)
2025-01-16 18:26 ` Dan Williams [this message]
2025-01-17 7:00 ` Yasunori Gotou (Fujitsu)
2025-02-03 10:08 ` Yasunori Gotou (Fujitsu)
2025-01-23 9:56 ` Zhijian Li (Fujitsu)
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