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From: Dan Williams <dan.j.williams@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
	Dan Williams <dan.j.williams@intel.com>
Cc: <dave.jiang@intel.com>, <jonathan.cameron@huawei.com>,
	<alison.schofield@intel.com>, <ira.weiny@intel.com>,
	<vishal.l.verma@intel.com>, <seven.yi.lee@gmail.com>,
	<hch@infradead.org>, <a.manzanares@samsung.com>,
	<fan.ni@samsung.com>, <linux-cxl@vger.kernel.org>
Subject: Re: [PATCH RFC 1/1] cxl/pci: Support Global Persistent Flush (GPF)
Date: Thu, 16 Jan 2025 23:33:00 -0800	[thread overview]
Message-ID: <678a07ac7c975_20fa29464@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <20250117071748.ss4rm7y2mdzdvuaq@offworld>

Davidlohr Bueso wrote:
> On Thu, 16 Jan 2025, Dan Williams wrote:
> 
> >Davidlohr Bueso wrote:
> >> +int cxl_pci_update_gpf_port(struct pci_dev *pdev,
> >> +			    struct cxl_memdev *cxlmd, bool remove)
> >> +{
> >
> >If the timers are just maximized then I don't think there is any need to
> >pass in @cxmld.
> 
> The max for T1 is 20 secs, true; but the max for T2 is based on the max of
> all the devices T2 in the hierarchy, so this call still needs @cxlmd.

...but you can't get any more "max" than the hardware maximum, right?
Just assume a topology full of T1MAX == T1_HW_MAX and T2MAX = T2_HW_MAX
devices and skip the calculation recommendations.

      reply	other threads:[~2025-01-17  7:33 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-20 16:43 [PATCH RFC v2 0/1] cxl/pci: Support Global Persistent Flush (GPF) Davidlohr Bueso
2024-12-20 16:43 ` [PATCH RFC 1/1] " Davidlohr Bueso
2024-12-20 18:21   ` Ira Weiny
2024-12-21  4:14     ` Davidlohr Bueso
2024-12-23 19:53   ` Jonathan Cameron
2025-01-17  2:28   ` Dan Williams
2025-01-17  7:17     ` Davidlohr Bueso
2025-01-17  7:33       ` Dan Williams [this message]

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