From: Dan Williams <dan.j.williams@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>, <dave.jiang@intel.com>,
<dan.j.williams@intel.com>
Cc: <jonathan.cameron@huawei.com>, <alison.schofield@intel.com>,
<ira.weiny@intel.com>, <vishal.l.verma@intel.com>,
<seven.yi.lee@gmail.com>, <hch@infradead.org>,
<a.manzanares@samsung.com>, <fan.ni@samsung.com>,
<anisa.su@samsung.com>, <dave@stgolabs.net>,
<linux-cxl@vger.kernel.org>
Subject: Re: [PATCH v4] cxl/pci: Support Global Persistent Flush (GPF)
Date: Fri, 24 Jan 2025 18:26:28 -0800 [thread overview]
Message-ID: <67944bd4867f5_20f32945a@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <20250124233533.910535-1-dave@stgolabs.net>
Davidlohr Bueso wrote:
> Add support for GPF flows. It is found that the CXL specification
> around this to be a bit too involved from the driver side. And while
> this should really all handled by the hardware, this patch takes
> things with a grain of salt.
>
> Upon respective port enumeration, both phase timeouts are set to
> a max of 20 seconds, which is the NMI watchdog default for lockup
> detection. The premise is that the kernel does not have enough
> information to set anything better than a max across the board
> and hope devices finish their GPF flows within the platform energy
> budget.
>
> Timeout detection is based on dirty Shutdown semantics. The driver
> will mark it as dirty, expecting that the device clear it upon a
> successful GPF event. The admin may consult the device Health and
> check the dirty shutdown counter to see if there was a problem
> with data integrity.
>
> Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
> ---
>
> Changes from v3:
> - no rch checking (Dan)
> - cache port dvsec (Dan)
> - set dirty shutdown in pcxl_nvdimm_probe() (Dan)
>
> Documentation/driver-api/cxl/maturity-map.rst | 2 +-
> drivers/cxl/core/core.h | 2 +
> drivers/cxl/core/mbox.c | 18 ++++
> drivers/cxl/core/pci.c | 86 +++++++++++++++++++
> drivers/cxl/core/port.c | 2 +
> drivers/cxl/cxl.h | 2 +
> drivers/cxl/cxlmem.h | 5 ++
> drivers/cxl/cxlpci.h | 6 ++
> drivers/cxl/pmem.c | 8 ++
> 9 files changed, 130 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst
> index df8e2ac2a320..99dd2c841e69 100644
> --- a/Documentation/driver-api/cxl/maturity-map.rst
> +++ b/Documentation/driver-api/cxl/maturity-map.rst
> @@ -130,7 +130,7 @@ Mailbox commands
> * [0] Switch CCI
> * [3] Timestamp
> * [1] PMEM labels
> -* [0] PMEM GPF / Dirty Shutdown
> +* [1] PMEM GPF / Dirty Shutdown
Hooray!
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
> * [0] Scan Media
>
> PMU
> diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h
> index 800466f96a68..8f2eb76a3c8c 100644
> --- a/drivers/cxl/core/core.h
> +++ b/drivers/cxl/core/core.h
> @@ -115,4 +115,6 @@ bool cxl_need_node_perf_attrs_update(int nid);
> int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port,
> struct access_coordinate *c);
>
> +int cxl_gpf_port_setup(struct device *dport_dev, struct cxl_port *port);
> +
> #endif /* __CXL_CORE_H__ */
> diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
> index 548564c770c0..5b89ae5c5e28 100644
> --- a/drivers/cxl/core/mbox.c
> +++ b/drivers/cxl/core/mbox.c
> @@ -1308,6 +1308,24 @@ int cxl_mem_create_range_info(struct cxl_memdev_state *mds)
> }
> EXPORT_SYMBOL_NS_GPL(cxl_mem_create_range_info, "CXL");
>
> +int cxl_dirty_shutdown_state(struct cxl_memdev_state *mds)
> +{
> + struct cxl_mailbox *cxl_mbox = &mds->cxlds.cxl_mbox;
In the future I want to cleanup all these functions that take @mds just
to get back to the mailbox to just take the mailbox directly, but again
that's future work.
next prev parent reply other threads:[~2025-01-25 2:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-24 23:35 [PATCH v4] cxl/pci: Support Global Persistent Flush (GPF) Davidlohr Bueso
2025-01-25 2:26 ` Dan Williams [this message]
2025-01-27 11:26 ` Jonathan Cameron
2025-02-03 17:14 ` Dave Jiang
2025-02-03 20:48 ` Davidlohr Bueso
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