From: <dan.j.williams@intel.com>
To: "Bowman, Terry" <terry.bowman@amd.com>,
<dan.j.williams@intel.com>, <dave@stgolabs.net>,
<jonathan.cameron@huawei.com>, <dave.jiang@intel.com>,
<alison.schofield@intel.com>, <bhelgaas@google.com>,
<shiju.jose@huawei.com>, <ming.li@zohomail.com>,
<Smita.KoralahalliChannabasappa@amd.com>, <rrichter@amd.com>,
<dan.carpenter@linaro.org>, <PradeepVineshReddy.Kodamati@amd.com>,
<lukas@wunner.de>, <Benjamin.Cheatham@amd.com>,
<sathyanarayanan.kuppuswamy@linux.intel.com>,
<linux-cxl@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>
Subject: Re: [PATCH v10 04/17] CXL/AER: Introduce CXL specific AER driver file
Date: Thu, 24 Jul 2025 13:32:52 -0700 [thread overview]
Message-ID: <68829874e03a7_134cc710028@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <066fd1e8-d86c-4016-8fd9-6b94092ea48e@amd.com>
Bowman, Terry wrote:
>
>
> On 7/23/2025 7:01 PM, dan.j.williams@intel.com wrote:
> > Terry Bowman wrote:
> >> The CXL AER error handling logic currently resides in the AER driver file,
> >> drivers/pci/pcie/aer.c. CXL specific changes are conditionally compiled
> >> using #ifdefs.
> >>
> >> Improve the AER driver maintainability by separating the CXL specific logic
> >> from the AER driver's core functionality and removing the #ifdefs.
> >> Introduce drivers/pci/pcie/cxl_aer.c and move the CXL AER logic into the
> >> new file.
> >>
> >> Update the makefile to conditionally compile the CXL file using the
> >> existing CONFIG_PCIEAER_CXL Kconfig.
> >>
> >> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> > [..]
> >> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> >> index e2d71b6fdd84..31b3935bf189 100644
> >> --- a/include/linux/pci_ids.h
> >> +++ b/include/linux/pci_ids.h
> >> @@ -12,6 +12,8 @@
> >>
> >> /* Device classes and subclasses */
> >>
> >> +#define PCI_CLASS_CODE_MASK 0xFFFF00
> > Per other comments do not add this updated in the same patch as the
> > move.
> >
> > When / if you submit it separately it likely also belongs next to
> > PCI_CLASS_REVISION in include/uapi/linux/pci_regs.h defined with
> > __GENMASK(23, 8).
>
> include/uapi/linux/pci_regs.h appears to use all values without using GENMASK().
> Just adding as a note. I'm making the change.
pci_regs.h is in include/uapi/. Historically that meant that it was
unable to use GENMASK() from include/linux/. That changed "recently"
(compared to the age of pci_regs.h) with commit:
3c7a8e190bc5 uapi: introduce uapi-friendly macros for GENMASK
next prev parent reply other threads:[~2025-07-24 20:32 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-26 22:42 [PATCH v10 00/17] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2025-06-26 22:42 ` [PATCH v10 01/17] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions Terry Bowman
2025-07-18 17:55 ` Dave Jiang
2025-07-23 21:58 ` dan.j.williams
2025-07-23 22:15 ` Dave Jiang
2025-06-26 22:42 ` [PATCH v10 02/17] PCI/CXL: Add pcie_is_cxl() Terry Bowman
2025-07-23 22:30 ` dan.j.williams
2025-07-23 23:21 ` Bowman, Terry
2025-07-24 18:00 ` dan.j.williams
2025-08-09 10:56 ` Alejandro Lucero Palau
2025-08-11 19:14 ` Bowman, Terry
2025-08-11 23:14 ` dan.j.williams
2025-06-26 22:42 ` [PATCH v10 03/17] PCI/AER: Report CXL or PCIe bus error type in trace logging Terry Bowman
2025-06-26 23:25 ` Sathyanarayanan Kuppuswamy
2025-06-27 14:14 ` Bowman, Terry
2025-06-27 9:53 ` Jonathan Cameron
2025-07-02 16:00 ` Bowman, Terry
2025-06-27 11:32 ` Shiju Jose
2025-06-27 14:24 ` Bowman, Terry
2025-07-01 21:27 ` Dave Jiang
2025-07-23 22:56 ` dan.j.williams
2025-06-26 22:42 ` [PATCH v10 04/17] CXL/AER: Introduce CXL specific AER driver file Terry Bowman
2025-06-26 23:42 ` Sathyanarayanan Kuppuswamy
2025-06-27 10:12 ` Jonathan Cameron
2025-06-27 14:29 ` Bowman, Terry
2025-07-24 0:01 ` dan.j.williams
2025-07-24 17:06 ` Bowman, Terry
2025-07-24 20:32 ` dan.j.williams [this message]
2025-07-24 1:16 ` dan.j.williams
2025-07-24 17:02 ` Bowman, Terry
2025-07-24 20:23 ` dan.j.williams
2025-06-26 22:42 ` [PATCH v10 05/17] CXL/AER: Introduce kfifo for forwarding CXL errors Terry Bowman
2025-06-27 10:24 ` Jonathan Cameron
2025-07-02 16:21 ` Bowman, Terry
2025-07-02 19:54 ` Dan Carpenter
2025-07-02 19:57 ` Bowman, Terry
2025-07-03 10:06 ` Jonathan Cameron
2025-07-01 21:53 ` Dave Jiang
2025-07-02 17:10 ` Bowman, Terry
2025-07-24 2:01 ` dan.j.williams
2025-07-24 17:21 ` Bowman, Terry
2025-07-24 20:55 ` dan.j.williams
2025-06-26 22:42 ` [PATCH v10 06/17] PCI/AER: Dequeue forwarded CXL error Terry Bowman
2025-06-27 11:00 ` Jonathan Cameron
2025-07-02 17:51 ` Bowman, Terry
2025-07-01 23:04 ` Dave Jiang
2025-07-02 17:56 ` Bowman, Terry
2025-07-03 10:11 ` Jonathan Cameron
2025-07-25 0:38 ` dan.j.williams
2025-06-26 22:42 ` [PATCH v10 07/17] CXL/PCI: Introduce CXL uncorrectable protocol error recovery Terry Bowman
2025-06-27 11:05 ` Jonathan Cameron
2025-07-02 21:06 ` Bowman, Terry
2025-06-27 12:27 ` Shiju Jose
2025-07-02 21:34 ` Bowman, Terry
2025-06-26 22:42 ` [PATCH v10 08/17] cxl/pci: Move RAS initialization to cxl_port driver Terry Bowman
2025-06-27 11:12 ` Jonathan Cameron
2025-07-18 18:01 ` Dave Jiang
2025-06-26 22:42 ` [PATCH v10 09/17] cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers Terry Bowman
2025-06-27 11:17 ` Jonathan Cameron
2025-07-02 21:41 ` Bowman, Terry
2025-07-18 21:28 ` Dave Jiang
2025-07-18 21:55 ` Bowman, Terry
2025-07-18 22:01 ` Dave Jiang
2025-07-18 22:40 ` Bowman, Terry
2025-07-18 22:45 ` Dave Jiang
2025-06-26 22:42 ` [PATCH v10 10/17] cxl/pci: Update RAS handler interfaces to also support CXL Ports Terry Bowman
2025-06-26 22:42 ` [PATCH v10 11/17] cxl/pci: Log message if RAS registers are unmapped Terry Bowman
2025-07-21 21:56 ` Dave Jiang
2025-06-26 22:42 ` [PATCH v10 12/17] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports Terry Bowman
2025-06-27 12:22 ` Shiju Jose
2025-07-02 1:18 ` Alison Schofield
2025-07-02 22:07 ` Bowman, Terry
2025-07-02 21:56 ` Bowman, Terry
2025-06-26 22:42 ` [PATCH v10 13/17] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors Terry Bowman
2025-06-27 11:48 ` Jonathan Cameron
2025-07-21 22:17 ` Dave Jiang
2025-06-26 22:42 ` [PATCH v10 14/17] cxl/pci: Introduce CXL Endpoint protocol error handlers Terry Bowman
2025-06-27 11:52 ` Jonathan Cameron
2025-06-27 12:27 ` Shiju Jose
2025-07-21 22:35 ` Dave Jiang
2025-07-22 18:23 ` Bowman, Terry
2025-06-26 22:42 ` [PATCH v10 15/17] CXL/PCI: Introduce CXL Port " Terry Bowman
2025-06-26 22:42 ` [PATCH v10 16/17] CXL/PCI: Enable CXL protocol errors during CXL Port probe Terry Bowman
2025-06-26 22:42 ` [PATCH v10 17/17] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup Terry Bowman
2025-07-23 21:55 ` [PATCH v10 00/17] Enable CXL PCIe Port Protocol Error handling and logging dan.j.williams
2025-07-24 15:58 ` Bowman, Terry
2025-08-18 15:18 ` Joshua Hahn
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