Re: [RFC PATCH v2 0/2] PCI/CXL: Add RDPAS support for CXL.io

["Dan Williams (nvidia)" <djbw@kernel.org>]

Dave Jiang wrote:
> v2:
> - Added multiple DSP per RCEC support.
> - Added boundary checks for reading MMIO
> - Addressed issues raised by shashiko
> - See individual patches for detailed changes
> 
> The series add RCEC Downstream Port Assocation Structure (RDPAS) parsing
> support to CXL.io. RDPAS is an ACPI table that is part of the CXL Early
> Discovery Table (CEDT) defined in CXL specification r4.0 9.18.1.5. It
> provides the mapping between RCEC and downstream ports. With RDPAS, the
> error device can be directly found when an error is reported on RCEC,
> without walking a number of RCiEP in order to determine which one reported
> the error. While CXL.cachemem is supported by RDPAS, there is no easy way
> to discover the source id of the error and therefore finding the Linux PCI
> object for the RCiEP. The intention here is to accelerate the discovery
> of the error by directly locating the error device with the given
> information.

Can you clarify why this "acceleration" matters in practice, especially
when Linux needs to be prepared for the RDPAS to not be present? Did
RDPAS ever ship on a CXL platform?

> This series is based on top of Terry's CXL error protocol series [1].
> Looking for comments on the series WRT if it makes sense to add on top
> of Terry's error handling for RCH/RCD devices.

What is the correlation with Terry's CXL.cachemem protocol series when
this implementation claims to only support CXL.io and Terry's series is
about CXL.cachemem protocol errors?