From: Alejandro Lucero Palau <alucerop@amd.com>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
alejandro.lucero-palau@amd.com
Cc: linux-cxl@vger.kernel.org, netdev@vger.kernel.org,
dan.j.williams@intel.com, martin.habets@xilinx.com,
edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
pabeni@redhat.com, edumazet@google.com
Subject: Re: [PATCH v4 01/26] cxl: add type2 device basic support
Date: Mon, 28 Oct 2024 09:37:13 +0000 [thread overview]
Message-ID: <7deb17e2-4257-1ddf-2279-32bf4f086f67@amd.com> (raw)
In-Reply-To: <20241025145012.00002d64@Huawei.com>
On 10/25/24 14:50, Jonathan Cameron wrote:
> On Thu, 17 Oct 2024 17:52:00 +0100
> <alejandro.lucero-palau@amd.com> wrote:
>
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Differentiate Type3, aka memory expanders, from Type2, aka device
>> accelerators, with a new function for initializing cxl_dev_state.
>>
>> Create accessors to cxl_dev_state to be used by accel drivers.
>>
>> Based on previous work by Dan Williams [1]
>>
>> Link: [1] https://lore.kernel.org/linux-cxl/168592160379.1948938.12863272903570476312.stgit@dwillia2-xfh.jf.intel.com/
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> Co-developed-by: Dan Williams <dan.j.williams@intel.com>
> Hi Alejandro,
>
> A couple of trivial comments inline on things that that would be good to tidy up.
>
>> ---
>> drivers/cxl/core/memdev.c | 52 +++++++++++++++++++++++++++++++++++++++
>> drivers/cxl/core/pci.c | 1 +
>> drivers/cxl/cxlpci.h | 16 ------------
>> drivers/cxl/pci.c | 13 +++++++---
>> include/linux/cxl/cxl.h | 21 ++++++++++++++++
>> include/linux/cxl/pci.h | 23 +++++++++++++++++
>> 6 files changed, 106 insertions(+), 20 deletions(-)
>> create mode 100644 include/linux/cxl/cxl.h
>> create mode 100644 include/linux/cxl/pci.h
>>
>> diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
>> index 0277726afd04..94b8a7b53c92 100644
>> --- a/drivers/cxl/core/memdev.c
>> +++ b/drivers/cxl/core/memdev.c
>> +int cxl_set_resource(struct cxl_dev_state *cxlds, struct resource res,
>> + enum cxl_resource type)
>> +{
>> + switch (type) {
>> + case CXL_RES_DPA:
>> + cxlds->dpa_res = res;
>> + return 0;
>> + case CXL_RES_RAM:
>> + cxlds->ram_res = res;
>> + return 0;
>> + case CXL_RES_PMEM:
>> + cxlds->pmem_res = res;
>> + return 0;
>> + }
>> +
>> + dev_err(cxlds->dev, "unknown resource type (%u)\n", type);
> Given it's an enum and only enum values are ever passed to it, we should never
> get here as they are all handled above.
>
> So maybe drop? Then if an another type is added we will get a build
> warning.
OK. I'll do that.
>> + return -EINVAL;
>> +}
>> +EXPORT_SYMBOL_NS_GPL(cxl_set_resource, CXL);
>> +
>> static int cxl_memdev_release_file(struct inode *inode, struct file *file)
>> {
>> struct cxl_memdev *cxlmd =
>> diff --git a/include/linux/cxl/cxl.h b/include/linux/cxl/cxl.h
>> new file mode 100644
>> index 000000000000..c06ca750168f
>> --- /dev/null
>> +++ b/include/linux/cxl/cxl.h
>> @@ -0,0 +1,21 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/* Copyright(c) 2024 Advanced Micro Devices, Inc. */
>> +
>> +#ifndef __CXL_H
>> +#define __CXL_H
>> +
>> +#include <linux/device.h>
> I'd avoid this if possible and use a forwards definition for
> struct device;
> Also needed for
> struct cxl_dev_state;
> And an include needed for linux/ioport.h for the struct
> resource.
Right. And I'm adding another include later on in this patchset that
makes this one unnecessary.
I guess the problematic thing is to refer to that core device header
directly which makes things suspicious.
I'll change it.
Thanks!
>
>> +
>> +enum cxl_resource {
>> + CXL_RES_DPA,
>> + CXL_RES_RAM,
>> + CXL_RES_PMEM,
>> +};
>> +
>> +struct cxl_dev_state *cxl_accel_state_create(struct device *dev);
>> +
>> +void cxl_set_dvsec(struct cxl_dev_state *cxlds, u16 dvsec);
>> +void cxl_set_serial(struct cxl_dev_state *cxlds, u64 serial);
>> +int cxl_set_resource(struct cxl_dev_state *cxlds, struct resource res,
>> + enum cxl_resource);
>> +#endif
next prev parent reply other threads:[~2024-10-28 9:37 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-17 16:51 [PATCH v4 00/26] cxl: add Type2 device support alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 01/26] cxl: add type2 device basic support alejandro.lucero-palau
2024-10-25 13:50 ` Jonathan Cameron
2024-10-28 9:37 ` Alejandro Lucero Palau [this message]
2024-10-28 18:05 ` Dave Jiang
2024-10-30 16:26 ` Alejandro Lucero Palau
2024-10-17 16:52 ` [PATCH v4 02/26] sfc: add cxl support using new CXL API alejandro.lucero-palau
2024-10-17 21:48 ` Ben Cheatham
2024-10-18 13:38 ` Alejandro Lucero Palau
2024-10-25 14:03 ` Jonathan Cameron
2024-10-28 11:59 ` Alejandro Lucero Palau
2024-10-29 15:14 ` Jonathan Cameron
2024-10-30 16:31 ` Alejandro Lucero Palau
2024-10-17 16:52 ` [PATCH v4 03/26] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-10-25 14:14 ` Jonathan Cameron
2024-10-28 12:00 ` Alejandro Lucero Palau
2024-10-28 18:19 ` Dave Jiang
2024-10-30 16:28 ` Alejandro Lucero Palau
2024-10-17 16:52 ` [PATCH v4 04/26] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-10-25 10:16 ` Alejandro Lucero Palau
2024-10-25 14:16 ` Jonathan Cameron
2024-10-17 16:52 ` [PATCH v4 05/26] cxl: move pci generic code alejandro.lucero-palau
2024-10-17 21:49 ` Ben Cheatham
2024-10-18 9:35 ` Alejandro Lucero Palau
2024-10-17 16:52 ` [PATCH v4 06/26] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-10-17 21:49 ` Ben Cheatham
2024-10-17 16:52 ` [PATCH v4 07/26] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2024-10-17 21:49 ` Ben Cheatham
2024-10-18 15:07 ` Alejandro Lucero Palau
2024-10-17 16:52 ` [PATCH v4 08/26] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-10-17 21:49 ` Ben Cheatham
2024-10-18 14:58 ` Alejandro Lucero Palau
2024-10-18 16:40 ` Ben Cheatham
2024-10-17 16:52 ` [PATCH v4 09/26] sfc: request cxl ram resource alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 10/26] cxl: harden resource_contains checks to handle zero size resources alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 11/26] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 12/26] sfc: set cxl media ready alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 13/26] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2024-10-17 21:49 ` Ben Cheatham
2024-10-18 10:49 ` Alejandro Lucero Palau
2024-10-18 16:40 ` Ben Cheatham
2024-10-17 16:52 ` [PATCH v4 14/26] sfc: create type2 cxl memdev alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 15/26] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 16/26] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 17/26] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 18/26] sfc: get endpoint decoder alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 19/26] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 20/26] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 21/26] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 22/26] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-10-17 21:49 ` Ben Cheatham
2024-10-18 8:51 ` Alejandro Lucero Palau
2024-10-18 16:40 ` Ben Cheatham
2024-10-21 9:54 ` Alejandro Lucero Palau
2024-10-17 16:52 ` [PATCH v4 23/26] sfc: create cxl region alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 24/26] cxl: preclude device memory to be used for dax alejandro.lucero-palau
2024-10-17 21:50 ` Ben Cheatham
2024-10-18 8:10 ` Alejandro Lucero Palau
2024-10-17 16:52 ` [PATCH v4 25/26] cxl: add function for obtaining params from a region alejandro.lucero-palau
2024-10-17 16:52 ` [PATCH v4 26/26] sfc: support pio mapping based on cxl alejandro.lucero-palau
2024-10-23 8:46 ` [PATCH v4 00/26] cxl: add Type2 device support Paolo Abeni
2024-10-23 9:38 ` Alejandro Lucero Palau
2024-11-20 16:50 ` Should the CXL Type2 support patchset be split up? Alejandro Lucero Palau
2024-11-20 17:13 ` Dave Jiang
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