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X-CSE-ConnectionGUID: eauBPwQxT2iSarOhal4YKg== X-CSE-MsgGUID: 3R8TiVAtQYyR9X7Yaqg10g== X-IronPort-AV: E=McAfee;i="6800,10657,11833"; a="106367578" X-IronPort-AV: E=Sophos;i="6.24,234,1774335600"; d="scan'208";a="106367578" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2026 13:50:55 -0700 X-CSE-ConnectionGUID: yX4gzo/US1a3D2NJDcsLsw== X-CSE-MsgGUID: /uZJD8qGRkWbNE/Kr9wEmw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,234,1774335600"; d="scan'208";a="252485842" Received: from dnelso2-mobl.amr.corp.intel.com (HELO [10.125.109.254]) ([10.125.109.254]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2026 13:50:54 -0700 Message-ID: <9348b298-c3d4-4e32-b99d-7ebf1cc49d49@intel.com> Date: Tue, 30 Jun 2026 13:50:53 -0700 Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 0/7] cxl: Add CXL type2 accelerator support for cxl_test From: Dave Jiang To: linux-cxl@vger.kernel.org Cc: djbw@kernel.org, dave@stgolabs.net, jic23@kernel.org, alison.schofield@intel.com, vishal.l.verma@intel.com References: <20260629221104.3891733-1-dave.jiang@intel.com> Content-Language: en-US In-Reply-To: <20260629221104.3891733-1-dave.jiang@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 6/29/26 3:10 PM, Dave Jiang wrote: > v7 > - Fixed sachiko raised issues > > Based against v7.2-rc1 and sits on top of the the immutable branch [1] > for type 2. > > See individual patches for changes from previous version. > Fixed up sashiko reported issues. > > Series adds a 'type2_test' module parameter where it setup a mock type2 > hierarchy with a mock type2 accelerator device directly under a root > port that has an auto region setup. > > It also includes a CXL fix that was encountered when running tests with > the new code. > > [ > { > "memdevs":[ > { > "memdev":"mem0", > "ram_size":536870912, > "ram_qos_class":42, > "host":"cxl_type2_accel.0", > "poison_injectable":false > } > ] > }, > { > "regions":[ > { > "region":"region0", > "resource":70300293136384, > "size":536870912, > "type":"ram", > "interleave_ways":1, > "interleave_granularity":4096, > "decode_state":"commit" > } > ] > } > ] > > "root decoders":[ > { > "decoder":"decoder0.0", > "resource":70300293136384, > "size":1073741824, > "interleave_ways":1, > "accelmem_capable":true, > "qos_class":42, > "nr_targets":1 > }, > > [1]: https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git/log/?h=for-7.3/cxl-type2-support > > Dave Jiang (7): > cxl/test: Add test for module parameters > cxl/test: Add type2 support for mock CFMWS0 > cxl/test: Refactor platform device enumerations > cxl/test: Add hierarchy enumeration support for type2 device > cxl/test: Propagate -ENOMEM on platform_device_alloc() failures > cxl/test: Fixup hdm init for auto region to support type2 > cxl/test: Add cxl_test accelerator driver > > tools/testing/cxl/test/Kbuild | 2 + > tools/testing/cxl/test/accel.c | 66 +++ > tools/testing/cxl/test/cxl.c | 850 ++++++++++++++++++++++------- > tools/testing/cxl/test/hmem_test.c | 3 +- > tools/testing/cxl/test/mock.h | 2 + > 5 files changed, 720 insertions(+), 203 deletions(-) > create mode 100644 tools/testing/cxl/test/accel.c > > > base-commit: 96ddf1af34f5f9e29891a5bfb7a18dd0a5bab9d6 Applied to cxl/next with change from Alison 1c6b4ceafc3b cxl/test: Add cxl_test accelerator driver b3df5a5a38c3 cxl/test: Fixup hdm init for auto region to support type2 98ba41c3236b cxl/test: Propagate -ENOMEM on platform_device_alloc() failures 6b2e585142e6 cxl/test: Add hierarchy enumeration support for type2 device a6d37152d284 cxl/test: Refactor platform device enumerations fc8fc576d909 cxl/test: Add type2 support for mock CFMWS0 afae0fa7c6b1 cxl/test: Add test for module parameters