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From: Dave Jiang <dave.jiang@intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: linux-kernel <linux-kernel@vger.kernel.org>,
	"linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
	Dan Williams <dan.j.williams@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Davidlohr Bueso <dave@stgolabs.net>,
	Ira Weiny <ira.weiny@intel.com>,
	Alison Schofield <alison.schofield@intel.com>
Subject: [GIT PULL] Compute Express Link (CXL) changes for 6.14
Date: Wed, 29 Jan 2025 09:28:11 -0700	[thread overview]
Message-ID: <96c924e7-a684-45c9-b23d-6401ae727159@intel.com> (raw)

Hi Linus, please pull from
  
git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-6.14

...to receive a small set of changes for CXL for v6.14.  The changes includes
a tweak to the HMAT output that was acked by Rafael, a prep patch for CXL type2
devices support that's coming soon, refactoring of the CXL regblock
enumeration code, and a series of patches to update the event records to CXL
spec r3.1.

These all have appeared in -next for a few days with no reported issues.

---

The following changes since commit fc033cf25e612e840e545f8d5ad2edd6ba613ed5:

  Linux 6.13-rc5 (2024-12-29 13:15:45 -0800)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-6.14

for you to fetch changes up to 448a60e85ae2afe2cb760f5d2ed2c8a49d2bd1b4:

  cxl/core/regs: Refactor out functions to count regblocks of given type (2025-01-22 08:55:21 -0700)

----------------------------------------------------------------
cxl changes for v6.14

- Move HMAT printouts to pr_debug()
- Add CXL type2 support to cxl_dvsec_rr_decode() in preparation for
  type2 support
- A series that updates CXL event records to spec r3.1 and related
  changes
- Refactoring of cxl_find_regblock_instance() to count regblocks

----------------------------------------------------------------
Alejandro Lucero (1):
      cxl/pci: Add CXL Type 1/2 support to cxl_dvsec_rr_decode()

Dan Williams (1):
      ACPI/HMAT: Move HMAT messages to pr_debug()

Huaisheng Ye (1):
      cxl/core/regs: Refactor out functions to count regblocks of given type

Shiju Jose (6):
      cxl/events: Update Common Event Record to CXL spec rev 3.1
      cxl/events: Add Component Identifier formatting for CXL spec rev 3.1
      cxl/events: Update General Media Event Record to CXL spec rev 3.1
      cxl/events: Update DRAM Event Record to CXL spec rev 3.1
      cxl/events: Update Memory Module Event Record to CXL spec rev 3.1
      cxl/test: Update test code for event records to CXL spec rev 3.1

 drivers/acpi/numa/hmat.c      |  24 ++--
 drivers/cxl/core/pci.c        |   6 +-
 drivers/cxl/core/regs.c       |  56 +++++----
 drivers/cxl/core/trace.h      | 259 +++++++++++++++++++++++++++++++++++-------
 drivers/cxl/cxl.h             |   6 +-
 drivers/cxl/pci.c             |   6 +-
 drivers/cxl/port.c            |   2 +-
 include/cxl/event.h           |  28 +++--
 tools/testing/cxl/test/mem.c  |  23 +++-
 tools/testing/cxl/test/mock.c |   6 +-
 10 files changed, 319 insertions(+), 97 deletions(-)

             reply	other threads:[~2025-01-29 16:28 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-29 16:28 Dave Jiang [this message]
2025-01-29 20:00 ` [GIT PULL] Compute Express Link (CXL) changes for 6.14 pr-tracker-bot

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