Re: [LSF/MM/BPF TOPIC] [RFC PATCH 0/4] mm/mempolicy: introduce socket-aware weighted interleave

Rakie Kim
2026-03-30T02:59:25Z

On Thu, 26 Mar 2026 15:24:26 -0700 Dave Jiang <dave.jiang@intel.com> wrote:
>
>
> On 3/23/26 10:35 PM, Rakie Kim wrote:
> > On Fri, 20 Mar 2026 16:56:05 +0000 Jonathan Cameron <jonathan.cameron@huawei.com> wrote:
> >>
> < --snip-- >
>
> >
> > The HMAT latencies and bandwidths are present, but the values seem
> > broken. Here is the latency table:
> >
> > Init->Target | node0 | node1 | node2 | node3
> > node0 | 0x38B | 0x89F | 0x9C4 | 0x3AFC
> > node1 | 0x89F | 0x38B | 0x3AFC| 0x4268
>
> Do you have the iasl -d outputs of the SRAT and the HMAT somewhere we can look at?
>
> DJ
>

Hello Dave,

Posting the entire ACPI dump would be too long for the list.
Instead, I have extracted the relevant structures from the `iasl -d`
output for the local memory (PXM 0, 1) and CXL memory nodes (PXM A, B).

Here is the truncated `HMAT.dsl` showing the core topology mappings
and the latency matrix we are discussing:

----------------------------------------------------------------------
[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table]
[004h 0004 4] Table Length : 00000668
[008h 0008 1] Revision : 02
[009h 0009 1] Checksum : 6A
[00Ah 0010 6] Oem ID : "GBT "
[010h 0016 8] Oem Table ID : "GBTUACPI"
[018h 0024 4] Oem Revision : 01072009
[01Ch 0028 4] Asl Compiler ID : "AMI "
[020h 0032 4] Asl Compiler Revision : 20230628

[024h 0036 4] Reserved : 00000000

[028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes]
[02Ah 0042 2] Reserved : 0000
[02Ch 0044 4] Length : 00000028
[030h 0048 2] Flags (decoded below) : 0001
Processor Proximity Domain Valid : 1
[032h 0050 2] Reserved1 : 0000
[034h 0052 4] Attached Initiator Proximity Domain : 00000000
[038h 0056 4] Memory Proximity Domain : 00000000

...

[050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes]
[052h 0082 2] Reserved : 0000
[054h 0084 4] Length : 00000028
[058h 0088 2] Flags (decoded below) : 0001
Processor Proximity Domain Valid : 1
[05Ah 0090 2] Reserved1 : 0000
[05Ch 0092 4] Attached Initiator Proximity Domain : 00000001
[060h 0096 4] Memory Proximity Domain : 00000001

...

[078h 0120 2] Structure Type : 0000 [Memory Proximity Domain Attributes]
[07Ah 0122 2] Reserved : 0000
[07Ch 0124 4] Length : 00000028
[080h 0128 2] Flags (decoded below) : 0000
Processor Proximity Domain Valid : 0
[082h 0130 2] Reserved1 : 0000
[084h 0132 4] Attached Initiator Proximity Domain : 00000000
[088h 0136 4] Memory Proximity Domain : 0000000A

...

[0A0h 0160 2] Structure Type : 0000 [Memory Proximity Domain Attributes]
[0A2h 0162 2] Reserved : 0000
[0A4h 0164 4] Length : 00000028
[0A8h 0168 2] Flags (decoded below) : 0000
Processor Proximity Domain Valid : 0
[0AAh 0170 2] Reserved1 : 0000
[0ACh 0172 4] Attached Initiator Proximity Domain : 00000000
[0B0h 0176 4] Memory Proximity Domain : 0000000B

...

[0C8h 0200 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information]
[0CAh 0202 2] Reserved : 0000
[0CCh 0204 4] Length : 00000168
[0D0h 0208 1] Flags (decoded below) : 00
Memory Hierarchy : 0
[0D1h 0209 1] Data Type : 01
[0D2h 0210 2] Reserved1 : 0000
[0D4h 0212 4] Initiator Proximity Domains # : 0000000A
[0D8h 0216 4] Target Proximity Domains # : 0000000C

...

[140h 0320 2] Entry : 038B
[142h 0322 2] Entry : 089F
[144h 0324 2] Entry : 09C4
[146h 0326 2] Entry : 09C4
[148h 0328 2] Entry : 09C4
[14Ah 0330 2] Entry : 09C4
[14Ch 0332 2] Entry : 157C
[14Eh 0334 2] Entry : 157C
[150h 0336 2] Entry : 157C
[152h 0338 2] Entry : 157C
[154h 0340 2] Entry : 3AFC
[156h 0342 2] Entry : 4268
[158h 0344 2] Entry : 089F
[15Ah 0346 2] Entry : 038B
[15Ch 0348 2] Entry : 157C
[15Eh 0350 2] Entry : 157C
[160h 0352 2] Entry : 157C
[162h 0354 2] Entry : 157C
[164h 0356 2] Entry : 09C4
[166h 0358 2] Entry : 09C4
[168h 0360 2] Entry : 09C4
[16Ah 0362 2] Entry : 09C4
[16Ch 0364 2] Entry : 4268
[16Eh 0366 2] Entry : 3AFC
----------------------------------------------------------------------

And here is the relevant extraction from `SRAT.dsl`. As you suspected,
the CXL memory ranges are indeed statically defined in the SRAT at boot:

----------------------------------------------------------------------
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 0000A1F8
[008h 0008 1] Revision : 03
[009h 0009 1] Checksum : 54
[00Ah 0010 6] Oem ID : "GBT "
[010h 0016 8] Oem Table ID : "GBTUACPI"
[018h 0024 4] Oem Revision : 00000002
[01Ch 0028 4] Asl Compiler ID : "AMI "
[020h 0032 4] Asl Compiler Revision : 20230628

[024h 0036 4] Table Revision : 00000001
[028h 0040 8] Reserved : 0000000000000000

[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity]
[031h 0049 1] Length : 10

[032h 0050 1] Proximity Domain Low(8) : 00
[033h 0051 1] Apic ID : FF
[034h 0052 4] Flags (decoded below) : 00000000
Enabled : 0
[038h 0056 1] Local Sapic EID : 00
[039h 0057 3] Proximity Domain High(24) : 000000
[03Ch 0060 4] Clock Domain : 00000000

[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity]
[041h 0065 1] Length : 10

[042h 0066 1] Proximity Domain Low(8) : 00
[043h 0067 1] Apic ID : FF
[044h 0068 4] Flags (decoded below) : 00000000
Enabled : 0
[048h 0072 1] Local Sapic EID : 00

...

[A1A8h 41384 1] Subtable Type : 01 [Memory Affinity]
[A1A9h 41385 1] Length : 28

[A1AAh 41386 4] Proximity Domain : 0000000A
[A1AEh 41390 2] Reserved1 : 0000
[A1B0h 41392 8] Base Address : 000000C040000000
[A1B8h 41400 8] Address Length : 0000010000000000
[A1C0h 41408 4] Reserved2 : 00000000
[A1C4h 41412 4] Flags (decoded below) : 0000000B
Enabled : 1

[A1D0h 41424 1] Subtable Type : 01 [Memory Affinity]
[A1D1h 41425 1] Length : 28

[A1D2h 41426 4] Proximity Domain : 0000000B
[A1D6h 41430 2] Reserved1 : 0000
[A1D8h 41432 8] Base Address : 0000071E40000000
[A1E0h 41440 8] Address Length : 0000010000000000
[A1E8h 41448 4] Reserved2 : 00000000
[A1ECh 41452 4] Flags (decoded below) : 0000000B
Enabled : 1
----------------------------------------------------------------------

Rakie Kim
>