messages from 2024-10-24 14:15:05 to 2024-10-30 17:58:21 UTC [more...]
[PATCH v5 00/27] DCD: Add support for Dynamic Capacity Devices (DCD)
2024-10-30 17:58 UTC (38+ messages)
` [PATCH v5 01/27] range: Add range_overlaps()
` [PATCH v5 02/27] ACPI/CDAT: Add CDAT/DSMAS shared and read only flag values
` [PATCH v5 03/27] dax: Document struct dev_dax_range
` [PATCH v5 04/27] cxl/pci: Delay event buffer allocation
` [PATCH v5 05/27] cxl/hdm: Use guard() in cxl_dpa_set_mode()
` [PATCH v5 06/27] cxl/region: Refactor common create region code
` [PATCH v5 07/27] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD)
` [PATCH v5 08/27] cxl/mem: Read dynamic capacity configuration from the device
` [PATCH v5 09/27] cxl/core: Separate region mode from decoder mode
` [PATCH v5 10/27] cxl/region: Add dynamic capacity decoder and region modes
` [PATCH v5 11/27] cxl/hdm: Add dynamic capacity size support to endpoint decoders
` [PATCH v5 12/27] cxl/cdat: Gather DSMAS data for DCD regions
` [PATCH v5 13/27] cxl/mem: Expose DCD partition capabilities in sysfs
` [PATCH v5 14/27] cxl/port: Add endpoint decoder DC mode support to sysfs
` [PATCH v5 15/27] cxl/region: Add sparse DAX region support
` [PATCH v5 16/27] cxl/events: Split event msgnum configuration from irq setup
` [PATCH v5 17/27] cxl/pci: Factor out interrupt policy check
` [PATCH v5 18/27] cxl/mem: Configure dynamic capacity interrupts
` [PATCH v5 19/27] cxl/core: Return endpoint decoder information from region search
` [PATCH v5 20/27] cxl/extent: Process DCD events and realize region extents
` [PATCH v5 21/27] cxl/region/extent: Expose region extent information in sysfs
` [PATCH v5 22/27] dax/bus: Factor out dev dax resize logic
` [PATCH v5 23/27] dax/region: Create resources on sparse DAX regions
` [PATCH v5 24/27] cxl/region: Read existing extents on region creation
` [PATCH v5 25/27] cxl/mem: Trace Dynamic capacity Event Record
` [PATCH v5 26/27] tools/testing/cxl: Make event logs dynamic
` [PATCH v5 27/27] tools/testing/cxl: Add DC Regions to mock mem data
[RFC v2] cxl: Update Soft Reserved resources upon region creation
2024-10-30 17:27 UTC
[PATCH v14 00/14] EDAC: Scrub: introduce generic EDAC RAS control feature driver + CXL/ACPI-RAS2 drivers
2024-10-30 16:46 UTC (30+ messages)
` [PATCH v14 01/14] EDAC: Add support for EDAC device features control
` [PATCH v14 02/14] EDAC: Add scrub control feature
` [PATCH v14 03/14] EDAC: Add ECS "
` [PATCH v14 04/14] cxl: Add Get Supported Features command for kernel usage
` [PATCH v14 05/14] cxl/mbox: Add GET_FEATURE mailbox command
` [PATCH v14 06/14] cxl/mbox: Add SET_FEATURE "
` [PATCH v14 07/14] cxl/memfeature: Add CXL memory device patrol scrub control feature
` [PATCH v14 08/14] cxl/memfeature: Add CXL memory device ECS "
` [PATCH v14 09/14] ACPI:RAS2: Add ACPI RAS2 driver
` [PATCH v14 10/14] ras: mem: Add memory "
` [PATCH v14 11/14] EDAC: Add memory repair control feature
` [PATCH v14 12/14] cxl/mbox: Add support for PERFORM_MAINTENANCE mailbox command
` [PATCH v14 13/14] cxl/memfeature: Add CXL memory device sPPR control feature
` [PATCH v14 14/14] cxl/memfeature: Add CXL memory device memory sparing "
[PATCH v4 0/3] memory,x86,acpi: hotplug memory alignment advisement
2024-10-30 16:35 UTC (11+ messages)
` [PATCH v4 1/3] memory: implement memory_block_advise/probe_max_size
` [PATCH v4 2/3] x86: probe memory block size advisement value during mm init
` [PATCH v4 3/3] acpi,srat: give memory block size advice based on CFMWS alignment
[PATCH v4 00/26] cxl: add Type2 device support
2024-10-30 16:31 UTC (19+ messages)
` [PATCH v4 01/26] cxl: add type2 device basic support
` [PATCH v4 02/26] sfc: add cxl support using new CXL API
` [PATCH v4 03/26] cxl: add capabilities field to cxl_dev_state and cxl_port
` [PATCH v4 04/26] cxl/pci: add check for validating capabilities
[PATCH v2 0/14] Enable CXL PCIe port protocol error handling and logging
2024-10-30 16:11 UTC (34+ messages)
` [PATCH v2 01/14] PCI/AER: Introduce 'struct cxl_err_handlers' and add to 'struct pci_driver'
` [PATCH v2 02/14] PCI/AER: Rename AER driver's interfaces to also indicate CXL PCIe port support
` [PATCH v2 03/14] cxl/pci: Introduce helper functions pcie_is_cxl() and pcie_is_cxl_port()
` [PATCH v2 04/14] PCI/AER: Modify AER driver logging to report CXL or PCIe bus error type
` [PATCH v2 05/14] PCI/AER: Add CXL PCIe port correctable error support in AER service driver
` [PATCH v2 06/14] PCI/AER: Change AER driver to read UCE fatal status for all CXL PCIe port devices
` [PATCH v2 07/14] PCI/AER: Add CXL PCIe port uncorrectable error recovery in AER service driver
` [PATCH v2 08/14] cxl/pci: Change find_cxl_ports() to non-static
` [PATCH v2 09/14] cxl/pci: Map CXL PCIe root port and downstream switch port RAS registers
` [PATCH v2 10/14] cxl/pci: Map CXL PCIe upstream "
` [PATCH v2 11/14] cxl/pci: Rename RAS handler interfaces to also indicate CXL PCIe port support
` [PATCH v2 12/14] cxl/pci: Add error handler for CXL PCIe port RAS errors
` [PATCH v2 13/14] cxl/pci: Add trace logging "
` [PATCH v2 14/14] cxl/pci: Add support to assign and clear pci_driver::cxl_err_handlers
` [PATCH v2 0/14] Applies to Base commit: 8cf0b93919e1 (tag: v6.12-rc2) Linux 6.12-rc2
[PATCH qemu 0/6] hw/cxl: Link speed and width control
2024-10-30 13:04 UTC (7+ messages)
` [PATCH 1/6] hw/pci-bridge/cxl_root_port: Provide x-speed and x-width properties
` [PATCH 2/6] hw/pci-bridge/cxl_upstream: "
[RFC 00/13] vfio: introduce vfio-cxl to support CXL type-2 accelerator passthrough
2024-10-30 11:56 UTC (2+ messages)
[PATCH v2 0/4] printf: Add struct range print specifier
2024-10-30 10:51 UTC (11+ messages)
` [PATCH v2 1/4] test printf: Add very basic struct resource tests
` [PATCH v2 2/4] Documentation/printf: struct resource add start == end special case
` [PATCH v2 3/4] printf: Add print format (%pra) for struct range
` [PATCH v2 4/4] cxl/cdat: Use %pra for dpa range outputs
[PATCH v6 0/3] hw/{i2c,nvme}: mctp endpoint, nvme management interface model
2024-10-30 6:01 UTC (2+ messages)
[PATCH 00/12] fs/dax: Fix FS DAX page reference counts
2024-10-30 5:57 UTC (10+ messages)
` [PATCH 10/12] fs/dax: Properly refcount fs dax pages
[RFC PATCH 0/6] acpi/hmat / cxl: Add exclusive caching enumeration and RAS support
2024-10-29 22:55 UTC (14+ messages)
` [RFC PATCH 2/6] acpi: numa: Add support to enumerate and store extended linear address mode
` [RFC PATCH 3/6] acpi/hmat / cxl: Add extended linear cache support for CXL
` [RFC PATCH 4/6] acpi/hmat: Add helper functions to provide extended linear cache translation
[PATCH v6 00/15] acpi: NUMA nodes for CXL HB as GP + complex NUMA test
2024-10-29 10:25 UTC (2+ messages)
[cxl:next] BUILD SUCCESS 86bcd81d66d63c549e98c9c502ccd3be01a52fe2
2024-10-29 10:22 UTC
[RFC] [Design] Planning the famfs port into fs/fuse
2024-10-29 1:13 UTC
[RFC] resource: Avoid unnecessary resource tree walking in __region_intersects()
2024-10-28 2:49 UTC (14+ messages)
[PATCH] [RFC] cxl/region: Fix region creation for greater than x2 switches
2024-10-27 7:57 UTC
[cxl:next] BUILD SUCCESS 75c301e57dc1582f62da091e63739d38e0d2e6be
2024-10-26 17:56 UTC
[cxl:fixes] BUILD SUCCESS 3a2b97b3210bd5758f66fad04c5171f85a016a04
2024-10-26 10:45 UTC
Why does cxl zero-label command fail on my QEMU CXL environment?
2024-10-26 9:13 UTC (5+ messages)
[PATCH] cxl: downgrade a warning message to debug level in cxl_probe_component_regs()
2024-10-25 22:00 UTC (3+ messages)
[PATCH v2 0/6] cxl: Initialization and shutdown fixes
2024-10-25 19:32 UTC (21+ messages)
` [PATCH v2 1/6] cxl/port: Fix CXL port initialization order when the subsystem is built-in
` [PATCH v3 "
` [PATCH v2 2/6] cxl/port: Fix cxl_bus_rescan() vs bus_rescan_devices()
` [PATCH v2 3/6] cxl/acpi: Ensure ports ready at cxl_acpi_probe() return
` [PATCH v2 4/6] cxl/port: Fix use-after-free, permit out-of-order decoder shutdown
` [PATCH v2 5/6] cxl/port: Prevent out-of-order decoder allocation
` [PATCH v2 6/6] cxl/test: Improve init-order fidelity relative to real-world systems
CXL related lockdep splats with 6.12-rc4
2024-10-25 16:22 UTC (3+ messages)
[PATCH v3 0/6] Update Event Records to CXL spec rev 3.1
2024-10-25 12:50 UTC (9+ messages)
` [PATCH v3 1/6] cxl/events: Update Common Event Record "
` [PATCH v3 2/6] cxl/events: Add Component Identifier formatting for "
` [PATCH v3 3/6] cxl/events: Update General Media Event Record to "
` [PATCH v3 4/6] cxl/events: Update DRAM "
` [PATCH v3 5/6] cxl/events: Update Memory Module "
` [PATCH v3 6/6] cxl/test: Update test code for event records "
[PATCH v4 00/28] DCD: Add support for Dynamic Capacity Devices (DCD)
2024-10-25 12:42 UTC (5+ messages)
` [PATCH v4 02/28] printk: Add print format (%pra) for struct range
[PATCH 0/15] Enable CXL PCIe port protocol error handling and logging
2024-10-24 19:10 UTC (9+ messages)
` [PATCH 01/15] cxl/aer/pci: Add CXL PCIe port error handler callbacks in AER service driver
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