messages from 2025-01-15 05:45:31 to 2025-01-22 18:02:33 UTC [more...]
[PATCH v8 00/21] DCD: Add support for Dynamic Capacity Devices (DCD)
2025-01-22 18:02 UTC (10+ messages)
` [PATCH v8 02/21] cxl/mem: Read dynamic capacity configuration from the device
[PATCH v2 0/5] cxl: DPA partition metadata is a mess
2025-01-22 17:42 UTC (11+ messages)
` [PATCH v2 1/5] cxl: Remove the CXL_DECODER_MIXED mistake
` [PATCH v2 2/5] cxl: Introduce to_{ram,pmem}_{res,perf}() helpers
` [PATCH v2 3/5] cxl: Introduce 'struct cxl_dpa_partition' and 'struct cxl_range_info'
` [PATCH v2 4/5] cxl: Make cxl_dpa_alloc() DPA partition number agnostic
` [PATCH v2 5/5] cxl: Kill enum cxl_decoder_mode
[PATCH v5 0/1] cxl/core/regs: Refactor out functions to count regblocks of given type
2025-01-22 16:37 UTC (5+ messages)
` [PATCH v5 1/1] "
[PATCH v18 00/19] EDAC: Scrub: introduce generic EDAC RAS control feature driver + CXL/ACPI-RAS2 drivers
2025-01-22 15:38 UTC (10+ messages)
` [PATCH v18 04/19] EDAC: Add memory repair control feature
` [PATCH v18 05/19] ACPI:RAS2: Add ACPI RAS2 driver
` [PATCH v18 06/19] ras: mem: Add memory "
[PATCH v9 00/27] cxl: add type2 device basic support
2025-01-22 9:41 UTC (49+ messages)
` [PATCH v9 02/27] sfc: add cxl support using new CXL API
` [PATCH v9 03/27] cxl: add capabilities field to cxl_dev_state and cxl_port
` [PATCH v9 04/27] cxl/pci: add check for validating capabilities
` [PATCH v9 05/27] cxl: move pci generic code
` [PATCH v9 06/27] cxl: add function for type2 cxl regs setup
` [PATCH v9 07/27] sfc: use cxl api for regs setup and checking
` [PATCH v9 09/27] sfc: request cxl ram resource
` [PATCH v9 10/27] resource: harden resource_contains
` [PATCH v9 13/27] cxl: prepare memdev creation for type2
` [PATCH v9 14/27] sfc: create type2 cxl memdev
` [PATCH v9 15/27] cxl: define a driver interface for HPA free space enumeration
[PATCH v2 0/4] Add managed SOFT RESERVE resource handling
2025-01-22 6:03 UTC (12+ messages)
` [PATCH v2 1/4] kernel/resource: Introduce managed SOFT RESERVED resources
` [PATCH v2 2/4] cxl: Update Soft Reserve resources upon region creation
` [PATCH v2 3/4] dax: Update hmem resource/device registration
` [PATCH v2 4/4] Add SOFT RESERVE resource notification chain
[PATCH 1/3] hw/mem/cxl_type3: Add paired msix_uninit_exclusive_bar() call
2025-01-22 0:56 UTC (7+ messages)
` [PATCH 2/3] hw/mem/cxl_type3: Fix special_ops memory leak on msix_init_exclusive_bar() failure
` [PATCH 3/3] hw/mem/cxl_type3: Ensure errp is set on realization failure
[PATCH v3] cxl/pci: Support Global Persistent Flush (GPF)
2025-01-21 22:28 UTC (2+ messages)
[PATCH 0/4 v2] cxl/core: Enable Region creation on x86 with Low Mem Hole
2025-01-21 20:35 UTC (4+ messages)
` [PATCH 2/4 v2] cxl/core: Add helpers to detect Low memory Holes on x86
[RFC PATCH v2 0/20] fwctl/cxl: Add CXL feature commands support via fwctl
2025-01-21 20:34 UTC (3+ messages)
[PATCH v5 0/5] acpi/ghes, cper, cxl: Process CXL CPER Protocol errors
2025-01-21 20:32 UTC (7+ messages)
` [PATCH v5 4/5] acpi/ghes, cper: Recognize and cache CXL "
` [PATCH v5 5/5] acpi/ghes, cxl/pci: Process CXL CPER Protocol Errors
[PATCH v18 04/19] EDAC: Add memory repair control feature
2025-01-21 18:16 UTC (19+ messages)
[PATCH] hw/mem: support zero memory size CXL device
2025-01-21 16:24 UTC (3+ messages)
` [PATCH v2] "
[PATCH v3 0/4] acpi/hmat / cxl: Add exclusive caching enumeration and RAS support
2025-01-21 15:14 UTC (8+ messages)
` [PATCH v3 1/4] acpi: numa: Add support to enumerate and store extended linear address mode
` [PATCH v3 2/4] acpi/hmat / cxl: Add extended linear cache support for CXL
` [PATCH v3 3/4] cxl: Add extended linear cache address alias emission for cxl events
` [PATCH v3 4/4] cxl: Add mce notifier to emit aliased address for extended linear cache
[PATCH 0/4] cxl: DPA partition metadata is a mess
2025-01-20 12:39 UTC (29+ messages)
` [PATCH 1/4] cxl: Remove the CXL_DECODER_MIXED mistake
` [PATCH 2/4] cxl: Introduce to_{ram,pmem}_{res,perf}() helpers
` [PATCH 3/4] cxl: Introduce 'struct cxl_dpa_partition' and 'struct cxl_range_info'
` [PATCH 4/4] cxl: Make cxl_dpa_alloc() DPA partition number agnostic
[PATCH v1 00/29] cxl: Add address translation support and enable AMD Zen5 platforms
2025-01-17 21:32 UTC (26+ messages)
` [PATCH v1 10/29] cxl/region: Add function to find a port's switch decoder by range
` [PATCH v1 12/29] cxl: Modify address translation callback for generic use
` [PATCH v1 15/29] cxl/region: Use an endpoint's SPA range to find a region
` [PATCH v1 16/29] cxl/region: Use translated HPA ranges to calculate the endpoint position
` [PATCH v1 19/29] cxl/region: Use endpoint's HPA range to find the port's decoder
` [PATCH v1 25/29] cxl/amd: Enable Zen5 address translation using ACPI PRMT
[PATCH RFC v2 0/1] cxl/pci: Support Global Persistent Flush (GPF)
2025-01-17 7:33 UTC (5+ messages)
` [PATCH RFC 1/1] "
[PATCH 0/1] cxl/cxl-host: Support creation of a new CXL Host Bridge
2025-01-17 11:45 UTC (3+ messages)
` [PATCH 1/1] "
[PATCH v3] hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entries_nr`
2025-01-17 11:16 UTC (4+ messages)
Assistance Needed with CXL Memory Region Creation
2025-01-17 7:00 UTC (4+ messages)
[PATCH] hw/cxl: Introduce CXL_T3_MSIX_VECTOR enumeration
2025-01-17 3:27 UTC (5+ messages)
[PATCH v6 00/26] fs/dax: Fix ZONE_DEVICE page reference counts
2025-01-17 1:54 UTC (29+ messages)
` [PATCH v6 08/26] fs/dax: Remove PAGE_MAPPING_DAX_SHARED mapping flag
` [PATCH v6 11/26] mm: Allow compound zone device pages
` [PATCH v6 13/26] mm/memory: Add vmf_insert_page_mkwrite()
` [PATCH v6 15/26] huge_memory: Add vmf_insert_folio_pud()
` [PATCH v6 16/26] huge_memory: Add vmf_insert_folio_pmd()
` [PATCH v6 19/26] proc/task_mmu: Mark devdax and fsdax pages as always unpinned
` [PATCH v6 20/26] mm/mlock: Skip ZONE_DEVICE PMDs during mlock
` [PATCH v6 23/26] mm: Remove pXX_devmap callers
[PATCH v5 0/16] Enable CXL PCIe port protocol error handling and logging
2025-01-16 21:42 UTC (34+ messages)
` [PATCH v5 03/16] CXL/PCI: Introduce PCIe helper functions pcie_is_cxl() and pcie_is_cxl_port()
` [PATCH v5 05/16] PCI/AER: Add CXL PCIe Port correctable error support in AER service driver
` [PATCH v5 07/16] PCI/AER: Add CXL PCIe Port uncorrectable error recovery "
` [PATCH v5 09/16] cxl/pci: Map CXL PCIe Upstream Switch Port RAS registers
` [PATCH v5 14/16] cxl/pci: Add trace logging for CXL PCIe Port RAS errors
` [PATCH v5 16/16] PCI/AER: Enable internal errors for CXL Upstream and Downstream Switch Ports
[ISSUE] memdev cannot be enabled after reboot due to failed dvsec range check [QEMU setup]
2025-01-16 10:46 UTC (4+ messages)
[PATCH v8 00/27] cxl: add type2 device basic support
2025-01-16 10:02 UTC (10+ messages)
` [PATCH v8 01/27] "
[PATCH v18 0/2] Export cxl1.1 device link status register value to pci device sysfs
2025-01-16 3:12 UTC (7+ messages)
` Untable to display link status of CXL1.1 device (RE: [PATCH v18 0/2] Export cxl1.1 device link status register value to pci device sysfs.)
` Unable "
[PATCH v4 1/1] cxl/core/regs: Refactor out functions to count regblocks of given type
2025-01-15 14:16 UTC (4+ messages)
[PATCH v2] hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entries_nr`
2025-01-15 13:50 UTC (5+ messages)
[RFC PATCH 0/4] CXL Hotness Monitoring Unit perf driver
2025-01-15 13:42 UTC (4+ messages)
[PATCH] cxl/port: Constify 'struct bin_attribute'
2025-01-15 13:31 UTC (4+ messages)
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