messages from 2025-08-18 15:19:13 to 2025-08-27 08:18:50 UTC [more...]
[PATCH 00/19] perf: Rework event_init checks
2025-08-27 8:18 UTC (36+ messages)
` [PATCH 01/19] perf/arm-cmn: Fix event validation
` [PATCH 02/19] perf/hisilicon: Fix group validation
` [PATCH 12/19] perf: Ignore event state for "
` [PATCH 16/19] perf: Introduce positive capability for sampling
` [PATCH 17/19] perf: Retire PERF_PMU_CAP_NO_INTERRUPT
` [PATCH 18/19] perf: Introduce positive capability for raw events
` [PATCH 19/19] perf: Garbage-collect event_init checks
[PATCH v11 00/23] Enable CXL PCIe Port Protocol Error handling and logging
2025-08-27 8:04 UTC (28+ messages)
` [PATCH v11 01/23] cxl: Remove ifdef blocks of CONFIG_PCIEAER_CXL from core/pci.c
` [PATCH v11 02/23] CXL/AER: Remove CONFIG_PCIEAER_CXL and replace with CONFIG_CXL_RAS
` [PATCH v11 03/23] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions
` [PATCH v11 04/23] cxl/pci: Remove unnecessary CXL RCH "
` [PATCH v11 05/23] cxl: Move CXL driver RCH error handling into CONFIG_CXL_RCH_RAS conditional block
` [PATCH v11 06/23] CXL/AER: Introduce rch_aer.c into AER driver for handling CXL RCH errors
` [PATCH v11 07/23] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h
` [PATCH v11 08/23] PCI/CXL: Introduce pcie_is_cxl()
` [PATCH v11 09/23] PCI/AER: Report CXL or PCIe bus error type in trace logging
` [PATCH v11 10/23] CXL/AER: Update PCI class code check to use FIELD_GET()
` [PATCH v11 11/23] cxl/pci: Update RAS handler interfaces to also support CXL Ports
` [PATCH v11 12/23] cxl/pci: Log message if RAS registers are unmapped
` [PATCH v11 13/23] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports
` [PATCH v11 14/23] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors
` [PATCH v11 15/23] cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers
` [PATCH v11 16/23] cxl/pci: Introduce CXL Endpoint protocol error handlers
` [PATCH v11 17/23] CXL/AER: Introduce cxl_aer.c into AER driver for forwarding CXL errors
` [PATCH v11 18/23] PCI/AER: Dequeue forwarded CXL error
` [PATCH v11 19/23] CXL/PCI: Introduce CXL Port protocol error handlers
` [PATCH v11 20/23] CXL/PCI: Export and rename merge_result() to pci_ers_merge_result()
` [PATCH v11 21/23] CXL/PCI: Introduce CXL uncorrectable protocol error recovery
` [PATCH v11 22/23] CXL/PCI: Enable CXL protocol errors during CXL Port probe
` [PATCH v11 23/23] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup
[PATCH v5 0/7] Add managed SOFT RESERVE resource handling
2025-08-27 6:30 UTC (10+ messages)
` [PATCH v5 3/7] cxl/acpi: Add background worker to coordinate with cxl_mem probe completion
[NDCTL PATCH v2] cxl: Add helper function to verify port is in memdev hierarchy
2025-08-27 1:06 UTC (2+ messages)
[PATCH 0/6] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL
2025-08-26 23:21 UTC (8+ messages)
` [PATCH 1/6] dax/hmem, e820, resource: Defer Soft Reserved registration until hmem is ready
` [PATCH 2/6] dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges
` [PATCH 3/6] dax/hmem, cxl: Tighten dependencies on DEV_DAX_CXL and dax_hmem
` [PATCH 4/6] dax/hmem: Defer Soft Reserved overlap handling until CXL region assembly completes
` [PATCH 5/6] dax/hmem: Reintroduce Soft Reserved ranges back into the iomem tree
` [RFC PATCH 6/6] cxl/region, dax/hmem: Guard CXL DAX region creation and tighten HMEM deps
How to programmatically discover online and offline memory and its latency and bandwidth from user space?
2025-08-26 17:31 UTC (5+ messages)
[PATCH v4] cxl: docs/driver-api/conventions resolve conflicts between CFMWS, LMH, Decoders
2025-08-26 13:49 UTC (4+ messages)
[RFC PATCH 00/18] Initial CXL.cache device support
2025-08-26 10:44 UTC (51+ messages)
` [RFC PATCH 02/18] cxl: Move struct cxl_dev_state definition
` [RFC PATCH 03/18] cxl/core: Add CXL.cache device struct
` [RFC PATCH 06/18] cxl/port, mem: Make adding an endpoint device type agnostic
` [RFC PATCH 07/18] cxl/port: Split endpoint port probe on device type
` [RFC PATCH 08/18] cxl/port: Update switch_port_probe() for CXL cache devices
` [RFC PATCH 10/18] cxl/cache: Add cxl_cache driver
` [RFC PATCH 11/18] cxl/core: Add CXL snoop filter setup and checking
` [RFC PATCH 12/18] cxl/cache: Add CXL Cache ID Route Table mapping
` [RFC PATCH 13/18] cxl/cache: Implement Cache ID Route Table programming
` [RFC PATCH 14/18] cxl/cache: Add Cache ID Decoder capability mapping
` [RFC PATCH 15/18] cxl/cache: Implement Cache ID Decoder programming
` [RFC PATCH 16/18] cxl/cache: Add cache device counting for CXL ports
` [RFC PATCH 17/18] cxl/core: Add cache device attributes
` [RFC PATCH 18/18] cxl/core: Add cache device cache management attributes
[PATCH v8 00/11] cxl: Delay HB port and switch dport probing until endpoint dev probe
2025-08-26 7:51 UTC (20+ messages)
` [PATCH v8 01/11] cxl: Add helper to detect top of CXL device topology
` [PATCH v8 02/11] cxl: Add helper to reap dport
` [PATCH v8 03/11] cxl: Add a cached copy of target_map to cxl_decoder
` [PATCH v8 04/11] cxl: Move port register setup to first dport appear
` [PATCH v8 05/11] cxl: Defer dport allocation for switch ports
[PATCH] cxl: Demote extended linear cache missing emissions
2025-08-25 19:31 UTC (2+ messages)
[ndctl PATCH] test/common: document magic number CXL_TEST_QOS_CLASS=42
2025-08-25 1:36 UTC (5+ messages)
[ndctl PATCH v3] test/cxl-poison.sh: test inject and clear poison by region offset
2025-08-23 2:59 UTC
[ndctl PATCH v2] test/cxl-poison.sh: test inject and clear poison by region offset
2025-08-23 2:46 UTC (3+ messages)
[PATCH 00/16] CXL.mem error isolation support
2025-08-22 19:19 UTC (3+ messages)
` [PATCH 14/16] ACPI: Add CXL isolation _OSC fields
[PATCH v5 0/2] PCI/AER: Handle Advisory Non-Fatal error
2025-08-22 18:15 UTC (5+ messages)
[PATCH v5 2/2] PCI/AER: Print UNCOR_STATUS bits that might be ANFE
2025-08-22 17:27 UTC (2+ messages)
[PATCH v5 1/2] PCI/AER: Clear UNCOR_STATUS bits that might be ANFE
2025-08-22 17:20 UTC (2+ messages)
[PATCH v2 2/2] cxl: add support for cxl reset
2025-08-22 15:33 UTC (4+ messages)
[cxl:next] BUILD SUCCESS 561c4e30bff93b3c33e694a459f8580f8a6b3c8c
2025-08-22 6:54 UTC
test/common: stop relying on bash $SECONDS in check_dmesg()
2025-08-22 0:21 UTC (2+ messages)
[ndctl PATCH 3/3] test/common: stop relying on bash $SECONDS in check_dmesg()
2025-08-22 0:10 UTC (2+ messages)
[PATCH v2 0/4] cxl, acpi/hmat, node: Update CXL access coordinates to node directly
2025-08-21 21:17 UTC (6+ messages)
` [PATCH v2 1/4] mm/memory_hotplug: Update comment for hotplug memory callback priorities
` [PATCH v2 2/4] drivers/base/node: Add a helper function node_update_perf_attrs()
` [PATCH v2 3/4] cxl, acpi/hmat: Update CXL access coordinates directly instead of through HMAT
` [PATCH v2 4/4] acpi/hmat: Remove now unused hmat_update_target_coordinates()
[PATCH v3] Documentation/driver-api: Fix typo error in cxl
2025-08-21 17:38 UTC (4+ messages)
[PATCH 0/4 v4] cxl/core: Enable Region creation/attach on x86 with LMH
2025-08-21 15:15 UTC (9+ messages)
` [PATCH 2/4 v4] cxl/core: Add helpers to detect Low Memory Holes on x86
` [PATCH 3/4 v4] cxl/core: Enable Region creation on x86 with LMH
` [PATCH 4/4 v4] cxl/test: Simulate an x86 Low Memory Hole for tests
[cxl:next] BUILD SUCCESS c7ad33d50282168fbfed1c6662503b0d979a67c8
2025-08-21 4:47 UTC
[PATCH] cxl/port: Validate decoder nr_targets against supported ways
2025-08-21 0:37 UTC (5+ messages)
[PATCH v3 0/8] Cache coherency management subsystem
2025-08-20 17:44 UTC (11+ messages)
` [PATCH v3 1/8] memregion: Drop unused IORES_DESC_* parameter from cpu_cache_invalidate_memregion()
` [PATCH v3 2/8] memregion: Support fine grained invalidate by cpu_cache_invalidate_memregion()
` [PATCH v3 3/8] lib: Support ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
` [PATCH v3 4/8] MAINTAINERS: Add Jonathan Cameron to drivers/cache
` [PATCH v3 5/8] arm64: Select GENERIC_CPU_CACHE_MAINTENANCE and ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
` [PATCH v3 6/8] cache: Support cache maintenance for HiSilicon SoC Hydra Home Agent
` [PATCH v3 7/8] acpi: PoC of Cache control via ACPI0019 and _DSM
` [PATCH v3 8/8] Hack: Pretend we have PSCI 1.2
[PATCH V2 00/20] Add CXL LSA 2.1 format support in nvdimm and cxl pmem
2025-08-20 16:41 UTC (17+ messages)
` [PATCH V2 02/20] nvdimm/label: Prep patch to accommodate cxl lsa 2.1 support
` [PATCH V2 04/20] nvdimm/label: CXL labels skip the need for 'interleave-set cookie'
` [PATCH V2 05/20] nvdimm/region_label: Add region label updation routine
` [PATCH V2 07/20] nvdimm/namespace_label: Update namespace init_labels and its region_uuid
` [PATCH V2 03/20] nvdimm/namespace_label: Add namespace label changes as per CXL LSA v2.1
` [PATCH V2 14/20] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation
` [PATCH V2 13/20] cxl/mem: Refactor cxl pmem region auto-assembling
[PATCH v2] cxl/acpi: Limit XOR map application based on host bridge ways
2025-08-20 15:44 UTC (2+ messages)
[RFC V2 00/18] famfs: port into fuse
2025-08-19 22:34 UTC (20+ messages)
` [RFC V2 12/18] famfs_fuse: Plumb the GET_FMAP message/response
` [RFC V2 14/18] famfs_fuse: GET_DAXDEV message and daxdev_table
[PATCH 0/4] cxl, acpi/hmat, node: Update CXL access coordinates to node directly
2025-08-19 19:08 UTC (11+ messages)
` [PATCH 1/4] mm/memory_hotplug: Update comment for hotplug memory callback priorities
` [PATCH 2/4] drivers/base/node: Add a helper function node_update_perf_attrs()
[PATCH] Documentation/driver-api: Fix typo error in cxl
2025-08-19 17:23 UTC (3+ messages)
[cxl:next] BUILD SUCCESS e6a9530b3ee7407b70b60e4df70688db0d239e1a
2025-08-19 6:20 UTC
[PATCH] cxl: Fix emit of type resource_size_t argument for validate_region_offset()
2025-08-18 17:11 UTC (3+ messages)
[PATCH v2] Documentation/driver-api: Fix typo error in cxl
2025-08-18 16:02 UTC (2+ messages)
[PATCH v10 00/17] Enable CXL PCIe Port Protocol Error handling and logging
2025-08-18 15:18 UTC (2+ messages)
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