messages from 2025-09-30 16:13:50 to 2025-10-14 09:25:08 UTC [more...]
[cxl:fixes] BUILD SUCCESS 0d9320bf34133feeb5048ccfd90d01ea7ba500ba
2025-10-14 9:24 UTC
[PATCH v4 0/3] CXL: Add a loadable module for address translation
2025-10-14 8:24 UTC (4+ messages)
` [PATCH v4 1/3] cxl/region: Refactor address translation funcs for testing
` [PATCH v4 2/3] cxl/acpi: Make the XOR calculations available "
` [PATCH v4 3/3] cxl/test: Add cxl_translate module for address translation testing
[PATCH] cxl/region: Use %pa printk format to emit resource_size_t
2025-10-14 7:31 UTC
[PATCH v2] cxl/region: Translate DPA->HPA in unaligned MOD3 regions
2025-10-14 6:28 UTC
[PATCH v2] checkpatch: allow an assignment in if condition for ACQUIRE_ERR()
2025-10-14 0:30 UTC (2+ messages)
[PATCH] cxl: fix typos in cdat.c comments
2025-10-13 18:53 UTC (2+ messages)
[RFC PATCH] hw/cxl: Add a performant (and correct) path for the non interleaved cases
2025-10-13 15:01 UTC
[PATCH 0/3] cxl: Fixes for extended linear cache
2025-10-11 14:28 UTC (10+ messages)
` [PATCH 1/3] cxl/acpi: Fix setup of memory resource in cxl_acpi_set_cache_size()
` [PATCH 2/3] cxl: Set range param for region_res_match_cxl_range() as const
` [PATCH 3/3] cxl: Fix match_region_by_range() to use region_res_match_cxl_range()
[PATCH v19 00/22] Type2 device basic support
2025-10-10 23:11 UTC (41+ messages)
` [PATCH v19 01/22] cxl/mem: Arrange for always-synchronous memdev attach
` [PATCH v19 02/22] cxl/port: Arrange for always synchronous endpoint attach
` [PATCH v19 03/22] cxl/mem: Introduce a memdev creation ->probe() operation
` [PATCH v19 04/22] cxl: Add type2 device basic support
` [PATCH v19 05/22] sfc: add cxl support
` [PATCH v19 06/22] cxl: Move pci generic code
` [PATCH v19 07/22] cxl: allow Type2 drivers to map cxl component regs
` [PATCH v19 08/22] cxl: Support dpa initialization without a mailbox
` [PATCH v19 09/22] cxl: Prepare memdev creation for type2
` [PATCH v19 10/22] sfc: create type2 cxl memdev
` [PATCH v19 11/22] cxl: Define a driver interface for HPA free space enumeration
` [PATCH v19 12/22] sfc: get root decoder
` [PATCH v19 13/22] cxl: Define a driver interface for DPA allocation
` [PATCH v19 14/22] sfc: get endpoint decoder
` [PATCH v19 15/22] cxl: Make region type based on endpoint type
` [PATCH v19 16/22] cxl/region: Factor out interleave ways setup
` [PATCH v19 17/22] cxl/region: Factor out interleave granularity setup
` [PATCH v19 18/22] cxl: Allow region creation by type2 drivers
` [PATCH v19 19/22] cxl: Avoid dax creation for accelerators
` [PATCH v19 20/22] sfc: create cxl region
` [PATCH v19 21/22] cxl: Add function for obtaining region range
` [PATCH v19 22/22] sfc: support pio mapping based on cxl
[PATCH v3 0/5] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL
2025-10-10 20:49 UTC (6+ messages)
` [PATCH v3 4/5] dax/hmem: Defer Soft Reserved overlap handling until CXL region assembly completes
[PATCH] cxl/features: Add check for no entries in cxl_feature_info
2025-10-10 16:58 UTC (3+ messages)
[PATCH 0/4 v5] cxl/core: Enable Region creation/attach on x86 with LMH
2025-10-10 14:49 UTC (19+ messages)
` [PATCH 1/4 v5] cxl/core: Change match_*_by_range() signatures
` [PATCH 2/4 v5] cxl/core: Add helpers to detect Low Memory Holes on x86
` [PATCH 3/4 v5] cxl/core: Enable Region creation on x86 with LMH
` [PATCH 4/4 v5] cxl/test: Simulate an x86 Low Memory Hole for tests
[PATCH v3 -qemu 0/5] hw/cxl: Support Back-Invalidate
2025-10-08 19:20 UTC (4+ messages)
` [PATCH 1/5] hw/pcie: Support enabling flit mode
[PATCH v3 0/8] Cache coherency management subsystem
2025-10-08 16:45 UTC (9+ messages)
` [PATCH v3 3/8] lib: Support ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
` [PATCH v3 4/8] MAINTAINERS: Add Jonathan Cameron to drivers/cache
` [PATCH v3 6/8] cache: Support cache maintenance for HiSilicon SoC Hydra Home Agent
[PATCH v18 00/20] Type2 device basic support
2025-10-07 21:23 UTC (10+ messages)
` [PATCH v18 04/20] cxl: allow Type2 drivers to map cxl component regs
` [PATCH v18 16/20] cxl: Allow region creation by type2 drivers
[PATCH] dax/hmem: Fix lockdep warning for hmem_register_resource()
2025-10-07 16:11 UTC (5+ messages)
[PATCH v12 00/25] Enable CXL PCIe Port Protocol Error handling and logging
2025-10-06 21:28 UTC (64+ messages)
` [PATCH v12 02/25] cxl/pci: Remove unnecessary CXL RCH handling helper functions
` [PATCH v12 03/25] cxl: Remove ifdef blocks of CONFIG_PCIEAER_CXL from core/pci.c
` [PATCH v12 04/25] CXL/AER: Remove CONFIG_PCIEAER_CXL and replace with CONFIG_CXL_RAS
` [PATCH v12 05/25] cxl: Move CXL driver RCH error handling into CONFIG_CXL_RCH_RAS conditional block
` [PATCH v12 06/25] CXL/AER: Introduce aer_cxl_rch.c into AER driver for handling CXL RCH errors
` [PATCH v12 07/25] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h
` [PATCH v12 08/25] PCI/CXL: Introduce pcie_is_cxl()
` [PATCH v12 09/25] PCI/AER: Report CXL or PCIe bus error type in trace logging
` [PATCH v12 10/25] CXL/AER: Update PCI class code check to use FIELD_GET()
` [PATCH v12 11/25] cxl/pci: Update RAS handler interfaces to also support CXL Ports
` [PATCH v12 12/25] cxl/pci: Log message if RAS registers are unmapped
` [PATCH v12 14/25] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors
` [PATCH v12 16/25] CXL/PCI: Introduce PCI_ERS_RESULT_PANIC
` [PATCH v12 17/25] cxl/pci: Introduce CXL Endpoint protocol error handlers
` [PATCH v12 18/25] CXL/AER: Introduce aer_cxl_vh.c in AER driver for forwarding CXL errors
` [PATCH v12 19/25] cxl: Introduce cxl_pci_drv_bound() to check for bound driver
` [PATCH v12 20/25] PCI/AER: Dequeue forwarded CXL error
` [PATCH v12 21/25] CXL/PCI: Introduce CXL Port protocol error handlers
` [PATCH v12 23/25] CXL/PCI: Introduce CXL uncorrectable protocol error recovery
` [PATCH v12 24/25] CXL/PCI: Enable CXL protocol errors during CXL Port probe
` [PATCH v12 25/25] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup
[GIT PULL] NVDIMM for 6.18
2025-10-06 18:29 UTC (2+ messages)
[PATCH] cxl/hdm: allow zero sized committed decoders
2025-10-06 17:06 UTC (21+ messages)
` [PATCH v2] "
[PATCH V3 00/20] Add CXL LSA 2.1 format support in nvdimm and cxl pmem
2025-10-06 16:56 UTC (58+ messages)
` [PATCH V3 07/20] nvdimm/region_label: Add region label delete support
` [PATCH V3 08/20] nvdimm/label: Include region label in slot validation
` [PATCH V3 12/20] nvdimm/region_label: Export routine to fetch region information
` [PATCH V3 05/20] nvdimm/namespace_label: Add namespace label changes as per CXL LSA v2.1
` [PATCH V3 13/20] cxl/mem: Refactor cxl pmem region auto-assembling
` [PATCH V3 14/20] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation
` [PATCH V3 15/20] cxl: Add a routine to find cxl root decoder on cxl bus using cxl port
` [PATCH V3 16/20] cxl/mem: Preserve cxl root decoder during mem probe
` [PATCH V3 18/20] cxl/pmem_region: Prep patch to accommodate pmem_region attributes
` [PATCH V3 19/20] cxl/pmem_region: Add sysfs attribute cxl region label updation/deletion
` [PATCH V3 20/20] cxl/pmem: Add CXL LSA 2.1 support in cxl pmem
` [PATCH V3 03/20] nvdimm/label: Modify nd_label_base() signature
` [PATCH V3 04/20] nvdimm/label: Update mutex_lock() with guard(mutex)()
` [PATCH V3 06/20] nvdimm/region_label: Add region label update support
[PATCH qemu for 10.2 0/3] cxl: Additional RAS features support
2025-10-06 10:26 UTC (3+ messages)
[GIT PULL] Compute Express Link (CXL) changes for 6.18
2025-10-04 19:27 UTC (2+ messages)
[GIT PULL] Please pull FWCTL subsystem changes
2025-10-04 1:41 UTC (2+ messages)
[PATCH v2] cxl: Adjust extended linear cache failure emission in cxl_acpi
2025-10-03 18:55 UTC
[PATCH] Documentation/driver-api/cxl: remove page-allocator quirk section
2025-10-03 14:32 UTC
[PATCH 1/1] dax: add PROBE_PREFER_ASYNCHRONOUS to the pmem driver
2025-10-02 13:19 UTC
[PATCH] cxl/region: Translate DPA->HPA in unaligned MOD3 regions
2025-10-02 2:01 UTC (3+ messages)
[PATCH v3 1/1] cxl/port: Avoid missing port component registers setup
2025-10-01 14:34 UTC (2+ messages)
[ANNOUNCE] ndctl v83
2025-09-30 23:33 UTC
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox