messages from 2025-11-04 00:11:31 to 2025-11-11 01:00:44 UTC [more...]
[PATCH] memblock: fix memblock_estimated_nr_free_pages() for soft-reserved memory
2025-11-11 1:00 UTC (4+ messages)
` [PATCH v2] "
[PATCH] x86/kaslr: P2PDMA is one of a class of ZONE_DEVICE-KASLR collisions
2025-11-10 23:39 UTC (5+ messages)
[PATCH v20 00/22] Type2 device basic support
2025-11-10 15:36 UTC (23+ messages)
` [PATCH v20 01/22] cxl/mem: Arrange for always-synchronous memdev attach
` [PATCH v20 02/22] cxl/port: Arrange for always synchronous endpoint attach
` [PATCH v20 03/22] cxl/mem: Introduce a memdev creation ->probe() operation
` [PATCH v20 04/22] cxl: Add type2 device basic support
` [PATCH v20 05/22] sfc: add cxl support
` [PATCH v20 06/22] cxl: Move pci generic code
` [PATCH v20 07/22] cxl/sfc: Map cxl component regs
` [PATCH v20 08/22] cxl/sfc: Initialize dpa without a mailbox
` [PATCH v20 09/22] cxl: Prepare memdev creation for type2
` [PATCH v20 10/22] sfc: create type2 cxl memdev
` [PATCH v20 11/22] cxl: Define a driver interface for HPA free space enumeration
` [PATCH v20 12/22] sfc: get root decoder
` [PATCH v20 13/22] cxl: Define a driver interface for DPA allocation
` [PATCH v20 14/22] sfc: get endpoint decoder
` [PATCH v20 15/22] cxl: Make region type based on endpoint type
` [PATCH v20 16/22] cxl/region: Factor out interleave ways setup
` [PATCH v20 17/22] cxl/region: Factor out interleave granularity setup
` [PATCH v20 18/22] cxl: Allow region creation by type2 drivers
` [PATCH v20 19/22] cxl: Avoid dax creation for accelerators
` [PATCH v20 20/22] sfc: create cxl region
` [PATCH v20 21/22] cxl: Add function for obtaining region range
` [PATCH v20 22/22] sfc: support pio mapping based on cxl
[PATCH v19 00/22] Type2 device basic support
2025-11-10 14:54 UTC (34+ messages)
` [PATCH v19 01/22] cxl/mem: Arrange for always-synchronous memdev attach
` [PATCH v19 06/22] cxl: Move pci generic code
` [PATCH v19 07/22] cxl: allow Type2 drivers to map cxl component regs
` [PATCH v19 08/22] cxl: Support dpa initialization without a mailbox
` [PATCH v19 11/22] cxl: Define a driver interface for HPA free space enumeration
` [PATCH v19 13/22] cxl: Define a driver interface for DPA allocation
` [PATCH v19 14/22] sfc: get endpoint decoder
` [PATCH v19 18/22] cxl: Allow region creation by type2 drivers
` [PATCH v19 22/22] sfc: support pio mapping based on cxl
[PATCH V3 00/20] Add CXL LSA 2.1 format support in nvdimm and cxl pmem
2025-11-07 12:49 UTC (11+ messages)
` [PATCH V3 13/20] cxl/mem: Refactor cxl pmem region auto-assembling
` [PATCH V3 18/20] cxl/pmem_region: Prep patch to accommodate pmem_region attributes
[ndctl PATCH v4] cxl: Add cxl-translate.sh unit test
2025-11-10 2:11 UTC
[ndctl PATCH v3] cxl: Add cxl-translate.sh unit test
2025-11-10 1:46 UTC (4+ messages)
[PATCH v5 0/6] Cache coherency management subsystem
2025-11-08 20:02 UTC (2+ messages)
[cxl:fixes] BUILD SUCCESS b6cfddd26ec55e865b4715f73e9bbb17a15091ed
2025-11-08 15:21 UTC
[RESEND PATCH v4 0/2] acpi/hmat: hmat_register_target() refactor to address lockdep warning
2025-11-08 1:06 UTC (4+ messages)
` [RESEND PATCH v4 1/2] acpi/hmat: Return when generic target is updated
` [RESEND PATCH v4 2/2] acpi/hmat: Fix lockdep warning for hmem_register_resource()
[RFC LPC2026 PATCH 0/9] Protected Memory NUMA Nodes
2025-11-07 22:49 UTC (10+ messages)
` [RFC PATCH 1/9] gfp: Add GFP_PROTECTED for protected-node allocations
` [RFC PATCH 2/9] memory-tiers: create default_sysram_nodes
` [RFC PATCH 3/9] mm: default slub, oom_kill, compaction, and page_alloc to sysram
` [RFC PATCH 4/9] mm,cpusets: rename task->mems_allowed to task->mems_default
` [RFC PATCH 5/9] cpuset: introduce cpuset.mems.default
` [RFC PATCH 6/9] mm/memory_hotplug: add MHP_PROTECTED_MEMORY flag
` [RFC PATCH 7/9] drivers/dax: add protected memory bit to dev_dax
` [RFC PATCH 8/9] drivers/cxl: add protected_memory bit to cxl region
` [RFC PATCH 9/9] [HACK] mm/zswap: compressed ram integration example
[PATCH 0/6 v7] Make ELOG and GHES log and trace consistently
2025-11-07 19:59 UTC (10+ messages)
` [PATCH 1/6 v7] ACPI: extlog: Trace CPER Non-standard Section Body
` [PATCH 2/6 v7] ACPI: extlog: Trace CPER PCI Express Error Section
` [PATCH 3/6 v7] acpi/ghes: Make GHES select ACPI_APEI_PCIEAER
` [PATCH 4/6 v7] acpi/ghes: Add helper for CXL protocol errors checks
` [PATCH 5/6 v7] acpi/ghes: Add helper to copy CXL protocol error info to work struct
` [PATCH 6/6 v7] ACPI: extlog: Trace CPER CXL Protocol Error Section
[PATCH 0/4] cxl/test: Add unit testing for extended linear cache
2025-11-07 17:52 UTC (3+ messages)
` [PATCH 4/4] cxl: Adjust offset calculation for poison injection
[PATCH v4 00/14] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement
2025-11-07 15:59 UTC (23+ messages)
` [PATCH v4 04/14] cxl/region: Add @hpa_range argument to function cxl_calc_interleave_pos()
` [PATCH v4 05/14] cxl: Simplify cxl_root_ops allocation and handling
` [PATCH v4 06/14] cxl/region: Separate region parameter setup and region construction
` [PATCH v4 10/14] cxl: Enable AMD Zen5 address translation using ACPI PRMT
` [PATCH v4 11/14] cxl/atl: Lock decoders that need address translation
` [PATCH v4 12/14] cxl: Simplify cxl_rd_ops allocation and handling
[RESEND v13 00/25] Enable CXL PCIe Port Protocol Error handling and logging
2025-11-06 23:32 UTC (63+ messages)
` [RESEND v13 01/25] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h
` [RESEND v13 02/25] PCI/CXL: Introduce pcie_is_cxl()
` [RESEND v13 03/25] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions
` [RESEND v13 04/25] cxl/pci: Remove unnecessary CXL RCH "
` [RESEND v13 05/25] cxl: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.c
` [RESEND v13 06/25] cxl: Move CXL driver's RCH error handling into core/ras_rch.c
` [RESEND v13 07/25] CXL/AER: Replace device_lock() in cxl_rch_handle_error_iter() with guard() lock
` [RESEND v13 08/25] CXL/AER: Move AER drivers RCH error handling into pcie/aer_cxl_rch.c
` [RESEND v13 09/25] PCI/AER: Report CXL or PCIe bus error type in trace logging
` [RESEND v13 10/25] cxl/pci: Update RAS handler interfaces to also support CXL Ports
` [RESEND v13 11/25] cxl/pci: Log message if RAS registers are unmapped
` [RESEND v13 12/25] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports
` [RESEND v13 13/25] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors
` [RESEND v13 14/25] cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers
` [RESEND v13 15/25] CXL/PCI: Introduce PCI_ERS_RESULT_PANIC
` [RESEND v13 16/25] CXL/AER: Introduce pcie/aer_cxl_vh.c in AER driver for forwarding CXL errors
` [RESEND v13 17/25] cxl: Introduce cxl_pci_drv_bound() to check for bound driver
` [RESEND v13 18/25] cxl: Change CXL handlers to use guard() instead of scoped_guard()
` [RESEND v13 19/25] cxl/pci: Introduce CXL protocol error handlers for Endpoints
` [RESEND v13 20/25] CXL/PCI: Introduce CXL Port protocol error handlers
` [RESEND v13 21/25] PCI/AER: Dequeue forwarded CXL error
` [RESEND v13 22/25] CXL/PCI: Export and rename merge_result() to pci_ers_merge_result()
` [RESEND v13 23/25] CXL/PCI: Introduce CXL uncorrectable protocol error recovery
` [RESEND v13 24/25] CXL/PCI: Enable CXL protocol errors during CXL Port probe
` [RESEND v13 25/25] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup
[PATCH v3 0/2] acpi/hmat: hmat_register_target() refactor to address lockdep warning
2025-11-06 20:27 UTC (8+ messages)
` [PATCH v3 1/2] acpi/hmat: Return when generic target is updated
` [PATCH v3 2/2] acpi/hmat: Fix lockdep warning for hmem_register_resource()
` [PATCH v4 0/2] acpi/hmat: hmat_register_target() refactor to address lockdep warning
` [PATCH v4 1/2] acpi/hmat: Return when generic target is updated
` [PATCH v4 2/2] acpi/hmat: Fix lockdep warning for hmem_register_resource()
[RFC] CXL/ACPI: Remove overlapping Soft Reserved regions before adding CFMW resources
2025-11-06 18:25 UTC (5+ messages)
[PATCH 0/2] cxl: Cleanup region_res_match_cxl_range() function
2025-11-06 17:10 UTC (5+ messages)
` [PATCH 1/2] cxl: Rename region_res_match_cxl_range() to spa_maps_hpa()
` [PATCH 2/2] cxl: Clarify comment in spa_maps_hpa()
[PATCH v3] cxl: Add handling of locked CXL decoder
2025-11-05 20:18 UTC
[PATCH 0/4 v5] cxl/core: Enable Region creation/attach on x86 with LMH
2025-11-05 18:51 UTC (9+ messages)
` [PATCH 2/4 v5] cxl/core: Add helpers to detect Low Memory Holes on x86
[PATCH] MAINTAINERS: Add Fan Ni as Compute eXpress Link QEMU reviewer
2025-11-05 9:32 UTC (3+ messages)
[PATCH v3 0/5] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL
2025-11-05 2:59 UTC (3+ messages)
[PATCH 0/6 v6] Make ELOG and GHES log and trace consistently
2025-11-04 17:41 UTC (7+ messages)
` [PATCH 4/6 v6] acpi/ghes: Add helper for CXL protocol errors checks
` [PATCH 6/6 v6] ACPI: extlog: Trace CPER CXL Protocol Error Section
[cxl:next] BUILD SUCCESS c692f5a947ad17ab155dc78631342b44acce5a96
2025-11-04 10:24 UTC
[PATCH] cxl/pci: replace use of system_wq with system_percpu_wq
2025-11-04 8:59 UTC (3+ messages)
[PATCH v13 24/25] CXL/PCI: Enable CXL protocol errors during CXL Port probe
2025-11-04 0:29 UTC (2+ messages)
` [PATCH v13 25/25] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup
[PATCH v13 23/25] CXL/PCI: Introduce CXL uncorrectable protocol error recovery
2025-11-04 0:28 UTC
[PATCH v13 23/25] CXL/PCI: Introduce CXL uncorrectable protocol error recovery
2025-11-04 0:19 UTC
[PATCH v13 00/25] Enable CXL PCIe Port Protocol Error handling and logging
2025-11-04 0:09 UTC (17+ messages)
` [PATCH v13 07/25] CXL/AER: Replace device_lock() in cxl_rch_handle_error_iter() with guard() lock
` [PATCH v13 08/25] CXL/AER: Move AER drivers RCH error handling into pcie/aer_cxl_rch.c
` [PATCH v13 09/25] PCI/AER: Report CXL or PCIe bus error type in trace logging
` [PATCH v13 10/25] cxl/pci: Update RAS handler interfaces to also support CXL Ports
` [PATCH v13 11/25] cxl/pci: Log message if RAS registers are unmapped
` [PATCH v13 12/25] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports
` [PATCH v13 13/25] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors
` [PATCH v13 14/25] cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers
` [PATCH v13 15/25] CXL/PCI: Introduce PCI_ERS_RESULT_PANIC
` [PATCH v13 16/25] CXL/AER: Introduce pcie/aer_cxl_vh.c in AER driver for forwarding CXL errors
` [PATCH v13 17/25] cxl: Introduce cxl_pci_drv_bound() to check for bound driver
` [PATCH v13 18/25] cxl: Change CXL handlers to use guard() instead of scoped_guard()
` [PATCH v13 19/25] cxl/pci: Introduce CXL protocol error handlers for Endpoints
` [PATCH v13 20/25] CXL/PCI: Introduce CXL Port protocol error handlers
` [PATCH v13 21/25] PCI/AER: Dequeue forwarded CXL error
` [PATCH v13 22/25] CXL/PCI: Export and rename merge_result() to pci_ers_merge_result()
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