messages from 2025-11-19 23:34:36 to 2025-12-05 10:06:43 UTC [more...]
[PATCH v6 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement
2025-12-05 10:02 UTC (11+ messages)
[PATCH 0/6] cxl: Initialization reworks in support Soft Reserve Recovery and Accelerator Memory
2025-12-05 3:38 UTC (29+ messages)
` [PATCH 1/6] cxl/mem: Fix devm_cxl_memdev_edac_release() confusion
` [PATCH 2/6] cxl/mem: Arrange for always-synchronous memdev attach
` [PATCH 3/6] cxl/port: Arrange for always synchronous endpoint attach
` [PATCH 4/6] cxl/mem: Convert devm_cxl_add_memdev() to scope-based-cleanup
` [PATCH 5/6] cxl/mem: Drop @host argument to devm_cxl_add_memdev()
` [PATCH 6/6] cxl/mem: Introduce a memdev creation ->probe() operation
[GIT PULL] Compute Express Link (CXL) changes for 6.19
2025-12-05 3:00 UTC (2+ messages)
[PATCH v4 0/9] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL and HMEM
2025-12-05 2:54 UTC (25+ messages)
` [PATCH v4 1/9] dax/hmem, e820, resource: Defer Soft Reserved insertion until hmem is ready
` [PATCH v4 2/9] dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges
` [PATCH v4 3/9] dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL
` [PATCH v4 4/9] dax/hmem: Defer handling of Soft Reserved ranges that overlap CXL windows
` [PATCH v4 5/9] cxl/region, dax/hmem: Arbitrate Soft Reserved ownership with cxl_regions_fully_map()
` [PATCH v4 6/9] cxl/region: Add register_dax flag to defer DAX setup
` [PATCH v4 7/9] cxl/region, dax/hmem: Register cxl_dax only when CXL owns Soft Reserved span
` [PATCH v4 8/9] cxl/region, dax/hmem: Tear down CXL regions when HMEM reclaims Soft Reserved
` [PATCH v4 9/9] dax/hmem: Reintroduce Soft Reserved ranges back into the iomem tree
[RFC PATCH 0/3] Add Support for Multiple DC Regions
2025-12-04 17:44 UTC (10+ messages)
` [RFC PATCH 1/3] core/region: fix return logic for store_targetN
` [RFC PATCH 2/3] dax/cxl: add existing dc extents when probing dax region
` [RFC PATCH 3/3] dcd: Add support for multiple DC regions
[RESEND v13 00/25] Enable CXL PCIe Port Protocol Error handling and logging
2025-12-04 17:30 UTC (2+ messages)
[RESEND v13 00/25] Enable CXL PCIe Port Protocol Error handling and logging
2025-12-04 17:08 UTC (27+ messages)
` [RESEND v13 02/25] PCI/CXL: Introduce pcie_is_cxl()
` [RESEND v13 08/25] CXL/AER: Move AER drivers RCH error handling into pcie/aer_cxl_rch.c
` [RESEND v13 12/25] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports
` [RESEND v13 15/25] CXL/PCI: Introduce PCI_ERS_RESULT_PANIC
` [RESEND v13 16/25] CXL/AER: Introduce pcie/aer_cxl_vh.c in AER driver for forwarding CXL errors
` [RESEND v13 17/25] cxl: Introduce cxl_pci_drv_bound() to check for bound driver
` [RESEND v13 21/25] PCI/AER: Dequeue forwarded CXL error
` [RESEND v13 25/25] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup
[PATCH] cxl/region: fix format string for resource_size_t
2025-12-04 15:22 UTC (2+ messages)
[PATCH v4 00/29] lan966x pci device: Add support for SFPs
2025-12-04 12:06 UTC (21+ messages)
` [PATCH v4 01/29] Revert "treewide: Fix probing of devices in DT overlays"
[RFC PATCH v1 0/2] cxl/cli: HPA-ordered destroy-region teardown
2025-12-03 23:46 UTC (9+ messages)
` [RFC PATCH v1 1/2] cxl/cli: add helpers to collect and sort regions by HPA
` [RFC PATCH v1 2/2] cxl/cli: enforce HPA-descending teardown order for destroy-region
[RFC NDCTL PATCH 0/2] Support for Multiple DC Regions
2025-12-03 21:15 UTC (3+ messages)
` [RFC NDCTL PATCH 1/2] rename RAM_A to RAM_0
` [RFC NDCTL PATCH 2/2] cxl: extend DCD related features to support up to 8 regions
[RFC LPC2026 PATCH v2 00/11] Specific Purpose Memory NUMA Nodes
2025-12-03 5:25 UTC (15+ messages)
[NDCTL PATCH v2 0/2] cxl: Add tests for extended linear cache support
2025-12-02 22:22 UTC (6+ messages)
` [NDCTL PATCH v2 1/2] cxl/test: Add test "
` [NDCTL PATCH v2 2/2] cxl/test: Add support for poison test for ELC
[PATCH v21 00/23] Type2 device basic support
2025-12-02 16:35 UTC (33+ messages)
` [PATCH v21 01/23] cxl/mem: refactor memdev allocation
` [PATCH v21 02/23] cxl/mem: Arrange for always-synchronous memdev attach
` [PATCH v21 03/23] cxl/port: Arrange for always synchronous endpoint attach
` [PATCH v21 08/23] cxl/sfc: Map cxl component regs
` [PATCH v21 15/23] sfc: get endpoint decoder
[PATCH] x86/kaslr: P2PDMA is one of a class of ZONE_DEVICE-KASLR collisions
2025-12-01 21:29 UTC (3+ messages)
[RFC QEMU PATCH 0/7] Application Specific Tagged Memory Support in CXL Type 3 Devices
2025-11-27 22:55 UTC (8+ messages)
` [RFC PATCH 1/7] hw/mem: Add tagged memory backend object
` [RFC PATCH 2/7] hw/cxl: Allow initializing type3 device with no backing device
` [RFC PATCH 3/7] hw/cxl: Change Extent add/remove APIs for lazy memory backend
` [RFC PATCH 4/7] hw/cxl: Map lazy memory backend after host acceptance
` [RFC PATCH 5/7] hw/cxl: Add performant direct mapping for extents
` [RFC PATCH 6/7] hw/cxl: Add remove alias functionality for extent direct mapping
` [RFC PATCH 7/7] hw/cxl: Add tag-based removal functionality
[cxl:for-6.19/cxl-aer] BUILD SUCCESS 19bcbd11a08d11cc2b54f82efae7ff068c880177
2025-11-27 18:08 UTC
[PATCH 00/44] Change a lot of min_t() that might mask high bits
2025-11-24 9:49 UTC (7+ messages)
` [PATCH 17/44] drivers/cxl: use min() instead of min_t()
` (subset) [PATCH 00/44] Change a lot of min_t() that might mask high bits
[PATCH v1 1/2] cxl, doc: Moving conventions in separate files
2025-11-22 0:49 UTC (5+ messages)
` [PATCH v1 2/2] Documentation/driver-api/cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement
[PATCH v3 0/5] dax: add PROBE_PREFER_ASYNCHRONOUS to all the dax drivers
2025-11-21 16:33 UTC (7+ messages)
` [PATCH v3 5/5] dax: add PROBE_PREFER_ASYNCHRONOUS to the dax device driver
[PATCH 0/6 v7] Make ELOG and GHES log and trace consistently
2025-11-21 2:22 UTC (8+ messages)
` [PATCH 3/6 v7] acpi/ghes: Make GHES select ACPI_APEI_PCIEAER
` [PATCH 4/6 v7] acpi/ghes: Add helper for CXL protocol errors checks
` [PATCH 5/6 v7] acpi/ghes: Add helper to copy CXL protocol error info to work struct
Interest in contributing to the CXL community
2025-11-20 15:07 UTC (2+ messages)
[PATCH v6 0/7] Cache coherency management subsystem
2025-11-20 9:55 UTC (9+ messages)
` [PATCH v6 3/7] lib: Support ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
[cxl:next] BUILD SUCCESS ea5514e300568cbe8f19431c3e424d4791db8291
2025-11-20 1:23 UTC
[PATCH V4 00/17] Add CXL LSA 2.1 format support in nvdimm and cxl pmem
2025-11-19 23:37 UTC (5+ messages)
` [PATCH V4 16/17] cxl/pmem_region: Create pmem region using information parsed from LSA
` [PATCH V4 17/17] cxl/pmem: Add CXL LSA 2.1 support in cxl pmem
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