From: Ira Weiny <ira.weiny@intel.com>
To: Ben Widawsky <ben@bwidawsk.net>
Cc: Dan Williams <dan.j.williams@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH V9 5/9] cxl/port: Find a DOE mailbox which supports CDAT
Date: Wed, 1 Jun 2022 15:03:37 -0700 [thread overview]
Message-ID: <YpfiOeglKe1w1fJb@iweiny-desk3> (raw)
In-Reply-To: <20220531175716.jlkwu7aerxh5ucte@mail.bwidawsk.net>
On Tue, May 31, 2022 at 10:57:16AM -0700, Ben Widawsky wrote:
> On 22-05-31 08:26:28, ira.weiny@intel.com wrote:
> > From: Ira Weiny <ira.weiny@intel.com>
> >
> > Each CXL device may have multiple DOE mailbox capabilities and each
> > mailbox may support multiple protocols. CXL port devices need to query
> > the CDAT information specifically.
> >
> > Search the DOE mailboxes for one which supports the CDAT protocol.
> > Cache that mailbox to be used for future queries.
> >
> > Only support memory devices at this time.
> >
> > Signed-off-by: Ira Weiny <ira.weiny@intel.com>
> >
> > ---
> > Changes from V8
> > Incorporate feedback from Jonathan
> > Move all this to the cxl_port object
> >
> > Changes from V7
> > Minor code clean ups
> >
> > Changes from V6
> > Adjust for aux devices being a CXL only concept
> > Update commit msg.
> > Ensure devices iterated by auxiliary_find_device() are checked
> > to be DOE devices prior to checking for the CDAT
> > protocol
> > From Ben
> > Ensure reference from auxiliary_find_device() is dropped
> > ---
> > drivers/cxl/core/pci.c | 28 ++++++++++++++++++++++++++++
> > drivers/cxl/core/port.c | 2 ++
> > drivers/cxl/cxl.h | 2 ++
> > drivers/cxl/cxlpci.h | 1 +
> > 4 files changed, 33 insertions(+)
> >
> > diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
> > index c4c99ff7b55e..5497a65bdcf3 100644
> > --- a/drivers/cxl/core/pci.c
> > +++ b/drivers/cxl/core/pci.c
> > @@ -4,11 +4,14 @@
> > #include <linux/device.h>
> > #include <linux/delay.h>
> > #include <linux/pci.h>
> > +#include <linux/pci-doe.h>
> > #include <cxlpci.h>
> > #include <cxlmem.h>
> > #include <cxl.h>
> > #include "core.h"
> >
> > +#define CXL_DOE_PROTOCOL_TABLE_ACCESS 2
> > +
> > /**
> > * DOC: cxl core pci
> > *
> > @@ -458,3 +461,28 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm)
> > return 0;
> > }
> > EXPORT_SYMBOL_NS_GPL(cxl_hdm_decode_init, CXL);
> > +
> > +void cxl_find_cdat_mb(struct cxl_port *port)
>
> kdoc would be good for exported symbols IMO.
Yes. This was not exported before and I forgot.
> Also if you can come up with a
> better verb than "find" for something that mutates the port's state, I think
> that would be beneficial.
cxl_cache_cdat_mb()?
Ira
>
> I'm not sure why this is exported yet, but I suppose I'll see soon :-)
>
> > +{
> > + struct device *dev = port->uport;
> > + struct cxl_memdev *cxlmd;
> > + struct cxl_dev_state *cxlds;
> > + int i;
> > +
> > + if (!is_cxl_memdev(dev))
> > + return;
> > +
> > + cxlmd = to_cxl_memdev(dev);
> > + cxlds = cxlmd->cxlds;
> > +
> > + for (i = 0; i < cxlds->num_mbs; i++) {
> > + struct pci_doe_mb *cur = cxlds->doe_mbs[i];
> > +
> > + if (pci_doe_supports_prot(cur, PCI_DVSEC_VENDOR_ID_CXL,
> > + CXL_DOE_PROTOCOL_TABLE_ACCESS)) {
> > + port->cdat_mb = cur;
> > + return;
> > + }
> > + }
> > +}
> > +EXPORT_SYMBOL_NS_GPL(cxl_find_cdat_mb, CXL);
> > diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
> > index ea60abda6500..2e2bd65c1024 100644
> > --- a/drivers/cxl/core/port.c
> > +++ b/drivers/cxl/core/port.c
> > @@ -461,6 +461,8 @@ struct cxl_port *devm_cxl_add_port(struct device *host, struct device *uport,
> > if (IS_ERR(port))
> > return port;
> >
> > + cxl_find_cdat_mb(port);
> > +
> > dev = &port->dev;
> > if (is_cxl_memdev(uport))
> > rc = dev_set_name(dev, "endpoint%d", port->id);
> > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> > index 140dc3278cde..0a86be589ffc 100644
> > --- a/drivers/cxl/cxl.h
> > +++ b/drivers/cxl/cxl.h
> > @@ -267,6 +267,7 @@ struct cxl_nvdimm {
> > * @component_reg_phys: component register capability base address (optional)
> > * @dead: last ep has been removed, force port re-creation
> > * @depth: How deep this port is relative to the root. depth 0 is the root.
> > + * @cdat_mb: Mailbox which supports the CDAT protocol
> > */
> > struct cxl_port {
> > struct device dev;
> > @@ -278,6 +279,7 @@ struct cxl_port {
> > resource_size_t component_reg_phys;
> > bool dead;
> > unsigned int depth;
> > + struct pci_doe_mb *cdat_mb;
> > };
> >
> > /**
> > diff --git a/drivers/cxl/cxlpci.h b/drivers/cxl/cxlpci.h
> > index fce1c11729c2..366b21bd1a01 100644
> > --- a/drivers/cxl/cxlpci.h
> > +++ b/drivers/cxl/cxlpci.h
> > @@ -74,4 +74,5 @@ static inline resource_size_t cxl_regmap_to_base(struct pci_dev *pdev,
> > int devm_cxl_port_enumerate_dports(struct cxl_port *port);
> > struct cxl_dev_state;
> > int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm);
> > +void cxl_find_cdat_mb(struct cxl_port *port);
> > #endif /* __CXL_PCI_H__ */
> > --
> > 2.35.1
> >
next prev parent reply other threads:[~2022-06-01 22:03 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-31 15:26 [PATCH V9 0/9] CXL: Read CDAT and DSMAS data ira.weiny
2022-05-31 15:26 ` [PATCH V9 1/9] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-05-31 17:00 ` [PATCH v9 " Davidlohr Bueso
2022-05-31 15:26 ` [PATCH V9 2/9] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-05-31 17:00 ` [PATCH v9 " Davidlohr Bueso
2022-05-31 15:26 ` [PATCH V9 3/9] PCI: Create PCI library functions in support of DOE mailboxes ira.weiny
2022-05-31 17:25 ` [PATCH v9 " Davidlohr Bueso
2022-05-31 17:56 ` Davidlohr Bueso
2022-06-01 4:53 ` Ira Weiny
2022-06-01 13:59 ` Davidlohr Bueso
2022-06-01 16:55 ` Ira Weiny
2022-05-31 15:26 ` [PATCH V9 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-05-31 17:50 ` Ben Widawsky
2022-06-01 14:35 ` Jonathan Cameron
2022-06-01 23:01 ` Ira Weiny
2022-05-31 15:26 ` [PATCH V9 5/9] cxl/port: Find a DOE mailbox which supports CDAT ira.weiny
2022-05-31 17:57 ` Ben Widawsky
2022-06-01 22:03 ` Ira Weiny [this message]
2022-05-31 15:26 ` [PATCH V9 6/9] cxl/port: Read CDAT table ira.weiny
2022-06-01 15:35 ` Jonathan Cameron
2022-06-01 16:31 ` Jonathan Cameron
2022-06-02 18:31 ` Ira Weiny
2022-06-02 22:47 ` Ira Weiny
2022-06-06 14:49 ` Jonathan Cameron
2022-05-31 15:26 ` [PATCH V9 7/9] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-05-31 17:21 ` Alison Schofield
2022-06-01 22:10 ` Ira Weiny
2022-05-31 15:26 ` [PATCH V9 8/9] cxl/port: Retry reading CDAT on failure ira.weiny
2022-05-31 17:07 ` Alison Schofield
2022-06-01 4:54 ` Ira Weiny
2022-05-31 19:30 ` [PATCH v9 " Davidlohr Bueso
2022-05-31 15:26 ` [PATCH V9 9/9] cxl/port: Parse out DSMAS data from CDAT table ira.weiny
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