From: Ira Weiny <ira.weiny@intel.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Davidlohr Bueso <dave@stgolabs.net>,
"Lukas Wunner" <lukas@wunner.de>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Ben Widawsky <bwidawsk@kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
<linux-pci@vger.kernel.org>
Subject: Re: [PATCH V13 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices
Date: Thu, 14 Jul 2022 11:50:43 -0700 [thread overview]
Message-ID: <YtBlg+epvGE+bQBe@iweiny-desk3> (raw)
In-Reply-To: <62cf8dca27760_1643dc29444@dwillia2-xfh.jf.intel.com.notmuch>
On Wed, Jul 13, 2022 at 08:30:18PM -0700, Dan Williams wrote:
> ira.weiny@ wrote:
> > From: Ira Weiny <ira.weiny@intel.com>
> >
[snip]
> > +
> > +static void devm_cxl_pci_create_doe(struct cxl_dev_state *cxlds)
> > +{
> > + struct device *dev = cxlds->dev;
> > + struct pci_dev *pdev = to_pci_dev(dev);
> > + u16 off = 0;
> > +
> > + /*
> > + * Mailbox creation is best effort. Higher layers must determine if
> > + * the lack of a mailbox for their protocol is a device failure or not.
> > + */
> > + pci_doe_for_each_off(pdev, off) {
> > + struct pci_doe_mb *doe_mb;
> > +
> > + doe_mb = pcim_doe_create_mb(pdev, off);
> > + if (IS_ERR(doe_mb)) {
> > + pci_err(pdev,
> > + "Failed to create MB object for MB @ %x\n",
> > + off);
>
> oh, the rest of cxl_pci driver is using dev_err() and dev_dbg(), not a
> big deal, can be a follow-on cleanup to make it consistent.
Changed since I'm reving anyway.
>
> > + continue;
> > + }
> > +
> > + if (xa_insert(&cxlds->doe_mbs, off, doe_mb, GFP_KERNEL)) {
>
> xarray all the things! Nice.
>
> > + pci_err(pdev,
> > + "xa_insert failed to insert MB @ %x\n",
> > + off);
> > + continue;
>
> Lets make these error messages more actionable:
>
> "Failed to setup DOE, CDAT data may not be available"
I really wanted this to be generic rather than mention something like CDAT
here.
But I see in the other patch you mention skipping the creation of all the
mailboxes and just grab the CDAT one.
Let me resolve that first.
>
> > + }
> > +
> > + pci_dbg(pdev, "Created DOE mailbox @%x\n", off);
> > + }
> > +}
> > +
> > static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> > {
> > struct cxl_register_map map;
> > @@ -408,6 +446,10 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> > if (IS_ERR(cxlds))
> > return PTR_ERR(cxlds);
> >
> > + xa_init(&cxlds->doe_mbs);
> > + if (devm_add_action(&pdev->dev, cxl_pci_destroy_doe, &cxlds->doe_mbs))
> > + return -ENOMEM;
> > +
>
> This belongs inside devm_cxl_pci_create_doe().
Done.
Ira
>
> > cxlds->serial = pci_get_dsn(pdev);
> > cxlds->cxl_dvsec = pci_find_dvsec_capability(
> > pdev, PCI_DVSEC_VENDOR_ID_CXL, CXL_DVSEC_PCIE_DEVICE);
> > @@ -434,6 +476,8 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> >
> > cxlds->component_reg_phys = cxl_regmap_to_base(pdev, &map);
> >
> > + devm_cxl_pci_create_doe(cxlds);
> > +
> > rc = cxl_pci_setup_mailbox(cxlds);
> > if (rc)
> > return rc;
> > --
> > 2.35.3
> >
>
>
next prev parent reply other threads:[~2022-07-14 18:52 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-05 15:49 [PATCH V13 0/9] CXL: Read CDAT and DSMAS data ira.weiny
2022-07-05 15:49 ` [PATCH V13 1/9] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-07-05 15:49 ` [PATCH V13 2/9] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-07-05 15:49 ` [PATCH V13 3/9] PCI: Create PCIe library functions in support of DOE mailboxes ira.weiny
2022-07-07 16:22 ` Bjorn Helgaas
2022-07-11 19:13 ` Ira Weiny
2022-07-11 22:27 ` [PATCH V13.1] PCI/DOE: Add DOE mailbox support functions ira.weiny
2022-07-11 22:47 ` Matthew Wilcox
2022-07-14 14:54 ` Ira Weiny
2022-07-14 3:16 ` [PATCH V13 3/9] PCI: Create PCIe library functions in support of DOE mailboxes Dan Williams
2022-07-14 14:19 ` Ira Weiny
2022-07-05 15:49 ` [PATCH V13 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-07-14 3:30 ` Dan Williams
2022-07-14 18:50 ` Ira Weiny [this message]
2022-07-05 15:49 ` [PATCH V13 5/9] driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW} ira.weiny
2022-07-05 15:49 ` [PATCH V13 6/9] cxl/port: Read CDAT table ira.weiny
2022-07-14 15:38 ` Dan Williams
2022-07-14 19:55 ` Ira Weiny
2022-07-14 20:19 ` Dan Williams
2022-07-15 1:09 ` Ira Weiny
2022-07-05 15:49 ` [PATCH V13 7/9] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-07-14 16:05 ` Dan Williams
2022-07-05 15:49 ` [PATCH V13 8/9] cxl/port: Retry reading CDAT on failure ira.weiny
2022-07-14 16:27 ` Dan Williams
2022-07-14 20:05 ` Ira Weiny
2022-07-14 20:13 ` Ira Weiny
2022-07-14 20:44 ` Dan Williams
2022-07-19 15:07 ` Jonathan Cameron
2022-07-05 15:49 ` [PATCH V13 9/9] cxl/port: Parse out DSMAS data from CDAT table ira.weiny
2022-07-14 16:32 ` Dan Williams
2022-07-14 19:58 ` Ira Weiny
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