From: Alison Schofield <alison.schofield@intel.com>
To: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Cc: linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-cxl@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Yazen Ghannam <yazen.ghannam@amd.com>,
Terry Bowman <terry.bowman@amd.com>
Subject: Re: [PATCH v8 1/2] acpi/ghes, cxl/pci: Process CXL CPER Protocol Errors
Date: Wed, 12 Mar 2025 11:58:54 -0700 [thread overview]
Message-ID: <Z9HZbh_2f0_vbKhI@aschofie-mobl2.lan> (raw)
In-Reply-To: <20250310223839.31342-2-Smita.KoralahalliChannabasappa@amd.com>
On Mon, Mar 10, 2025 at 10:38:38PM +0000, Smita Koralahalli wrote:
> When PCIe AER is in FW-First, OS should process CXL Protocol errors from
> CPER records. Introduce support for handling and logging CXL Protocol
> errors.
>
> The defined trace events cxl_aer_uncorrectable_error and
> cxl_aer_correctable_error trace native CXL AER endpoint errors. Reuse them
> to trace FW-First Protocol errors.
>
> Since the CXL code is required to be called from process context and
> GHES is in interrupt context, use workqueues for processing.
>
> Similar to CXL CPER event handling, use kfifo to handle errors as it
> simplifies queue processing by providing lock free fifo operations.
>
> Add the ability for the CXL sub-system to register a workqueue to
> process CXL CPER protocol errors.
>
> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
snip
>
next prev parent reply other threads:[~2025-03-12 18:58 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 22:38 [PATCH v8 0/2] acpi/ghes, cper, cxl: Process CXL CPER Protocol errors Smita Koralahalli
2025-03-10 22:38 ` [PATCH v8 1/2] acpi/ghes, cxl/pci: Process CXL CPER Protocol Errors Smita Koralahalli
2025-03-12 17:56 ` Ira Weiny
2025-03-12 18:58 ` Alison Schofield [this message]
2025-03-13 1:03 ` Li Ming
2025-03-10 22:38 ` [PATCH v8 2/2] cxl/pci: Add trace logging for CXL PCIe Port RAS errors Smita Koralahalli
2025-03-12 18:59 ` Alison Schofield
2025-03-13 1:03 ` Li Ming
2025-03-13 19:38 ` [PATCH v8 0/2] acpi/ghes, cper, cxl: Process CXL CPER Protocol errors Luck, Tony
2025-03-13 19:58 ` Dave Jiang
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