Re: [PATCH 1/1] cxl/region: Fix the first aliased address miscalculation

[Alison Schofield <alison.schofield@intel.com>]

On Mon, Mar 17, 2025 at 03:01:24PM +0800, Li Ming wrote:
> In extended linear cache(ELC) case, cxl_port_get_spa_cache_alias() helps
> to get the aliased address of a SPA, it considers the first address in
> CXL memory range is "region start + region cache size + 1", but it
> should be "region start + region cache size".
> 
> So if a SPA is equal to "region start + region cache size", its aliased
> address should be "SPA - region cache size".

Nice catch Ming!

Reviewed-by: Alison Schofield <alison.schofield@intel.com>

> 
> Signed-off-by: Li Ming <ming.li@zohomail.com>
> ---
>  drivers/cxl/core/region.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index 6d8bdb53f258..c3f4dc244df7 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -3460,7 +3460,7 @@ u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa)
>  			if (!p->cache_size)
>  				return ~0ULL;
>  
> -			if (spa > p->res->start + p->cache_size)
> +			if (spa >= p->res->start + p->cache_size)
>  				return spa - p->cache_size;
>  
>  			return spa + p->cache_size;
> -- 
> 2.34.1
>