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AJvYcCV2ssqhwoDbrr6gWCASAbziKcDXf4S7nshT2WMjBDBmp3KB9ZHOmsXgRXPZMvnBvPFh84axFHJ2rWQboWK2lavhLX/ATgtIOOVD X-Gm-Message-State: AOJu0YwnWY+5szIZmXJKz5b5ou3aEWO/jcP1Mfvr3LkVKuCHoJviFwGS x2icZJF65IWdYIk+rZYtjbvOg3UczFXA9BUCT9fH13h4sG6srThH48NQATUU X-Google-Smtp-Source: AGHT+IFn0SQfg5gTo1ErHfP8GnU4kmfGB6tPgeGrlP76MP0bAlBtL9Xi9l8o2ieIevSa0Qktl39emw== X-Received: by 2002:a17:903:449:b0:1da:2c01:fef5 with SMTP id iw9-20020a170903044900b001da2c01fef5mr544455plb.56.1708711537268; Fri, 23 Feb 2024 10:05:37 -0800 (PST) Received: from debian ([2601:641:300:14de:2595:938c:d7c1:5827]) by smtp.gmail.com with ESMTPSA id jc13-20020a17090325cd00b001db6de983d3sm11947607plb.85.2024.02.23.10.05.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Feb 2024 10:05:36 -0800 (PST) From: fan X-Google-Original-From: fan Date: Fri, 23 Feb 2024 10:05:20 -0800 To: nifan.cxl@gmail.com, wj28.lee@gmail.com Cc: qemu-devel@nongnu.org, jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org, gregory.price@memverge.com, ira.weiny@intel.com, dan.j.williams@intel.com, a.manzanares@samsung.com, dave@stgolabs.net, nmtadam.samsung@gmail.com, jim.harris@samsung.com, Fan Ni Subject: Re: [PATCH v4 00/10] Enabling DCD emulation support in Qemu Message-ID: References: <20240221182020.1086096-1-nifan.cxl@gmail.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240221182020.1086096-1-nifan.cxl@gmail.com> On Wed, Feb 21, 2024 at 10:15:53AM -0800, nifan.cxl@gmail.com wrote: > From: Fan Ni > > v3[1]->v4: > > The code is rebased on mainstream QEMU with the following patch series: > > hw/cxl/mailbox: change CCI cmd set structure to be a member, not a reference > hw/cxl/mailbox: interface to add CCI commands to an existing CCI > > Main changes include: > > 1. Updated the specification references to align with cxl spec r3.1. > 2. Add extra elements to get dc region configuration output payload and > procecced accordingly in mailbox command 4800h. > 3. Removed the unwanted space. > 4. Refactored ct3_build_cdat_entries_for_mr and extract it as a separate patch. > 5. Updated cxl_create_dc_regions function to derive region len from host > backend size. > 6. Changed the logic for creating DC regions when host backend and address > space processing is introduced, now cxl_create_dc_regions is called only > when host backend exists. > 7. Updated the name of the definitions related to DC extents for consistency. > 7. Updated dynamic capacity event record definition to align with spec r3.1. > 9. Changed the dynamic capacity request process logic, for release request, > extra checks are done against the pending list to remove the extent yet added. > 10. Changed the return value of cxl_create_dc_regions so the return can be used > to Remove the extent for the list if needed. > 11. offset and size in the qmp interface are changed to be byte-wise while the > original is MiB-wise. > 12. Fixed bugs in handling bitmap for dpa range existence. > 13. NOTE: in previous version DC is set to non-volatile, while in this version > we change it to volatile per Jonathan's suggestion. > 14. Updated the doc in qapi/cxl.json. > > Thank Jonathan for the detailed review of the last version[1]. > > The code is tested with Ira's last kernel DCD patch set [2] with some minor > bug fixes[3]. Tested operations include: > 1. create DC region; > 2. Add/release DC extents; > 3. convert DC capacity into system RAM (no real read/write to DCD tested); > > > v3: > [1] https://lore.kernel.org/linux-cxl/20231107180907.553451-1-nifan.cxl@gmail.com/T/#t > [2] https://github.com/weiny2/linux-kernel/tree/dcd-v3-2023-10-30 > [3] https://github.com/moking/linux-dcd/commit/9d24fa6e5d39f934623220953caecc080f93e964 > > Fan Ni (10): > hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output > payload of identify memory device command > hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative > and mailbox command support > include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for > type3 memory devices > hw/mem/cxl_type3: Add support to create DC regions to type3 memory > devices > hw/mem/cxl-type3: Refactor ct3_build_cdat_entries_for_mr to take mr > size insead of mr as argument > hw/mem/cxl_type3: Add host backend and address space handling for DC > regions > hw/mem/cxl_type3: Add DC extent list representative and get DC extent > list mailbox support > hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release > dynamic capacity response > hw/cxl/events: Add qmp interfaces to add/release dynamic capacity > extents > hw/mem/cxl_type3: Add dpa range validation for accesses to DC regions > > hw/cxl/cxl-mailbox-utils.c | 507 +++++++++++++++++++++++++++++++- > hw/mem/cxl_type3.c | 559 +++++++++++++++++++++++++++++++++--- > hw/mem/cxl_type3_stubs.c | 14 + > include/hw/cxl/cxl_device.h | 61 +++- > include/hw/cxl/cxl_events.h | 18 ++ > qapi/cxl.json | 61 +++- > 6 files changed, 1174 insertions(+), 46 deletions(-) > > -- > 2.43.0 > Hi, I fixed some issues mentioned by Wonjae Lee (wj28.lee@gmail.com) in his review comments and pushed the changes to my local tree: https://github.com/moking/qemu/tree/dcd-v4 This is no functional changes to the code, mainly fixes include: 1. Did spell check for the patchset and fixed 2 typos; 2. Fixed a misuse of stq_le_p and replaced it with stl_le_p in cmd_dcd_get_dyn_cap_config; 3. Removed unnecessary switch case in patch 9; 4. Capitalized ""opcode" to "Opcode" in two code comments; 5. Updated one reference text to the spec; 6. Minor text change in qapi/cxl.json. Thanks Wonjae for the careful review. I will wait until next week to send out v5 to see if there are further comments to come in. Fan