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From: Alison Schofield <alison.schofield@intel.com>
To: Li Ming <ming4.li@intel.com>
Cc: linux-cxl@vger.kernel.org,
	Dan Williams <dan.j.williams@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>
Subject: Re: [PATCH v3 1/1] cxl/mem: Fix no cxl_nvd during pmem region auto-assembing
Date: Mon, 17 Jun 2024 19:49:15 -0700	[thread overview]
Message-ID: <ZnD1qxTyiSMvkBTd@aschofie-mobl2> (raw)
In-Reply-To: <20240612064423.2567625-1-ming4.li@intel.com>

On Wed, Jun 12, 2024 at 02:44:23PM +0800, Li Ming wrote:
> When CXL subsystem is auto-assembling a pmem region during cxl
> endpoint port probing, always hit below calltrace.
> 
>  BUG: kernel NULL pointer dereference, address: 0000000000000078
>  #PF: supervisor read access in kernel mode
>  #PF: error_code(0x0000) - not-present page
>  RIP: 0010:cxl_pmem_region_probe+0x22e/0x360 [cxl_pmem]
>  Call Trace:
>   <TASK>
>   ? __die+0x24/0x70
>   ? page_fault_oops+0x82/0x160
>   ? do_user_addr_fault+0x65/0x6b0
>   ? exc_page_fault+0x7d/0x170
>   ? asm_exc_page_fault+0x26/0x30
>   ? cxl_pmem_region_probe+0x22e/0x360 [cxl_pmem]
>   ? cxl_pmem_region_probe+0x1ac/0x360 [cxl_pmem]
>   cxl_bus_probe+0x1b/0x60 [cxl_core]
>   really_probe+0x173/0x410
>   ? __pfx___device_attach_driver+0x10/0x10
>   __driver_probe_device+0x80/0x170
>   driver_probe_device+0x1e/0x90
>   __device_attach_driver+0x90/0x120
>   bus_for_each_drv+0x84/0xe0
>   __device_attach+0xbc/0x1f0
>   bus_probe_device+0x90/0xa0
>   device_add+0x51c/0x710
>   devm_cxl_add_pmem_region+0x1b5/0x380 [cxl_core]
>   cxl_bus_probe+0x1b/0x60 [cxl_core]
> 
> The cxl_nvd of the memdev needs to be available during pmem region
> probe. Currently the cxl_nvd is registered after the end port probe. The
> end point probe, in the case of autoassembly of regions, can cause a
> pmem region probe requiring the not yet available cxl_nvd. Adjust the
> sequence so this dependency is met.
> This requires adding a port parameter to cxl_find_nvdimm_bridge() that
> can be used to query the ancestor root port. The endpoint port is not
> yet available, but will share a common ancestor with it's parent, so
> start the query from there instead.
> 
> Fixes: f17b558d6663 ("cxl/pmem: Refactor nvdimm device registration, delete the workqueue")
> Co-developed-by: Dan Williams <dan.j.williams@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> Signed-off-by: Li Ming <ming4.li@intel.com>
> Tested-by: Alison Schofield <alison.schofield@intel.com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---

DaveJ please clean-up commit msg misspelling when applying.

Reviewed-by: Alison Schofield <alison.schofield@intel.com>



      reply	other threads:[~2024-06-18  2:49 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-12  6:44 [PATCH v3 1/1] cxl/mem: Fix no cxl_nvd during pmem region auto-assembing Li Ming
2024-06-18  2:49 ` Alison Schofield [this message]

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