Re: [PATCH v2 04/15] cxl: add capabilities field to cxl_dev_state

Alejandro Lucero Palau
2024-07-23T13:43:58Z

On 7/19/24 20:01, Dave Jiang wrote:
>
>>
>> -static int cxl_probe_regs(struct cxl_register_map *map)
>> +static int cxl_probe_regs(struct cxl_register_map *map, uint8_t caps)
>> {
>> struct cxl_component_reg_map *comp_map;
>> struct cxl_device_reg_map *dev_map;
>> @@ -437,11 +437,12 @@ static int cxl_probe_regs(struct cxl_register_map *map)
>> case CXL_REGLOC_RBI_MEMDEV:
>> dev_map = &map->device_map;
>> cxl_probe_device_regs(host, base, dev_map);
>> - if (!dev_map->status.valid || !dev_map->mbox.valid ||
>> + if (!dev_map->status.valid ||
>> + ((caps & CXL_DRIVER_CAP_MBOX) && !dev_map->mbox.valid) ||
>> !dev_map->memdev.valid) {
>> dev_err(host, "registers not found: %s%s%s\n",
>> !dev_map->status.valid ? "status " : "",
>> - !dev_map->mbox.valid ? "mbox " : "",
>> + ((caps & CXL_DRIVER_CAP_MBOX) && !dev_map->mbox.valid) ? "mbox " : "",
> According to the r3.1 8.2.8.2.1, the device status registers and the primary mailbox registers are both mandatory if regloc id=3 block is found. So if the type2 device does not implement a mailbox then it shouldn't be calling cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_MEMDEV, &map) to begin with from the driver init right? If the type2 device defines a regblock with id=3 but without a mailbox, then isn't that a spec violation?
>
> DJ

Right. The code needs to support the possibility of a Type2 having a
mailbox, and if it is not supported, the rest of the dvsec regs
initialization needs to be performed. This is not what the code does
now, so I'll fix this.

A wider explanation is, for the RFC I used a test driver based on QEMU
emulating a Type2 which had a CXL Device Register Interface defined
(03h) but not a CXL Device Capability with id 2 for the primary mailbox
register, breaking the spec as you spotted.

Thanks.