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[173.79.56.208]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-46132297c39sm55537921cf.50.2024.10.30.08.25.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Oct 2024 08:25:08 -0700 (PDT) Date: Wed, 30 Oct 2024 11:25:13 -0400 From: Gregory Price To: David Hildenbrand Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-mm@kvack.org, linux-cxl@vger.kernel.org, Jonathan.Cameron@huawei.com, dan.j.williams@intel.com, rrichter@amd.com, Terry.Bowman@amd.com, dave.jiang@intel.com, ira.weiny@intel.com, alison.schofield@intel.com, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, rafael@kernel.org, lenb@kernel.org, osalvador@suse.de, gregkh@linuxfoundation.org, akpm@linux-foundation.org, rppt@kernel.org Subject: Re: [PATCH v4 3/3] acpi,srat: give memory block size advice based on CFMWS alignment Message-ID: References: <20241029202041.25334-1-gourry@gourry.net> <20241029202041.25334-4-gourry@gourry.net> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Oct 30, 2024 at 11:40:08AM +0100, David Hildenbrand wrote: > On 29.10.24 21:20, Gregory Price wrote: > > Capacity is stranded when CFMWS regions are not aligned to block size. > > On x86, block size increases with capacity (2G blocks @ 64G capacity). > > > > Use CFMWS base/size to report memory block size alignment advice. > > > > Suggested-by: Dan Williams > > Signed-off-by: Gregory Price > > --- > > drivers/acpi/numa/srat.c | 19 +++++++++++++++++-- > > 1 file changed, 17 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/acpi/numa/srat.c b/drivers/acpi/numa/srat.c > > index 44f91f2c6c5d..a24aff38c465 100644 > > --- a/drivers/acpi/numa/srat.c > > +++ b/drivers/acpi/numa/srat.c > > @@ -14,6 +14,7 @@ > > #include > > #include > > #include > > +#include > > #include > > #include > > #include > > @@ -338,12 +339,26 @@ static int __init acpi_parse_cfmws(union acpi_subtable_headers *header, > > { > > struct acpi_cedt_cfmws *cfmws; > > int *fake_pxm = arg; > > - u64 start, end; > > + u64 start, end, align, size; > > int node; > > cfmws = (struct acpi_cedt_cfmws *)header; > > start = cfmws->base_hpa; > > - end = cfmws->base_hpa + cfmws->window_size; > > + size = cfmws->window_size; > > + end = cfmws->base_hpa + size; > > + > > + /* Align memblock size to CFMW regions if possible */ > > + for (align = SZ_64T; align >= SZ_256M; align >>= 1) { > > + if (IS_ALIGNED(start, align) && IS_ALIGNED(size, align)) > > + break; > > + } > > Are there maybe some nice tricks bi-tricks to avoid the loop and these > hardcoded limits? :) > > align = 1UL << __ffs(start | end)); > > Assuming "unsigned long" is sufficient in this code (64bit) and "start | > end" will never be 0. > This will work, if start | end is < 256MB, the ACPI table is invalid by definition since either the block itself is <256MB or the size is 0 (which is nonsense). So yeah i can simplify here. Ack. will push v5 once i get KLP to clear another warning. > -- > Cheers, > > David / dhildenb >