Linux CXL
 help / color / mirror / Atom feed
From: Dave Jiang <dave.jiang@intel.com>
To: shiju.jose@huawei.com, linux-cxl@vger.kernel.org,
	dan.j.williams@intel.com, jonathan.cameron@huawei.com,
	alison.schofield@intel.com, dave@stgolabs.net,
	vishal.l.verma@intel.com, ira.weiny@intel.com
Cc: tanxiaofei@huawei.com, prime.zeng@hisilicon.com, linuxarm@huawei.com
Subject: Re: [PATCH] cxl/events: Update memory event type for patrol scrub cycle end event
Date: Wed, 10 Dec 2025 07:47:20 -0700	[thread overview]
Message-ID: <a98e51a3-7939-4fca-9983-413d250f178a@intel.com> (raw)
In-Reply-To: <20251210131235.1731-1-shiju.jose@huawei.com>



On 12/10/25 6:12 AM, shiju.jose@huawei.com wrote:
> From: Shiju Jose <shiju.jose@huawei.com>
> 
> According to the CXL Specification Revision 4.0, Advanced CVME (Corrected
> Volatile Memory Error) enhancements added additional granularity control
> and event generation for Patrol Scrub cycle end.
> 
> Update Memory Event Type field in the trace events for section
> 8.2.10.2.1.1, Table 8-224 (General Media Event Record), and section
> 8.2.10.2.1.2, Table 8-225 (DRAM Event Record), to include the event type
> 'Patrol Scrub cycle end'.
> 
> Signed-off-by: Shiju Jose <shiju.jose@huawei.com>

Reviewed-by: Dave Jiang <dave.jiang@intel.com>

> ---
> Open Question,
> Option to enable event generation for 'Patrol Scrub cycle end' is given in
> the Memory Error Threshold feature, Section 8.2.10.9.11.3 Advanced
> Programmable Corrected  Volatile Memory Error Threshold Feature Discovery
> and Configuration. Does support of this Memory Error Threshold feature is
> required in the kernel or via fwctl?

Any thoughts Jonathan? Is that something that would be exposed through EDAC?

DJ

> ---
>  drivers/cxl/core/trace.h | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> index a972e4ef1936..e79c2bd415af 100644
> --- a/drivers/cxl/core/trace.h
> +++ b/drivers/cxl/core/trace.h
> @@ -367,6 +367,7 @@ TRACE_EVENT(cxl_generic_event,
>  #define CXL_GMER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR	0x04
>  #define CXL_GMER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE	0x05
>  #define CXL_GMER_MEM_EVT_TYPE_CKID_VIOLATION		0x06
> +#define CXL_GMER_MEM_EVT_TYPE_AP_CME_PS_CYCLE_END	0x07
>  #define show_gmer_mem_event_type(type)	__print_symbolic(type,				\
>  	{ CXL_GMER_MEM_EVT_TYPE_ECC_ERROR,		"ECC Error" },			\
>  	{ CXL_GMER_MEM_EVT_TYPE_INV_ADDR,		"Invalid Address" },		\
> @@ -374,7 +375,8 @@ TRACE_EVENT(cxl_generic_event,
>  	{ CXL_GMER_MEM_EVT_TYPE_TE_STATE_VIOLATION,	"TE State Violation" },		\
>  	{ CXL_GMER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR,	"Scrub Media ECC Error" },	\
>  	{ CXL_GMER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE,	"Adv Prog CME Counter Expiration" },	\
> -	{ CXL_GMER_MEM_EVT_TYPE_CKID_VIOLATION,		"CKID Violation" }		\
> +	{ CXL_GMER_MEM_EVT_TYPE_CKID_VIOLATION,		"CKID Violation" },		\
> +	{ CXL_GMER_MEM_EVT_TYPE_AP_CME_PS_CYCLE_END,	"Adv Prog CME Patrol Scrub Cycle End" }	\
>  )
>  
>  #define CXL_GMER_TRANS_UNKNOWN				0x00
> @@ -554,6 +556,7 @@ TRACE_EVENT(cxl_general_media,
>  #define CXL_DER_MEM_EVT_TYPE_TE_STATE_VIOLATION	0x04
>  #define CXL_DER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE	0x05
>  #define CXL_DER_MEM_EVT_TYPE_CKID_VIOLATION		0x06
> +#define CXL_DER_MEM_EVT_TYPE_AP_CME_PS_CYCLE_END	0x07
>  #define show_dram_mem_event_type(type)	__print_symbolic(type,					\
>  	{ CXL_DER_MEM_EVT_TYPE_ECC_ERROR,		"ECC Error" },				\
>  	{ CXL_DER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR,	"Scrub Media ECC Error" },		\
> @@ -561,7 +564,8 @@ TRACE_EVENT(cxl_general_media,
>  	{ CXL_DER_MEM_EVT_TYPE_DATA_PATH_ERROR,		"Data Path Error" },			\
>  	{ CXL_DER_MEM_EVT_TYPE_TE_STATE_VIOLATION,	"TE State Violation" },			\
>  	{ CXL_DER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE,	"Adv Prog CME Counter Expiration" },	\
> -	{ CXL_DER_MEM_EVT_TYPE_CKID_VIOLATION,		"CKID Violation" }			\
> +	{ CXL_DER_MEM_EVT_TYPE_CKID_VIOLATION,		"CKID Violation" },			\
> +	{ CXL_DER_MEM_EVT_TYPE_AP_CME_PS_CYCLE_END,	"Adv Prog CME Patrol Scrub Cycle End" }	\
>  )
>  
>  #define CXL_DER_VALID_CHANNEL				BIT(0)


  reply	other threads:[~2025-12-10 14:47 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-10 13:12 [PATCH] cxl/events: Update memory event type for patrol scrub cycle end event shiju.jose
2025-12-10 14:47 ` Dave Jiang [this message]
2025-12-15 10:52   ` Jonathan Cameron

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a98e51a3-7939-4fca-9983-413d250f178a@intel.com \
    --to=dave.jiang@intel.com \
    --cc=alison.schofield@intel.com \
    --cc=dan.j.williams@intel.com \
    --cc=dave@stgolabs.net \
    --cc=ira.weiny@intel.com \
    --cc=jonathan.cameron@huawei.com \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linuxarm@huawei.com \
    --cc=prime.zeng@hisilicon.com \
    --cc=shiju.jose@huawei.com \
    --cc=tanxiaofei@huawei.com \
    --cc=vishal.l.verma@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox