From: Alejandro Lucero Palau <alucerop@amd.com>
To: Dave Jiang <dave.jiang@intel.com>,
alejandro.lucero-palau@amd.com, linux-cxl@vger.kernel.org,
netdev@vger.kernel.org, dan.j.williams@intel.com,
martin.habets@xilinx.com, edward.cree@amd.com,
davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com,
edumazet@google.com
Subject: Re: [PATCH v3 12/20] efx: use acquire_endpoint when looking for free HPA
Date: Mon, 16 Sep 2024 11:29:22 +0100 [thread overview]
Message-ID: <a9ecb9db-fd3c-21ec-b39a-a97bbcc8e988@amd.com> (raw)
In-Reply-To: <339d40b0-95f7-4174-9d0e-a954dc23c164@intel.com>
On 9/13/24 00:09, Dave Jiang wrote:
>
> On 9/7/24 1:18 AM, alejandro.lucero-palau@amd.com wrote:
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Asking for availbale HPA space is the previous step to try to obtain
>> an HPA range suitable to accel driver purposes.
>>
>> Add this call to efx cxl initialization and use acquire_endpoint for
>> avoiding potential races with cxl port creation.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> ---
>> drivers/net/ethernet/sfc/efx.c | 8 +++++++-
>> drivers/net/ethernet/sfc/efx_cxl.c | 32 ++++++++++++++++++++++++++++++
>> 2 files changed, 39 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/net/ethernet/sfc/efx.c b/drivers/net/ethernet/sfc/efx.c
>> index 3a7406aa950c..08a2f527df16 100644
>> --- a/drivers/net/ethernet/sfc/efx.c
>> +++ b/drivers/net/ethernet/sfc/efx.c
>> @@ -1117,10 +1117,16 @@ static int efx_pci_probe(struct pci_dev *pci_dev,
>> * used for PIO buffers. If there is no CXL support, or initialization
>> * fails, efx_cxl_pio_initialised wll be false and legacy PIO buffers
>> * defined at specific PCI BAR regions will be used.
>> + *
>> + * The only error to handle is -EPROBE_DEFER happening if the root port
>> + * is not there yet.
>> */
>> rc = efx_cxl_init(efx);
>> - if (rc)
>> + if (rc) {
>> + if (rc == -EPROBE_DEFER)
>> + goto fail2;
>> pci_err(pci_dev, "CXL initialization failed with error %d\n", rc);
>> + }
>>
>> rc = efx_pci_probe_post_io(efx);
>> if (rc) {
>> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
>> index 899bc823a212..826759caa552 100644
>> --- a/drivers/net/ethernet/sfc/efx_cxl.c
>> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
>> @@ -23,6 +23,7 @@ int efx_cxl_init(struct efx_nic *efx)
>> struct pci_dev *pci_dev = efx->pci_dev;
>> struct efx_cxl *cxl;
>> struct resource res;
>> + resource_size_t max;
>> u16 dvsec;
>> int rc;
>>
>> @@ -90,7 +91,38 @@ int efx_cxl_init(struct efx_nic *efx)
>> goto err;
>> }
>>
>> + cxl->endpoint = cxl_acquire_endpoint(cxl->cxlmd);
>> + if (IS_ERR(cxl->endpoint)) {
>> + rc = PTR_ERR(cxl->endpoint);
>> + if (rc != -EPROBE_DEFER) {
>> + pci_err(pci_dev, "CXL accel acquire endpoint failed");
>> + goto err;
>> + }
> What happens if (rc == -EPROBE_DEFER)? Here it drops down but you don't have a valid cxl->endpoint when cxl_get_hpa_freespace() is called.
>
> DJ
>
I missed it!
I thought about implementing a test case for this situation what would
have shown the bug ...
FWIW, the caller is checking that specific return.
Thanks!
>> + }
>> +
>> + cxl->cxlrd = cxl_get_hpa_freespace(cxl->endpoint,
>> + CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2,
>> + &max);
>> +
>> + if (IS_ERR(cxl->cxlrd)) {
>> + pci_err(pci_dev, "cxl_get_hpa_freespace failed\n");
>> + rc = PTR_ERR(cxl->cxlrd);
>> + goto err_release;
>> + }
>> +
>> + if (max < EFX_CTPIO_BUFFER_SIZE) {
>> + pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
>> + __func__, max, EFX_CTPIO_BUFFER_SIZE);
>> + rc = -ENOSPC;
>> + goto err;
>> + }
>> +
>> + cxl_release_endpoint(cxl->cxlmd, cxl->endpoint);
>> +
>> return 0;
>> +
>> +err_release:
>> + cxl_release_endpoint(cxl->cxlmd, cxl->endpoint);
>> err:
>> kfree(cxl->cxlds);
>> kfree(cxl);
next prev parent reply other threads:[~2024-09-16 10:30 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-07 8:18 [PATCH v3 00/20] cxl: add Type2 device support alejandro.lucero-palau
2024-09-07 8:18 ` [PATCH v3 01/20] cxl: add type2 device basic support alejandro.lucero-palau
2024-09-07 20:26 ` kernel test robot
2024-09-10 6:12 ` Li, Ming4
2024-09-10 7:25 ` Alejandro Lucero Palau
2024-09-12 8:57 ` Zhi Wang
2024-09-16 9:52 ` Alejandro Lucero Palau
2024-09-12 9:35 ` Zhi Wang
2024-09-16 10:03 ` Alejandro Lucero Palau
2024-09-13 16:41 ` Jonathan Cameron
2024-09-16 12:03 ` Alejandro Lucero Palau
2024-09-16 12:24 ` Jonathan Cameron
2024-09-07 8:18 ` [PATCH v3 02/20] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-09-07 18:08 ` kernel test robot
2024-09-11 22:17 ` Dave Jiang
2024-09-16 8:36 ` Alejandro Lucero Palau
2024-09-16 16:07 ` Dave Jiang
2024-09-13 17:25 ` Jonathan Cameron
2024-09-16 12:13 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 03/20] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-09-10 3:26 ` Li, Ming4
2024-09-10 6:24 ` Li, Ming4
2024-09-10 7:31 ` Alejandro Lucero Palau
2024-09-11 23:06 ` Dave Jiang
2024-09-16 8:56 ` Alejandro Lucero Palau
2024-09-16 16:11 ` Dave Jiang
2024-09-13 17:28 ` Jonathan Cameron
2024-09-16 12:17 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 04/20] cxl: move pci generic code alejandro.lucero-palau
2024-09-11 23:55 ` Dave Jiang
2024-09-16 9:46 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 05/20] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-09-10 6:00 ` Li, Ming4
2024-09-10 7:24 ` Alejandro Lucero Palau
2024-09-12 9:08 ` Zhi Wang
2024-09-13 17:32 ` Jonathan Cameron
2024-09-16 12:23 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 06/20] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-09-10 6:15 ` Li, Ming4
2024-09-16 8:15 ` Alejandro Lucero Palau
2024-09-13 17:35 ` Jonathan Cameron
2024-09-16 12:33 ` Alejandro Lucero Palau
2024-09-16 13:21 ` Jonathan Cameron
2024-09-07 8:18 ` [PATCH v3 07/20] cxl: harden resource_contains checks to handle zero size resources alejandro.lucero-palau
2024-09-13 17:36 ` Jonathan Cameron
2024-09-16 12:36 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 08/20] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-09-07 8:18 ` [PATCH v3 09/20] cxl: support type2 memdev creation alejandro.lucero-palau
2024-09-12 18:19 ` Dave Jiang
2024-09-16 12:38 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 10/20] cxl: indicate probe deferral alejandro.lucero-palau
2024-09-10 6:37 ` Li, Ming4
2024-09-16 8:24 ` Alejandro Lucero Palau
2024-09-17 3:31 ` Li, Ming4
2024-09-17 9:16 ` Alejandro Lucero Palau
2024-09-12 9:19 ` Zhi Wang
2024-09-16 10:08 ` Alejandro Lucero Palau
2024-09-13 17:43 ` Jonathan Cameron
2024-09-16 13:24 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 11/20] cxl: define a driver interface for HPA free space enumaration alejandro.lucero-palau
2024-09-13 17:52 ` Jonathan Cameron
2024-09-16 14:09 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 12/20] efx: use acquire_endpoint when looking for free HPA alejandro.lucero-palau
2024-09-07 19:33 ` kernel test robot
2024-09-12 23:09 ` Dave Jiang
2024-09-16 10:29 ` Alejandro Lucero Palau [this message]
2024-09-07 8:18 ` [PATCH v3 13/20] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-09-13 17:59 ` Jonathan Cameron
2024-09-16 14:26 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 14/20] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-09-07 8:18 ` [PATCH v3 15/20] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-09-07 8:18 ` [PATCH v3 16/20] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-09-07 8:18 ` [PATCH v3 17/20] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-09-13 18:08 ` Jonathan Cameron
2024-09-16 16:31 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 18/20] cxl: preclude device memory to be used for dax alejandro.lucero-palau
2024-09-13 17:26 ` Dave Jiang
2024-09-16 14:32 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 19/20] cxl: add function for obtaining params from a region alejandro.lucero-palau
2024-09-13 17:48 ` Dave Jiang
2024-09-16 16:22 ` Alejandro Lucero Palau
2024-09-07 8:18 ` [PATCH v3 20/20] efx: support pio mapping based on cxl alejandro.lucero-palau
2024-09-13 17:45 ` Edward Cree
2024-09-16 16:12 ` Alejandro Lucero Palau
2024-09-13 17:52 ` Dave Jiang
2024-09-16 16:23 ` Alejandro Lucero Palau
2024-09-13 18:10 ` Jonathan Cameron
2024-09-16 16:23 ` Alejandro Lucero Palau
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