* [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605
@ 2025-05-08 0:00 anisa.su887
2025-05-08 0:00 ` [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file anisa.su887
` (10 more replies)
0 siblings, 11 replies; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:00 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
This patchset adds support for 6 FM API DCD Management commands (0x5600-0x5605)
according to the CXL r3.2 Spec. It is based on the following branch:
https://gitlab.com/jic23/qemu/-/tree/cxl-2025-02-20.
The code was tested with libcxlmi, which runs in the QEMU VM and sends 56xxh
commands to the device (QEMU emulated) through MCTP messages over I2C
bus. To perform end-to-end tests, both MCTP and DCD support are needed
for the kernel, so the needed MCTP patches are applied on top of Ira's DCD
branch https://github.com/weiny2/linux-kernel/tree/dcd-v4-2024-12-11.
For the tests of commands 0x5600 (Get DCD Info), 0x5601 (Get Host DC Region
Config), and 0x5603 (Get DC Region Extent Lists), DCD kernel code is not involved.
The libcxlmi test program is used to send the command to the device and results
are collected and verified.
For command 0x5602 (Set DC Region Config): device creates an event record with type
DC_EVENT_REGION_CONFIG_UPDATED and triggers an interrupt to the host
if the configuration changes as a result of the command. Currently, the kernel
version used to test this only supports Add/Release type events. Thus, this
request essentially gets ignored but did not cause problems besides the host
not knowing about the configuration change when tested.
For the command 0x5604 (Initiate DC Add) and 0x5605 (Initiate DC Release), the
tests involve libcxlmi test program (acting as the FM), kernel DCD
code (host) and QEMU device. The test workflow follows that in cxl r3.2 section
7.6.7.6.5 and 7.6.7.6.6. More specifically, the tests involve following
steps,
1. Start a VM with CXL topology: https://github.com/moking/cxl-test-tool/blob/main/utils/cxl.py#L54.
2. Load the CXL related drivers in the VM;
3. Create a DC region for the DCD device attached.
4. add/release DC extents by sending 0x5604 and 0x5605 respectively through
the out-of-tree libcxlmi test program
(https://github.com/anisa-su993/libcxlmi/blob/dcd_management_cmds/tests/test-fmapi.c).
5. Check and verify the extents by retrieving the extents list through
command 0x5603 in the test program.
The remaining 3 commands in this series (0x5606-0x5608) are related to tags
and sharing, thus have not been implemented.
Changes
================================================================================
v1 -> v2:
1. Feedback from Jonathan Cameron on v1
Addressed general style concerns (newlines/spacing, minor refactoring, etc.)
1.1. Changes Related to 0x5600 - FMAPI Get DCD Info
- Squashed prepatory patch adding supported_blk_sizes_bitmask
- Added new prepatory patch moving opcodes enum from cxl-mailbox-utils.c to
new header file opcodes.h
Needed for the check in i2c_mctp_cxl.c to ensure the FMAPI Commands
(0x51 - 0x59) are bound with MCTP_MT_CXL_FMAPI. By moving the enum,
the hardcoded values (0x51, 0x59) can be replaced with their
enumerators.
- Bug fix to return Add/Release Extent Selection Policy bitmasks
correctly
1.2. Changes Related to 0x5601 - FMAPI Get Host Region Config
- Prepatory patch to add dsmas_flags to CXLDCRegion struct was modified to
store the booleans dsmas_flags is made up of instead of copying it from the
CDAT for that region. Values hardcoded for unsupported flags.
- Build the returned dsmas_flags from the new booleans.
1.3. Changes Related to 0x5602 - FMAPI Set DC Region Config
- Added locking for CXLDCRegion bitmap for the case that extents are being
added/released via a different CCI than that of the FM-enabled CCI.
- Prepatory patch created for the above (quite short, can be squashed if
preferred)
- Added a check to verify that the requested block_size is supported by the
region by looking at region->supported_blk_sizes_bitmask
- Instead of event_record validity flag being cleared, set to 1
- Fixed bug of forgetting to update region->block_size
1.4. Changes Related to 0x5603 - FMAPI Get DC Region Extents
- Minor refactoring of loop filling in response payload extents
2. Feedback from Fan Ni and Jonathan Cameron on v1
2.1. Changes Related to 0x5604 - FMAPI Initiate DC Add
- Remove redundant storage of extents in event_rec_exts
- Refactor event record creation into helper function for re-use by release
- Return event_record.available_extents
(total_extents_available - num_pending - num_accepted) instead of
leaving it blank
2.2. Changes Related to 0x5605 - FMAPI Initiate DC Release
- Remove redundant storage of extents in event_rec_exts/redundant 2nd loop
- Add #define for removal_policy_bitmask instead of hardcoding 0x7
Anisa Su (10):
cxl-mailbox-utils: Move opcodes enum to new header file
cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
cxl/type3: Add dsmas_flags to CXLDCRegion struct
cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
cxl_events.h: Move definition for dynamic_capacity_uuid and enum for
DC event types
hw/cxl_type3: Add DC Region bitmap lock
cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
hw/cxl/cxl-mailbox-utils.c | 649 +++++++++++++++++++++++++++++++----
hw/cxl/i2c_mctp_cxl.c | 6 +-
hw/mem/cxl_type3.c | 41 ++-
include/hw/cxl/cxl_device.h | 24 ++
include/hw/cxl/cxl_events.h | 15 +
include/hw/cxl/cxl_mailbox.h | 6 +
include/hw/cxl/cxl_opcodes.h | 72 ++++
7 files changed, 724 insertions(+), 89 deletions(-)
create mode 100644 include/hw/cxl/cxl_opcodes.h
--
2.47.2
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
@ 2025-05-08 0:00 ` anisa.su887
2025-05-20 15:37 ` Fan Ni
2025-05-08 0:00 ` [PATCH v2 02/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info anisa.su887
` (9 subsequent siblings)
10 siblings, 1 reply; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:00 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
In preparation for the next patch, move opcodes enum to new cxl_opcodes.h file
for visibility from mailbox-utils.c and i2c_mctp_cxl.c, which checks that
certain command sets are bound with the correct MCTP binding.
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 68 ++----------------------------------
include/hw/cxl/cxl_opcodes.h | 64 +++++++++++++++++++++++++++++++++
2 files changed, 66 insertions(+), 66 deletions(-)
create mode 100644 include/hw/cxl/cxl_opcodes.h
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index a02d130926..ed3294530f 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -23,6 +23,7 @@
#include "qemu/uuid.h"
#include "system/hostmem.h"
#include "qemu/range.h"
+#include "hw/cxl/cxl_opcodes.h"
#define CXL_CAPACITY_MULTIPLIER (256 * MiB)
#define CXL_DC_EVENT_LOG_SIZE 8
@@ -36,7 +37,7 @@
/*
* How to add a new command, example. The command set FOO, with cmd BAR.
- * 1. Add the command set and cmd to the enum.
+ * 1. Add the command set and cmd to the enum in cxl_opcodes.h.
* FOO = 0x7f,
* #define BAR 0
* 2. Implement the handler
@@ -59,71 +60,6 @@
* a register interface that already deals with it.
*/
-enum {
- INFOSTAT = 0x00,
- #define IS_IDENTIFY 0x1
- #define BACKGROUND_OPERATION_STATUS 0x2
- #define GET_RESPONSE_MSG_LIMIT 0x3
- #define SET_RESPONSE_MSG_LIMIT 0x4
- #define BACKGROUND_OPERATION_ABORT 0x5
- EVENTS = 0x01,
- #define GET_RECORDS 0x0
- #define CLEAR_RECORDS 0x1
- #define GET_INTERRUPT_POLICY 0x2
- #define SET_INTERRUPT_POLICY 0x3
- FIRMWARE_UPDATE = 0x02,
- #define GET_INFO 0x0
- #define TRANSFER 0x1
- #define ACTIVATE 0x2
- TIMESTAMP = 0x03,
- #define GET 0x0
- #define SET 0x1
- LOGS = 0x04,
- #define GET_SUPPORTED 0x0
- #define GET_LOG 0x1
- #define GET_LOG_CAPABILITIES 0x2
- #define CLEAR_LOG 0x3
- #define POPULATE_LOG 0x4
- FEATURES = 0x05,
- #define GET_SUPPORTED 0x0
- #define GET_FEATURE 0x1
- #define SET_FEATURE 0x2
- IDENTIFY = 0x40,
- #define MEMORY_DEVICE 0x0
- CCLS = 0x41,
- #define GET_PARTITION_INFO 0x0
- #define GET_LSA 0x2
- #define SET_LSA 0x3
- HEALTH_INFO_ALERTS = 0x42,
- #define GET_ALERT_CONFIG 0x1
- #define SET_ALERT_CONFIG 0x2
- SANITIZE = 0x44,
- #define OVERWRITE 0x0
- #define SECURE_ERASE 0x1
- #define MEDIA_OPERATIONS 0x2
- PERSISTENT_MEM = 0x45,
- #define GET_SECURITY_STATE 0x0
- MEDIA_AND_POISON = 0x43,
- #define GET_POISON_LIST 0x0
- #define INJECT_POISON 0x1
- #define CLEAR_POISON 0x2
- #define GET_SCAN_MEDIA_CAPABILITIES 0x3
- #define SCAN_MEDIA 0x4
- #define GET_SCAN_MEDIA_RESULTS 0x5
- DCD_CONFIG = 0x48,
- #define GET_DC_CONFIG 0x0
- #define GET_DYN_CAP_EXT_LIST 0x1
- #define ADD_DYN_CAP_RSP 0x2
- #define RELEASE_DYN_CAP 0x3
- PHYSICAL_SWITCH = 0x51,
- #define IDENTIFY_SWITCH_DEVICE 0x0
- #define GET_PHYSICAL_PORT_STATE 0x1
- TUNNEL = 0x53,
- #define MANAGEMENT_COMMAND 0x0
- MHD = 0x55,
- #define GET_MHD_INFO 0x0
-};
-
/* CCI Message Format CXL r3.1 Figure 7-19 */
typedef struct CXLCCIMessage {
uint8_t category;
diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
new file mode 100644
index 0000000000..26d3a99e8a
--- /dev/null
+++ b/include/hw/cxl/cxl_opcodes.h
@@ -0,0 +1,64 @@
+enum {
+ INFOSTAT = 0x00,
+ #define IS_IDENTIFY 0x1
+ #define BACKGROUND_OPERATION_STATUS 0x2
+ #define GET_RESPONSE_MSG_LIMIT 0x3
+ #define SET_RESPONSE_MSG_LIMIT 0x4
+ #define BACKGROUND_OPERATION_ABORT 0x5
+ EVENTS = 0x01,
+ #define GET_RECORDS 0x0
+ #define CLEAR_RECORDS 0x1
+ #define GET_INTERRUPT_POLICY 0x2
+ #define SET_INTERRUPT_POLICY 0x3
+ FIRMWARE_UPDATE = 0x02,
+ #define GET_INFO 0x0
+ #define TRANSFER 0x1
+ #define ACTIVATE 0x2
+ TIMESTAMP = 0x03,
+ #define GET 0x0
+ #define SET 0x1
+ LOGS = 0x04,
+ #define GET_SUPPORTED 0x0
+ #define GET_LOG 0x1
+ #define GET_LOG_CAPABILITIES 0x2
+ #define CLEAR_LOG 0x3
+ #define POPULATE_LOG 0x4
+ FEATURES = 0x05,
+ #define GET_SUPPORTED 0x0
+ #define GET_FEATURE 0x1
+ #define SET_FEATURE 0x2
+ IDENTIFY = 0x40,
+ #define MEMORY_DEVICE 0x0
+ CCLS = 0x41,
+ #define GET_PARTITION_INFO 0x0
+ #define GET_LSA 0x2
+ #define SET_LSA 0x3
+ HEALTH_INFO_ALERTS = 0x42,
+ #define GET_ALERT_CONFIG 0x1
+ #define SET_ALERT_CONFIG 0x2
+ SANITIZE = 0x44,
+ #define OVERWRITE 0x0
+ #define SECURE_ERASE 0x1
+ #define MEDIA_OPERATIONS 0x2
+ PERSISTENT_MEM = 0x45,
+ #define GET_SECURITY_STATE 0x0
+ MEDIA_AND_POISON = 0x43,
+ #define GET_POISON_LIST 0x0
+ #define INJECT_POISON 0x1
+ #define CLEAR_POISON 0x2
+ #define GET_SCAN_MEDIA_CAPABILITIES 0x3
+ #define SCAN_MEDIA 0x4
+ #define GET_SCAN_MEDIA_RESULTS 0x5
+ DCD_CONFIG = 0x48,
+ #define GET_DC_CONFIG 0x0
+ #define GET_DYN_CAP_EXT_LIST 0x1
+ #define ADD_DYN_CAP_RSP 0x2
+ #define RELEASE_DYN_CAP 0x3
+ PHYSICAL_SWITCH = 0x51,
+ #define IDENTIFY_SWITCH_DEVICE 0x0
+ #define GET_PHYSICAL_PORT_STATE 0x1
+ TUNNEL = 0x53,
+ #define MANAGEMENT_COMMAND 0x0
+ MHD = 0x55,
+ #define GET_MHD_INFO 0x0
+};
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v2 02/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
2025-05-08 0:00 ` [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file anisa.su887
@ 2025-05-08 0:00 ` anisa.su887
2025-05-20 15:59 ` Fan Ni
2025-05-30 14:07 ` Jonathan Cameron
2025-05-08 0:00 ` [PATCH v2 03/10] cxl/type3: Add dsmas_flags to CXLDCRegion struct anisa.su887
` (8 subsequent siblings)
10 siblings, 2 replies; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:00 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1.
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 56 ++++++++++++++++++++++++++++++++++++
hw/cxl/i2c_mctp_cxl.c | 6 ++--
hw/mem/cxl_type3.c | 4 +++
include/hw/cxl/cxl_device.h | 1 +
include/hw/cxl/cxl_opcodes.h | 3 ++
5 files changed, 68 insertions(+), 2 deletions(-)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index ed3294530f..d3c69233b8 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -3280,6 +3280,52 @@ static CXLRetCode cmd_dcd_release_dyn_cap(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/* CXL r3.2 section 7.6.7.6.1: Get DCD Info (Opcode 5600h) */
+static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint8_t num_hosts;
+ uint8_t num_regions_supported;
+ uint8_t rsvd1[2];
+ uint16_t add_select_policy_bitmask;
+ uint8_t rsvd2[2];
+ uint16_t release_select_policy_bitmask;
+ uint8_t sanitize_on_release_bitmask;
+ uint8_t rsvd3;
+ uint64_t total_dynamic_capacity;
+ uint64_t region_blk_size_bitmasks[8];
+ } QEMU_PACKED *out = (void *)payload_out;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ CXLDCRegion *region;
+ int i;
+
+ out->num_hosts = 1;
+ out->num_regions_supported = ct3d->dc.num_regions;
+ stw_le_p(&out->add_select_policy_bitmask,
+ BIT(CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE));
+ stw_le_p(&out->release_select_policy_bitmask,
+ BIT(CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE));
+ out->sanitize_on_release_bitmask = 0;
+
+ stq_le_p(&out->total_dynamic_capacity,
+ ct3d->dc.total_capacity / CXL_CAPACITY_MULTIPLIER);
+
+ for (i = 0; i < ct3d->dc.num_regions; i++) {
+ region = &ct3d->dc.regions[i];
+ memcpy(&out->region_blk_size_bitmasks[i],
+ ®ion->supported_blk_size_bitmask,
+ sizeof(out->region_blk_size_bitmasks[i]));
+ }
+
+ *len_out = sizeof(*out);
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3401,6 +3447,11 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
cmd_tunnel_management_cmd, ~0, 0 },
};
+static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
+ [FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
+ cmd_fm_get_dcd_info, 0, 0 },
+};
+
/*
* While the command is executing in the background, the device should
* update the percentage complete in the Background Command Status Register
@@ -3703,7 +3754,12 @@ void cxl_initialize_t3_fm_owned_ld_mctpcci(CXLCCI *cci, DeviceState *d,
DeviceState *intf,
size_t payload_max)
{
+ CXLType3Dev *ct3d = CXL_TYPE3(d);
+
cxl_copy_cci_commands(cci, cxl_cmd_set_t3_fm_owned_ld_mctp);
+ if (ct3d->dc.num_regions) {
+ cxl_copy_cci_commands(cci, cxl_cmd_set_fm_dcd);
+ }
cci->d = d;
cci->intf = intf;
cxl_init_cci(cci, payload_max);
diff --git a/hw/cxl/i2c_mctp_cxl.c b/hw/cxl/i2c_mctp_cxl.c
index 7d2cbc3b75..dd5fc4f393 100644
--- a/hw/cxl/i2c_mctp_cxl.c
+++ b/hw/cxl/i2c_mctp_cxl.c
@@ -29,6 +29,7 @@
#include "hw/pci/pcie_port.h"
#include "hw/qdev-properties.h"
#include "hw/registerfields.h"
+#include "hw/cxl/cxl_opcodes.h"
#define TYPE_I2C_MCTP_CXL "i2c_mctp_cxl"
@@ -198,9 +199,10 @@ static void i2c_mctp_cxl_handle_message(MCTPI2CEndpoint *mctp)
*/
if (!(msg->message_type == MCTP_MT_CXL_TYPE3 &&
- msg->command_set < 0x51) &&
+ msg->command_set < PHYSICAL_SWITCH) &&
!(msg->message_type == MCTP_MT_CXL_FMAPI &&
- msg->command_set >= 0x51 && msg->command_set < 0x56)) {
+ msg->command_set >= PHYSICAL_SWITCH &&
+ msg->command_set < GLOBAL_MEMORY_ACCESS_EP_MGMT)) {
buf->rc = CXL_MBOX_UNSUPPORTED;
st24_le_p(buf->pl_length, len_out);
s->len = s->pos;
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 11c38a9292..7129da0940 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: GPL-v2-only
*/
+#include <math.h>
#include "qemu/osdep.h"
#include "qemu/units.h"
@@ -766,6 +767,8 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
uint64_t region_len;
uint64_t decode_len;
uint64_t blk_size = 2 * MiB;
+ /* Only 1 block size is supported for now. */
+ uint64_t supported_blk_size_bitmask = BIT((int) log2(blk_size));
CXLDCRegion *region;
MemoryRegion *mr;
uint64_t dc_size;
@@ -811,6 +814,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
.block_size = blk_size,
/* dsmad_handle set when creating CDAT table entries */
.flags = 0,
+ .supported_blk_size_bitmask = supported_blk_size_bitmask,
};
ct3d->dc.total_capacity += region->len;
region->blk_bitmap = bitmap_new(region->len / region->block_size);
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index ca515cab13..bebed04085 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -608,6 +608,7 @@ typedef struct CXLDCRegion {
uint32_t dsmadhandle;
uint8_t flags;
unsigned long *blk_bitmap;
+ uint64_t supported_blk_size_bitmask;
} CXLDCRegion;
typedef struct CXLSetFeatureInfo {
diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
index 26d3a99e8a..c4c233665e 100644
--- a/include/hw/cxl/cxl_opcodes.h
+++ b/include/hw/cxl/cxl_opcodes.h
@@ -61,4 +61,7 @@ enum {
#define MANAGEMENT_COMMAND 0x0
MHD = 0x55,
#define GET_MHD_INFO 0x0
+ FMAPI_DCD_MGMT = 0x56,
+ #define GET_DCD_INFO 0x0
+ GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
};
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v2 03/10] cxl/type3: Add dsmas_flags to CXLDCRegion struct
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
2025-05-08 0:00 ` [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file anisa.su887
2025-05-08 0:00 ` [PATCH v2 02/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info anisa.su887
@ 2025-05-08 0:00 ` anisa.su887
2025-05-20 16:05 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 04/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config anisa.su887
` (7 subsequent siblings)
10 siblings, 1 reply; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:00 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
Add booleans to DC Region struct to represent dsmas flags (defined in CDAT)
in preparation for the next command, which returns the flags in the
response.
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/mem/cxl_type3.c | 8 +++++++-
include/hw/cxl/cxl_device.h | 15 +++++++++++++++
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 7129da0940..05d4c861f1 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -232,10 +232,16 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv)
* future.
*/
for (i = 0; i < ct3d->dc.num_regions; i++) {
+ ct3d->dc.regions[i].nonvolatile = false;
+ ct3d->dc.regions[i].sharable = false;
+ ct3d->dc.regions[i].hw_managed_coherency = false;
+ ct3d->dc.regions[i].ic_specific_dc_management = false;
+ ct3d->dc.regions[i].rdonly = false;
ct3_build_cdat_entries_for_mr(&(table[cur_ent]),
dsmad_handle++,
ct3d->dc.regions[i].len,
- false, true, region_base);
+ ct3d->dc.regions[i].nonvolatile,
+ true, region_base);
ct3d->dc.regions[i].dsmadhandle = dsmad_handle - 1;
cur_ent += CT3_CDAT_NUM_ENTRIES;
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index bebed04085..cbcc1bc9f5 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -177,6 +177,15 @@ typedef enum {
MAX_LOG_TYPE
} CXLLogType;
+/* DSMAS Flags Bits */
+typedef enum {
+ CXL_DSMAS_FLAGS_NONVOLATILE = 2,
+ CXL_DSMAS_FLAGS_SHARABLE = 3,
+ CXL_DSMAS_FLAGS_HW_MANAGED_COHERENCY = 4,
+ CXL_DSMAS_FLAGS_IC_SPECIFIC_DC_MANAGEMENT = 5,
+ CXL_DSMAS_FLAGS_RDONLY = 6,
+} CXLDSMASFlags;
+
typedef struct CXLCCI CXLCCI;
typedef struct cxl_device_state CXLDeviceState;
struct cxl_cmd;
@@ -609,6 +618,12 @@ typedef struct CXLDCRegion {
uint8_t flags;
unsigned long *blk_bitmap;
uint64_t supported_blk_size_bitmask;
+ /* Following bools make up dsmas flags, as defined in the CDAT */
+ bool nonvolatile;
+ bool sharable;
+ bool hw_managed_coherency;
+ bool ic_specific_dc_management;
+ bool rdonly;
} CXLDCRegion;
typedef struct CXLSetFeatureInfo {
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v2 04/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (2 preceding siblings ...)
2025-05-08 0:00 ` [PATCH v2 03/10] cxl/type3: Add dsmas_flags to CXLDCRegion struct anisa.su887
@ 2025-05-08 0:01 ` anisa.su887
2025-05-20 16:23 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 05/10] cxl_events.h: Move definition for dynamic_capacity_uuid and enum for DC event types anisa.su887
` (6 subsequent siblings)
10 siblings, 1 reply; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:01 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5601 implemented per CXL r3.2 Spec Section 7.6.7.6.2
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 102 +++++++++++++++++++++++++++++++++++
include/hw/cxl/cxl_opcodes.h | 1 +
2 files changed, 103 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index d3c69233b8..6afc45833d 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -3326,6 +3326,106 @@ static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+static void build_dsmas_flags(uint8_t *flags, CXLDCRegion *region)
+{
+ *flags = 0;
+
+ if (region->nonvolatile) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_NONVOLATILE);
+ }
+ if (region->sharable) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_SHARABLE);
+ }
+ if (region->hw_managed_coherency) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_HW_MANAGED_COHERENCY);
+ }
+ if (region->ic_specific_dc_management) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_IC_SPECIFIC_DC_MANAGEMENT);
+ }
+ if (region->rdonly) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_RDONLY);
+ }
+}
+
+/* CXL r3.2 section 7.6.7.6.2: Get Host DC Region Configuration (Opcode 5601h) */
+static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t region_cnt;
+ uint8_t start_rid;
+ } QEMU_PACKED *in = (void *)payload_in;
+ struct {
+ uint16_t host_id;
+ uint8_t num_regions;
+ uint8_t regions_returned;
+ struct {
+ uint64_t base;
+ uint64_t decode_len;
+ uint64_t region_len;
+ uint64_t block_size;
+ uint8_t dsmas_flags;
+ uint8_t rsvd1[3];
+ uint8_t sanitize;
+ uint8_t rsvd2[3];
+ } QEMU_PACKED records[];
+ } QEMU_PACKED *out = (void *)payload_out;
+ struct {
+ uint32_t num_extents_supported;
+ uint32_t num_extents_available;
+ uint32_t num_tags_supported;
+ uint32_t num_tags_available;
+ } QEMU_PACKED *extra_out;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ uint16_t record_count, out_pl_len, i;
+
+ if (in->start_rid >= ct3d->dc.num_regions) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+ record_count = MIN(ct3d->dc.num_regions - in->start_rid, in->region_cnt);
+
+ out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
+ extra_out = (void *)out + out_pl_len;
+ out_pl_len += sizeof(*extra_out);
+
+ assert(out_pl_len <= CXL_MAILBOX_MAX_PAYLOAD_SIZE);
+
+ stw_le_p(&out->host_id, 0);
+ out->num_regions = ct3d->dc.num_regions;
+ out->regions_returned = record_count;
+
+ for (i = 0; i < record_count; i++) {
+ stq_le_p(&out->records[i].base,
+ ct3d->dc.regions[in->start_rid + i].base);
+ stq_le_p(&out->records[i].decode_len,
+ ct3d->dc.regions[in->start_rid + i].decode_len /
+ CXL_CAPACITY_MULTIPLIER);
+ stq_le_p(&out->records[i].region_len,
+ ct3d->dc.regions[in->start_rid + i].len);
+ stq_le_p(&out->records[i].block_size,
+ ct3d->dc.regions[in->start_rid + i].block_size);
+ build_dsmas_flags(&out->records[i].dsmas_flags,
+ &ct3d->dc.regions[in->start_rid + i]);
+ /* Sanitize is bit 0 of flags. */
+ out->records[i].sanitize =
+ ct3d->dc.regions[in->start_rid + i].flags & BIT(0);
+ }
+
+ stl_le_p(&extra_out->num_extents_supported, CXL_NUM_EXTENTS_SUPPORTED);
+ stl_le_p(&extra_out->num_extents_available, CXL_NUM_EXTENTS_SUPPORTED -
+ ct3d->dc.total_extent_count);
+ stl_le_p(&extra_out->num_tags_supported, CXL_NUM_TAGS_SUPPORTED);
+ stl_le_p(&extra_out->num_tags_available, CXL_NUM_TAGS_SUPPORTED);
+
+ *len_out = out_pl_len;
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3450,6 +3550,8 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
[FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
cmd_fm_get_dcd_info, 0, 0 },
+ [FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
+ cmd_fm_get_host_dc_region_config, 4, 0 },
};
/*
diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
index c4c233665e..68ad68291c 100644
--- a/include/hw/cxl/cxl_opcodes.h
+++ b/include/hw/cxl/cxl_opcodes.h
@@ -63,5 +63,6 @@ enum {
#define GET_MHD_INFO 0x0
FMAPI_DCD_MGMT = 0x56,
#define GET_DCD_INFO 0x0
+ #define GET_HOST_DC_REGION_CONFIG 0x1
GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
};
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v2 05/10] cxl_events.h: Move definition for dynamic_capacity_uuid and enum for DC event types
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (3 preceding siblings ...)
2025-05-08 0:01 ` [PATCH v2 04/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config anisa.su887
@ 2025-05-08 0:01 ` anisa.su887
2025-05-20 16:44 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 06/10] hw/cxl_type3: Add DC Region bitmap lock anisa.su887
` (5 subsequent siblings)
10 siblings, 1 reply; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:01 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
Move definition/enum to cxl_events.h for shared use in next patch
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/mem/cxl_type3.c | 15 ---------------
include/hw/cxl/cxl_events.h | 15 +++++++++++++++
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 05d4c861f1..6ad48f55ce 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1982,21 +1982,6 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
}
}
-/* CXL r3.1 Table 8-50: Dynamic Capacity Event Record */
-static const QemuUUID dynamic_capacity_uuid = {
- .data = UUID(0xca95afa7, 0xf183, 0x4018, 0x8c, 0x2f,
- 0x95, 0x26, 0x8e, 0x10, 0x1a, 0x2a),
-};
-
-typedef enum CXLDCEventType {
- DC_EVENT_ADD_CAPACITY = 0x0,
- DC_EVENT_RELEASE_CAPACITY = 0x1,
- DC_EVENT_FORCED_RELEASE_CAPACITY = 0x2,
- DC_EVENT_REGION_CONFIG_UPDATED = 0x3,
- DC_EVENT_ADD_CAPACITY_RSP = 0x4,
- DC_EVENT_CAPACITY_RELEASED = 0x5,
-} CXLDCEventType;
-
/*
* Check whether the range [dpa, dpa + len - 1] has overlaps with extents in
* the list.
diff --git a/include/hw/cxl/cxl_events.h b/include/hw/cxl/cxl_events.h
index 38cadaa0f3..758b075a64 100644
--- a/include/hw/cxl/cxl_events.h
+++ b/include/hw/cxl/cxl_events.h
@@ -184,4 +184,19 @@ typedef struct CXLEventDynamicCapacity {
uint32_t tags_avail;
} QEMU_PACKED CXLEventDynamicCapacity;
+/* CXL r3.1 Table 8-50: Dynamic Capacity Event Record */
+static const QemuUUID dynamic_capacity_uuid = {
+ .data = UUID(0xca95afa7, 0xf183, 0x4018, 0x8c, 0x2f,
+ 0x95, 0x26, 0x8e, 0x10, 0x1a, 0x2a),
+};
+
+typedef enum CXLDCEventType {
+ DC_EVENT_ADD_CAPACITY = 0x0,
+ DC_EVENT_RELEASE_CAPACITY = 0x1,
+ DC_EVENT_FORCED_RELEASE_CAPACITY = 0x2,
+ DC_EVENT_REGION_CONFIG_UPDATED = 0x3,
+ DC_EVENT_ADD_CAPACITY_RSP = 0x4,
+ DC_EVENT_CAPACITY_RELEASED = 0x5,
+} CXLDCEventType;
+
#endif /* CXL_EVENTS_H */
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v2 06/10] hw/cxl_type3: Add DC Region bitmap lock
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (4 preceding siblings ...)
2025-05-08 0:01 ` [PATCH v2 05/10] cxl_events.h: Move definition for dynamic_capacity_uuid and enum for DC event types anisa.su887
@ 2025-05-08 0:01 ` anisa.su887
2025-05-20 16:56 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 07/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config anisa.su887
` (4 subsequent siblings)
10 siblings, 1 reply; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:01 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
Add a lock on the bitmap of each CXLDCRegion in preparation for the next
patch which implements FMAPI Set DC Region Configuration. This command
can modify the block size, which means the region's bitmap must be updated
accordingly.
The lock becomes necessary when commands that add/release extents
(meaning they update the bitmap too) are enabled on a different CCI than
the CCI on which the FMAPI commands are enabled.
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/mem/cxl_type3.c | 4 ++++
include/hw/cxl/cxl_device.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 6ad48f55ce..b5b3df5edf 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -824,6 +824,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
};
ct3d->dc.total_capacity += region->len;
region->blk_bitmap = bitmap_new(region->len / region->block_size);
+ qemu_mutex_init(®ion->bitmap_lock);
}
QTAILQ_INIT(&ct3d->dc.extents);
QTAILQ_INIT(&ct3d->dc.extents_pending);
@@ -1176,6 +1177,7 @@ void ct3_set_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
return;
}
+ QEMU_LOCK_GUARD(®ion->bitmap_lock);
bitmap_set(region->blk_bitmap, (dpa - region->base) / region->block_size,
len / region->block_size);
}
@@ -1202,6 +1204,7 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
* if bits between [dpa, dpa + len) are all 1s, meaning the DPA range is
* backed with DC extents, return true; else return false.
*/
+ QEMU_LOCK_GUARD(®ion->bitmap_lock);
return find_next_zero_bit(region->blk_bitmap, nr + nbits, nr) == nr + nbits;
}
@@ -1223,6 +1226,7 @@ void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
nr = (dpa - region->base) / region->block_size;
nbits = len / region->block_size;
+ QEMU_LOCK_GUARD(®ion->bitmap_lock);
bitmap_clear(region->blk_bitmap, nr, nbits);
}
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index cbcc1bc9f5..9cfd9c5a9f 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -618,6 +618,7 @@ typedef struct CXLDCRegion {
uint8_t flags;
unsigned long *blk_bitmap;
uint64_t supported_blk_size_bitmask;
+ QemuMutex bitmap_lock;
/* Following bools make up dsmas flags, as defined in the CDAT */
bool nonvolatile;
bool sharable;
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v2 07/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (5 preceding siblings ...)
2025-05-08 0:01 ` [PATCH v2 06/10] hw/cxl_type3: Add DC Region bitmap lock anisa.su887
@ 2025-05-08 0:01 ` anisa.su887
2025-05-20 13:29 ` Jonathan Cameron
2025-05-20 17:07 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 08/10] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists anisa.su887
` (3 subsequent siblings)
10 siblings, 2 replies; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:01 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 97 ++++++++++++++++++++++++++++++++++++
hw/mem/cxl_type3.c | 2 +-
include/hw/cxl/cxl_device.h | 3 ++
include/hw/cxl/cxl_mailbox.h | 6 +++
include/hw/cxl/cxl_opcodes.h | 1 +
5 files changed, 108 insertions(+), 1 deletion(-)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 6afc45833d..fe38a13f71 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -3426,6 +3426,96 @@ static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+static void cxl_mbox_dc_event_create_record_hdr(CXLType3Dev *ct3d,
+ CXLEventRecordHdr *hdr)
+{
+ /*
+ * CXL r3.1 section 8.2.9.2.1.6: Dynamic Capacity Event Record
+ *
+ * All Dynamic Capacity event records shall set the Event Record Severity
+ * field in the Common Event Record Format to Informational Event. All
+ * Dynamic Capacity related events shall be logged in the Dynamic Capacity
+ * Event Log.
+ */
+ uint8_t flags = 1 << CXL_EVENT_TYPE_INFO;
+
+ st24_le_p(&hdr->flags, flags);
+ hdr->length = sizeof(struct CXLEventDynamicCapacity);
+ memcpy(&hdr->id, &dynamic_capacity_uuid, sizeof(hdr->id));
+ stq_le_p(&hdr->timestamp, cxl_device_get_timestamp(&ct3d->cxl_dstate));
+}
+
+/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
+static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint8_t reg_id;
+ uint8_t rsvd[3];
+ uint64_t block_sz;
+ uint8_t flags;
+ uint8_t rsvd2[3];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ CXLEventDynamicCapacity dcEvent = {};
+ CXLDCRegion *region;
+
+ region = &ct3d->dc.regions[in->reg_id];
+
+ /*
+ * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
+ * This command shall fail with Unsupported when the Sanitize on Release
+ * field does not match the region’s configuration... and the device
+ * does not support reconfiguration of the Sanitize on Release setting.
+ *
+ * Currently not reconfigurable, so always fail if sanitize bit
+ * doesn't match.
+ */
+ if ((in->flags & 0x1) != (region->flags & 0x1)) {
+ return CXL_MBOX_UNSUPPORTED;
+ }
+
+ if (in->reg_id >= DCD_MAX_NUM_REGION) {
+ return CXL_MBOX_UNSUPPORTED;
+ }
+
+ /* Check that no extents are in the region being reconfigured */
+ if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
+ return CXL_MBOX_UNSUPPORTED;
+ }
+
+ /* Check that new block size is supported */
+ if (!test_bit(BIT((int) log2(in->block_sz)),
+ ®ion->supported_blk_size_bitmask)) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ /* Free bitmap and create new one for new block size. */
+ qemu_mutex_lock(®ion->bitmap_lock);
+ g_free(region->blk_bitmap);
+ region->blk_bitmap = bitmap_new(region->len / in->block_sz);
+ qemu_mutex_unlock(®ion->bitmap_lock);
+ region->block_size = in->block_sz;
+
+ /* Create event record and insert into event log */
+ cxl_mbox_dc_event_create_record_hdr(ct3d, &dcEvent.hdr);
+ dcEvent.type = DC_EVENT_REGION_CONFIG_UPDATED;
+ dcEvent.validity_flags = 1;
+ dcEvent.host_id = 0;
+ dcEvent.updated_region_id = in->reg_id;
+
+ if (cxl_event_insert(&ct3d->cxl_dstate,
+ CXL_EVENT_TYPE_DYNAMIC_CAP,
+ (CXLEventRecordRaw *)&dcEvent)) {
+ cxl_event_irq_assert(ct3d);
+ }
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3552,6 +3642,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
cmd_fm_get_dcd_info, 0, 0 },
[FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
cmd_fm_get_host_dc_region_config, 4, 0 },
+ [FMAPI_DCD_MGMT][SET_DC_REGION_CONFIG] = { "SET_DC_REGION_CONFIG",
+ cmd_fm_set_dc_region_config, 16,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index b5b3df5edf..edc29f1ccb 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1695,7 +1695,7 @@ void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type,
pcie_aer_inject_error(PCI_DEVICE(obj), &err);
}
-static void cxl_assign_event_header(CXLEventRecordHdr *hdr,
+void cxl_assign_event_header(CXLEventRecordHdr *hdr,
const QemuUUID *uuid, uint32_t flags,
uint8_t length, uint64_t timestamp)
{
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 9cfd9c5a9f..22823e2054 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -821,4 +821,7 @@ void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
uint64_t len);
bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
uint64_t len);
+void cxl_assign_event_header(CXLEventRecordHdr *hdr,
+ const QemuUUID *uuid, uint32_t flags,
+ uint8_t length, uint64_t timestamp);
#endif
diff --git a/include/hw/cxl/cxl_mailbox.h b/include/hw/cxl/cxl_mailbox.h
index 8e1c7c5f15..820c411cbb 100644
--- a/include/hw/cxl/cxl_mailbox.h
+++ b/include/hw/cxl/cxl_mailbox.h
@@ -8,6 +8,7 @@
#ifndef CXL_MAILBOX_H
#define CXL_MAILBOX_H
+#define CXL_MBOX_CONFIG_CHANGE_COLD_RESET (1)
#define CXL_MBOX_IMMEDIATE_CONFIG_CHANGE (1 << 1)
#define CXL_MBOX_IMMEDIATE_DATA_CHANGE (1 << 2)
#define CXL_MBOX_IMMEDIATE_POLICY_CHANGE (1 << 3)
@@ -15,6 +16,11 @@
#define CXL_MBOX_SECURITY_STATE_CHANGE (1 << 5)
#define CXL_MBOX_BACKGROUND_OPERATION (1 << 6)
#define CXL_MBOX_BACKGROUND_OPERATION_ABORT (1 << 7)
+#define CXL_MBOX_SECONDARY_MBOX_SUPPORTED (1 << 8)
+#define CXL_MBOX_REQUEST_ABORT_BACKGROUND_OP_SUPPORTED (1 << 9)
+#define CXL_MBOX_CEL_10_TO_11_VALID (1 << 10)
+#define CXL_MBOX_CONFIG_CHANGE_CONV_RESET (1 << 11)
+#define CXL_MBOX_CONFIG_CHANGE_CXL_RESET (1 << 12)
#define CXL_LOG_CAP_CLEAR_SUPPORTED (1 << 0)
#define CXL_LOG_CAP_POPULATE_SUPPORTED (1 << 1)
diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
index 68ad68291c..ed4be23b75 100644
--- a/include/hw/cxl/cxl_opcodes.h
+++ b/include/hw/cxl/cxl_opcodes.h
@@ -64,5 +64,6 @@ enum {
FMAPI_DCD_MGMT = 0x56,
#define GET_DCD_INFO 0x0
#define GET_HOST_DC_REGION_CONFIG 0x1
+ #define SET_DC_REGION_CONFIG 0x2
GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
};
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v2 08/10] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (6 preceding siblings ...)
2025-05-08 0:01 ` [PATCH v2 07/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config anisa.su887
@ 2025-05-08 0:01 ` anisa.su887
2025-05-20 17:18 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add anisa.su887
` (2 subsequent siblings)
10 siblings, 1 reply; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:01 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5603 implemented per CXL r3.2 Spec Section 7.6.7.6.4
Very similar to previously implemented command 0x4801.
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 75 ++++++++++++++++++++++++++++++++++++
include/hw/cxl/cxl_opcodes.h | 1 +
2 files changed, 76 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index fe38a13f71..a897a34ef9 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -3516,6 +3516,79 @@ static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/* CXL r3.2 section 7.6.7.6.4 Get DC Region Extent Lists (Opcode 5603h) */
+static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t rsvd[2];
+ uint32_t extent_cnt;
+ uint32_t start_extent_id;
+ } QEMU_PACKED *in = (void *)payload_in;
+ struct {
+ uint16_t host_id;
+ uint8_t rsvd[2];
+ uint32_t start_extent_id;
+ uint32_t extents_returned;
+ uint32_t total_extents;
+ uint32_t list_generation_num;
+ uint8_t rsvd2[4];
+ CXLDCExtentRaw records[];
+ } QEMU_PACKED *out = (void *)payload_out;
+ QEMU_BUILD_BUG_ON(sizeof(*in) != 0xc);
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ CXLDCExtent *ent;
+ CXLDCExtentRaw *out_rec;
+ uint16_t record_count = 0, record_done = 0, i = 0;
+ uint16_t out_pl_len, max_size;
+
+ if (in->host_id != 0) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ if (in->start_extent_id > ct3d->dc.total_extent_count) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ record_count = MIN(in->extent_cnt,
+ ct3d->dc.total_extent_count - in->start_extent_id);
+ max_size = CXL_MAILBOX_MAX_PAYLOAD_SIZE - sizeof(*out);
+ record_count = MIN(record_count, max_size / sizeof(out->records[0]));
+ out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
+
+ stw_le_p(&out->host_id, in->host_id);
+ stl_le_p(&out->start_extent_id, in->start_extent_id);
+ stl_le_p(&out->extents_returned, record_count);
+ stl_le_p(&out->total_extents, ct3d->dc.total_extent_count);
+ stl_le_p(&out->list_generation_num, ct3d->dc.ext_list_gen_seq);
+
+ if (record_count > 0) {
+ QTAILQ_FOREACH(ent, &ct3d->dc.extents, node) {
+ if (i++ < in->start_extent_id) {
+ continue;
+ }
+ out_rec = &out->records[record_done];
+ stq_le_p(&out_rec->start_dpa, ent->start_dpa);
+ stq_le_p(&out_rec->len, ent->len);
+ memcpy(&out_rec->tag, ent->tag, 0x10);
+ stw_le_p(&out_rec->shared_seq, ent->shared_seq);
+
+ record_done++;
+ if (record_done == record_count) {
+ break;
+ }
+ }
+ }
+
+ *len_out = out_pl_len;
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3649,6 +3722,8 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
+ [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
+ cmd_fm_get_dc_region_extent_list, 12, 0 },
};
/*
diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
index ed4be23b75..ad4e614daa 100644
--- a/include/hw/cxl/cxl_opcodes.h
+++ b/include/hw/cxl/cxl_opcodes.h
@@ -65,5 +65,6 @@ enum {
#define GET_DCD_INFO 0x0
#define GET_HOST_DC_REGION_CONFIG 0x1
#define SET_DC_REGION_CONFIG 0x2
+ #define GET_DC_REGION_EXTENT_LIST 0x3
GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
};
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v2 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (7 preceding siblings ...)
2025-05-08 0:01 ` [PATCH v2 08/10] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists anisa.su887
@ 2025-05-08 0:01 ` anisa.su887
2025-05-20 13:34 ` Jonathan Cameron
2025-05-20 18:08 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release anisa.su887
2025-05-20 13:39 ` [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 Jonathan Cameron
10 siblings, 2 replies; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:01 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 195 +++++++++++++++++++++++++++++++++++
hw/mem/cxl_type3.c | 8 +-
include/hw/cxl/cxl_device.h | 4 +
include/hw/cxl/cxl_opcodes.h | 1 +
4 files changed, 204 insertions(+), 4 deletions(-)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index a897a34ef9..9b176dea08 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -3589,6 +3589,194 @@ static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+static CXLRetCode cxl_mbox_dc_prescriptive_sanity_check(CXLType3Dev *dcd,
+ uint16_t host_id,
+ uint32_t ext_count,
+ CXLDCExtentRaw extents[],
+ CXLDCEventType type)
+{
+ CXLDCExtentRaw ext;
+ CXLDCRegion *reg = NULL;
+ int i, j;
+
+ if (host_id != 0) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ for (i = 0; i < ext_count; i++) {
+ ext = extents[i];
+
+ if (ext.len == 0) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+
+ reg = cxl_find_dc_region(dcd, ext.start_dpa, ext.len);
+ if (!reg) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+
+ if (ext.len % reg->block_size || ext.start_dpa % reg->block_size) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+
+ /* Check requested extents do not overlap with each other. */
+ for (j = i + 1; j < ext_count; j++) {
+ if (ranges_overlap(ext.start_dpa, ext.len, extents[j].start_dpa,
+ extents[j].len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ }
+
+ if (type == DC_EVENT_ADD_CAPACITY) {
+ /* Check requested extents do not overlap with pending extents. */
+ if (cxl_extent_groups_overlaps_dpa_range(&dcd->dc.extents_pending,
+ ext.start_dpa, ext.len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ /* Check requested extents do not overlap with existing extents. */
+ if (cxl_extents_overlaps_dpa_range(&dcd->dc.extents,
+ ext.start_dpa, ext.len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ }
+ }
+
+ return CXL_MBOX_SUCCESS;
+}
+
+static int cxl_mbox_get_pending_ext_count(CXLType3Dev *ct3d)
+{
+ CXLDCExtentGroup *group;
+ CXLDCExtentList *list;
+ CXLDCExtent *ent;
+ int count = 0;
+
+ QTAILQ_FOREACH(group, &ct3d->dc.extents_pending, node) {
+ list = &group->list;
+ QTAILQ_FOREACH(ent, list, node) {
+ count++;
+ }
+ }
+
+ return count;
+}
+
+static int cxl_mbox_get_accepted_ext_count(CXLType3Dev *ct3d)
+{
+ CXLDCExtent *ent;
+ int count = 0;
+
+ QTAILQ_FOREACH(ent, &ct3d->dc.extents, node) {
+ count++;
+ }
+
+ return count;
+}
+
+static void cxl_mbox_dc_add_to_pending(CXLType3Dev *ct3d,
+ uint32_t ext_count,
+ CXLDCExtentRaw extents[])
+{
+ CXLDCExtentGroup *group = NULL;
+ int i;
+
+ for (i = 0; i < ext_count; i++) {
+ group = cxl_insert_extent_to_extent_group(group,
+ extents[i].start_dpa,
+ extents[i].len,
+ extents[i].tag,
+ extents[i].shared_seq);
+ }
+
+ cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
+}
+
+static void cxl_mbox_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
+ CXLDCEventType type,
+ CXLDCExtentRaw extents[],
+ uint32_t ext_count)
+{
+ CXLEventDynamicCapacity event_rec = {};
+ int i;
+
+ cxl_mbox_dc_event_create_record_hdr(ct3d, &event_rec.hdr);
+ event_rec.type = type;
+ event_rec.validity_flags = 1;
+ event_rec.host_id = 0;
+ event_rec.updated_region_id = 0;
+ event_rec.extents_avail = ct3d->dc.total_extent_count -
+ cxl_mbox_get_accepted_ext_count(ct3d) -
+ cxl_mbox_get_pending_ext_count(ct3d);
+
+ for (i = 0; i < ext_count; i++) {
+ memcpy(&event_rec.dynamic_capacity_extent,
+ &extents[i],
+ sizeof(CXLDCExtentRaw));
+ event_rec.flags = 0;
+ if (i < ext_count - 1) {
+ /* Set "More" flag */
+ event_rec.flags |= BIT(0);
+ }
+
+ if (cxl_event_insert(&ct3d->cxl_dstate,
+ CXL_EVENT_TYPE_DYNAMIC_CAP,
+ (CXLEventRecordRaw *)&event_rec)) {
+ cxl_event_irq_assert(ct3d);
+ }
+ }
+}
+
+/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
+static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t selection_policy;
+ uint8_t reg_num;
+ uint64_t length;
+ uint8_t tag[0x10];
+ uint32_t ext_count;
+ CXLDCExtentRaw extents[];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ int rc;
+
+ switch (in->selection_policy) {
+ case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE:
+ /* Adding extents exceeds device's extent tracking ability. */
+ if (in->ext_count + ct3d->dc.total_extent_count >
+ CXL_NUM_EXTENTS_SUPPORTED) {
+ return CXL_MBOX_RESOURCES_EXHAUSTED;
+ }
+ rc = cxl_mbox_dc_prescriptive_sanity_check(ct3d,
+ in->host_id,
+ in->ext_count,
+ in->extents,
+ DC_EVENT_ADD_CAPACITY);
+ if (rc) {
+ return rc;
+ }
+ cxl_mbox_dc_add_to_pending(ct3d, in->ext_count, in->extents);
+ cxl_mbox_create_dc_event_records_for_extents(ct3d,
+ DC_EVENT_ADD_CAPACITY,
+ in->extents,
+ in->ext_count);
+
+ return CXL_MBOX_SUCCESS;
+ default:
+ qemu_log_mask(LOG_UNIMP,
+ "CXL extent selection policy not supported.\n");
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3724,6 +3912,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
[FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
cmd_fm_get_dc_region_extent_list, 12, 0 },
+ [FMAPI_DCD_MGMT][INITIATE_DC_ADD] = { "INIT_DC_ADD",
+ cmd_fm_initiate_dc_add, ~0,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index edc29f1ccb..71fad3391c 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1991,8 +1991,8 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
* the list.
* Return value: return true if has overlaps; otherwise, return false
*/
-static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
- uint64_t dpa, uint64_t len)
+bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
+ uint64_t dpa, uint64_t len)
{
CXLDCExtent *ent;
Range range1, range2;
@@ -2037,8 +2037,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *list,
return false;
}
-static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
- uint64_t dpa, uint64_t len)
+bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
+ uint64_t dpa, uint64_t len)
{
CXLDCExtentGroup *group;
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 22823e2054..93b6df0ccd 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -824,4 +824,8 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
void cxl_assign_event_header(CXLEventRecordHdr *hdr,
const QemuUUID *uuid, uint32_t flags,
uint8_t length, uint64_t timestamp);
+bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
+ uint64_t dpa, uint64_t len);
+bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
+ uint64_t dpa, uint64_t len);
#endif
diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
index ad4e614daa..72ea0a7d44 100644
--- a/include/hw/cxl/cxl_opcodes.h
+++ b/include/hw/cxl/cxl_opcodes.h
@@ -66,5 +66,6 @@ enum {
#define GET_HOST_DC_REGION_CONFIG 0x1
#define SET_DC_REGION_CONFIG 0x2
#define GET_DC_REGION_EXTENT_LIST 0x3
+ #define INITIATE_DC_ADD 0x4
GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
};
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v2 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (8 preceding siblings ...)
2025-05-08 0:01 ` [PATCH v2 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add anisa.su887
@ 2025-05-08 0:01 ` anisa.su887
2025-05-20 13:39 ` [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 Jonathan Cameron
10 siblings, 0 replies; 31+ messages in thread
From: anisa.su887 @ 2025-05-08 0:01 UTC (permalink / raw)
To: qemu-devel; +Cc: Jonathan.Cameron, nifan.cxl, dave, linux-cxl, Anisa Su
From: Anisa Su <anisa.su@samsung.com>
FM DCD Managment command 0x5605 implemented per CXL r3.2 Spec Section 7.6.7.6.6
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 56 ++++++++++++++++++++++++++++++++++++
include/hw/cxl/cxl_opcodes.h | 1 +
2 files changed, 57 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 9b176dea08..28266b16f7 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -3638,6 +3638,10 @@ static CXLRetCode cxl_mbox_dc_prescriptive_sanity_check(CXLType3Dev *dcd,
ext.start_dpa, ext.len)) {
return CXL_MBOX_INVALID_EXTENT_LIST;
}
+ } else if (type == DC_EVENT_RELEASE_CAPACITY) {
+ if (!ct3_test_region_block_backed(dcd, ext.start_dpa, ext.len)) {
+ return CXL_MBOX_INVALID_PA;
+ }
}
}
@@ -3777,6 +3781,51 @@ static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+#define CXL_EXTENT_REMOVAL_POLICY_MASK 0x7
+/* CXL r3.2 Section 7.6.7.6.6 Initiate Dynamic Capacity Release (Opcode 5605h) */
+static CXLRetCode cmd_fm_initiate_dc_release(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t flags;
+ uint8_t reg_num;
+ uint64_t length;
+ uint8_t tag[0x10];
+ uint32_t ext_count;
+ CXLDCExtentRaw extents[];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ int rc;
+
+ switch (in->flags & CXL_EXTENT_REMOVAL_POLICY_MASK) {
+ case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE:
+ rc = cxl_mbox_dc_prescriptive_sanity_check(ct3d,
+ in->host_id,
+ in->ext_count,
+ in->extents,
+ DC_EVENT_RELEASE_CAPACITY);
+ if (rc) {
+ return rc;
+ }
+ cxl_mbox_create_dc_event_records_for_extents(ct3d,
+ DC_EVENT_RELEASE_CAPACITY,
+ in->extents,
+ in->ext_count);
+ return CXL_MBOX_SUCCESS;
+ default:
+ qemu_log_mask(LOG_UNIMP,
+ "CXL extent selection policy not supported.\n");
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3919,6 +3968,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
+ [FMAPI_DCD_MGMT][INITIATE_DC_RELEASE] = { "INIT_DC_RELEASE",
+ cmd_fm_initiate_dc_release, ~0,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
index 72ea0a7d44..7ac6cb9f34 100644
--- a/include/hw/cxl/cxl_opcodes.h
+++ b/include/hw/cxl/cxl_opcodes.h
@@ -67,5 +67,6 @@ enum {
#define SET_DC_REGION_CONFIG 0x2
#define GET_DC_REGION_EXTENT_LIST 0x3
#define INITIATE_DC_ADD 0x4
+ #define INITIATE_DC_RELEASE 0x5
GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
};
--
2.47.2
^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH v2 07/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-05-08 0:01 ` [PATCH v2 07/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config anisa.su887
@ 2025-05-20 13:29 ` Jonathan Cameron
2025-05-20 17:07 ` Fan Ni
1 sibling, 0 replies; 31+ messages in thread
From: Jonathan Cameron @ 2025-05-20 13:29 UTC (permalink / raw)
To: anisa.su887; +Cc: qemu-devel, nifan.cxl, dave, linux-cxl, Anisa Su
On Thu, 8 May 2025 00:01:03 +0000
anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
Hi Anisa
A few really trivial things inline.
Jonathan
> ---
> hw/cxl/cxl-mailbox-utils.c | 97 ++++++++++++++++++++++++++++++++++++
> hw/mem/cxl_type3.c | 2 +-
> include/hw/cxl/cxl_device.h | 3 ++
> include/hw/cxl/cxl_mailbox.h | 6 +++
> include/hw/cxl/cxl_opcodes.h | 1 +
> 5 files changed, 108 insertions(+), 1 deletion(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 6afc45833d..fe38a13f71 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -3426,6 +3426,96 @@ static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +static void cxl_mbox_dc_event_create_record_hdr(CXLType3Dev *ct3d,
> + CXLEventRecordHdr *hdr)
> +{
> + /*
> + * CXL r3.1 section 8.2.9.2.1.6: Dynamic Capacity Event Record
Completely trivial but for new code we try to reference
the latest released spec (as only one that is downloadable
from a click through on the consortium website.)
I'll have another go on next release at persuading them to leave
the links to older spec versions (so far no luck!)
Anyhow, it's r3.2 section 8.2.10.2.1.6: Dynamic Capacity Event Record
If nothing else comes up I'll change that whilst adding it to my
staging tree.
I'm not sure I'll post one of those though until the tcg bug is
fixed.
Looks like you updated all the others already.
> + *
> + * All Dynamic Capacity event records shall set the Event Record Severity
> + * field in the Common Event Record Format to Informational Event. All
> + * Dynamic Capacity related events shall be logged in the Dynamic Capacity
> + * Event Log.
> + */
> + uint8_t flags = 1 << CXL_EVENT_TYPE_INFO;
> +
> + st24_le_p(&hdr->flags, flags);
> + hdr->length = sizeof(struct CXLEventDynamicCapacity);
> + memcpy(&hdr->id, &dynamic_capacity_uuid, sizeof(hdr->id));
> + stq_le_p(&hdr->timestamp, cxl_device_get_timestamp(&ct3d->cxl_dstate));
> +}
> +
> +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint8_t reg_id;
> + uint8_t rsvd[3];
> + uint64_t block_sz;
> + uint8_t flags;
> + uint8_t rsvd2[3];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + CXLEventDynamicCapacity dcEvent = {};
> + CXLDCRegion *region;
> +
> + region = &ct3d->dc.regions[in->reg_id];
Trivial but we could roll that in to the declaration as its a simple
look up that can't fail.
> +
> + /*
> + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> + * This command shall fail with Unsupported when the Sanitize on Release
> + * field does not match the region’s configuration... and the device
> + * does not support reconfiguration of the Sanitize on Release setting.
> + *
> + * Currently not reconfigurable, so always fail if sanitize bit
> + * doesn't match.
> + */
> + if ((in->flags & 0x1) != (region->flags & 0x1)) {
We should have a define for that 0x1 probably.
> + return CXL_MBOX_UNSUPPORTED;
> + }
> +
> + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> + return CXL_MBOX_UNSUPPORTED;
> + }
> +
> + /* Check that no extents are in the region being reconfigured */
> + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> + return CXL_MBOX_UNSUPPORTED;
> + }
> +
> + /* Check that new block size is supported */
> + if (!test_bit(BIT((int) log2(in->block_sz)),
> + ®ion->supported_blk_size_bitmask)) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
> +
> + /* Free bitmap and create new one for new block size. */
> + qemu_mutex_lock(®ion->bitmap_lock);
> + g_free(region->blk_bitmap);
> + region->blk_bitmap = bitmap_new(region->len / in->block_sz);
> + qemu_mutex_unlock(®ion->bitmap_lock);
> + region->block_size = in->block_sz;
> +
> + /* Create event record and insert into event log */
> + cxl_mbox_dc_event_create_record_hdr(ct3d, &dcEvent.hdr);
> + dcEvent.type = DC_EVENT_REGION_CONFIG_UPDATED;
> + dcEvent.validity_flags = 1;
> + dcEvent.host_id = 0;
> + dcEvent.updated_region_id = in->reg_id;
> +
> + if (cxl_event_insert(&ct3d->cxl_dstate,
> + CXL_EVENT_TYPE_DYNAMIC_CAP,
> + (CXLEventRecordRaw *)&dcEvent)) {
> + cxl_event_irq_assert(ct3d);
> + }
> + return CXL_MBOX_SUCCESS;
> +}
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-05-08 0:01 ` [PATCH v2 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add anisa.su887
@ 2025-05-20 13:34 ` Jonathan Cameron
2025-05-20 18:08 ` Fan Ni
1 sibling, 0 replies; 31+ messages in thread
From: Jonathan Cameron @ 2025-05-20 13:34 UTC (permalink / raw)
To: anisa.su887; +Cc: qemu-devel, nifan.cxl, dave, linux-cxl, Anisa Su
On Thu, 8 May 2025 00:01:05 +0000
anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
A few really minor things inline.
> ---
> hw/cxl/cxl-mailbox-utils.c | 195 +++++++++++++++++++++++++++++++++++
> hw/mem/cxl_type3.c | 8 +-
> include/hw/cxl/cxl_device.h | 4 +
> include/hw/cxl/cxl_opcodes.h | 1 +
> 4 files changed, 204 insertions(+), 4 deletions(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index a897a34ef9..9b176dea08 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -3589,6 +3589,194 @@ static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +static CXLRetCode cxl_mbox_dc_prescriptive_sanity_check(CXLType3Dev *dcd,
> + uint16_t host_id,
> + uint32_t ext_count,
> + CXLDCExtentRaw extents[],
> + CXLDCEventType type)
> +{
> + CXLDCExtentRaw ext;
> + CXLDCRegion *reg = NULL;
I'd move reg declaration into the loop and not initialize it to NULL.
Probably also j and ext.
> + int i, j;
> +
> + if (host_id != 0) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
> +
> + for (i = 0; i < ext_count; i++) {
> + ext = extents[i];
> +
> + if (ext.len == 0) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> +
> + reg = cxl_find_dc_region(dcd, ext.start_dpa, ext.len);
> + if (!reg) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> +
> + if (ext.len % reg->block_size || ext.start_dpa % reg->block_size) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> +
> + /* Check requested extents do not overlap with each other. */
> + for (j = i + 1; j < ext_count; j++) {
> + if (ranges_overlap(ext.start_dpa, ext.len, extents[j].start_dpa,
> + extents[j].len)) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + }
> +
> + if (type == DC_EVENT_ADD_CAPACITY) {
> + /* Check requested extents do not overlap with pending extents. */
> + if (cxl_extent_groups_overlaps_dpa_range(&dcd->dc.extents_pending,
> + ext.start_dpa, ext.len)) {
Misaligned parameters.
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + /* Check requested extents do not overlap with existing extents. */
> + if (cxl_extents_overlaps_dpa_range(&dcd->dc.extents,
> + ext.start_dpa, ext.len)) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + }
> + }
> +
> + return CXL_MBOX_SUCCESS;
> +}
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (9 preceding siblings ...)
2025-05-08 0:01 ` [PATCH v2 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release anisa.su887
@ 2025-05-20 13:39 ` Jonathan Cameron
2025-05-30 14:26 ` Jonathan Cameron
10 siblings, 1 reply; 31+ messages in thread
From: Jonathan Cameron @ 2025-05-20 13:39 UTC (permalink / raw)
To: anisa.su887; +Cc: qemu-devel, nifan.cxl, dave, linux-cxl, Anisa Su
On Thu, 8 May 2025 00:00:56 +0000
anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> This patchset adds support for 6 FM API DCD Management commands (0x5600-0x5605)
> according to the CXL r3.2 Spec. It is based on the following branch:
> https://gitlab.com/jic23/qemu/-/tree/cxl-2025-02-20.
Nice work - this is very clean and well presented.
I would like Fan to take a look an provide some tags as DCD modeling in
QEMU is more in his area of expertise than mine!
I think this series is much more ready for upstream than much of
my staging cxl tree so I'll rebase it to go near the front.
Today I'm focused on getting test cases to Richard for the TCG issues but
after that I'll spin a new tree (probably pushed out under a name
that makes it clear there is a known nasty problem though!)
Jonathan
>
> The code was tested with libcxlmi, which runs in the QEMU VM and sends 56xxh
> commands to the device (QEMU emulated) through MCTP messages over I2C
> bus. To perform end-to-end tests, both MCTP and DCD support are needed
> for the kernel, so the needed MCTP patches are applied on top of Ira's DCD
> branch https://github.com/weiny2/linux-kernel/tree/dcd-v4-2024-12-11.
>
> For the tests of commands 0x5600 (Get DCD Info), 0x5601 (Get Host DC Region
> Config), and 0x5603 (Get DC Region Extent Lists), DCD kernel code is not involved.
> The libcxlmi test program is used to send the command to the device and results
> are collected and verified.
>
> For command 0x5602 (Set DC Region Config): device creates an event record with type
> DC_EVENT_REGION_CONFIG_UPDATED and triggers an interrupt to the host
> if the configuration changes as a result of the command. Currently, the kernel
> version used to test this only supports Add/Release type events. Thus, this
> request essentially gets ignored but did not cause problems besides the host
> not knowing about the configuration change when tested.
>
> For the command 0x5604 (Initiate DC Add) and 0x5605 (Initiate DC Release), the
> tests involve libcxlmi test program (acting as the FM), kernel DCD
> code (host) and QEMU device. The test workflow follows that in cxl r3.2 section
> 7.6.7.6.5 and 7.6.7.6.6. More specifically, the tests involve following
> steps,
> 1. Start a VM with CXL topology: https://github.com/moking/cxl-test-tool/blob/main/utils/cxl.py#L54.
> 2. Load the CXL related drivers in the VM;
> 3. Create a DC region for the DCD device attached.
> 4. add/release DC extents by sending 0x5604 and 0x5605 respectively through
> the out-of-tree libcxlmi test program
> (https://github.com/anisa-su993/libcxlmi/blob/dcd_management_cmds/tests/test-fmapi.c).
> 5. Check and verify the extents by retrieving the extents list through
> command 0x5603 in the test program.
>
> The remaining 3 commands in this series (0x5606-0x5608) are related to tags
> and sharing, thus have not been implemented.
>
> Changes
> ================================================================================
> v1 -> v2:
> 1. Feedback from Jonathan Cameron on v1
> Addressed general style concerns (newlines/spacing, minor refactoring, etc.)
> 1.1. Changes Related to 0x5600 - FMAPI Get DCD Info
> - Squashed prepatory patch adding supported_blk_sizes_bitmask
> - Added new prepatory patch moving opcodes enum from cxl-mailbox-utils.c to
> new header file opcodes.h
> Needed for the check in i2c_mctp_cxl.c to ensure the FMAPI Commands
> (0x51 - 0x59) are bound with MCTP_MT_CXL_FMAPI. By moving the enum,
> the hardcoded values (0x51, 0x59) can be replaced with their
> enumerators.
> - Bug fix to return Add/Release Extent Selection Policy bitmasks
> correctly
> 1.2. Changes Related to 0x5601 - FMAPI Get Host Region Config
> - Prepatory patch to add dsmas_flags to CXLDCRegion struct was modified to
> store the booleans dsmas_flags is made up of instead of copying it from the
> CDAT for that region. Values hardcoded for unsupported flags.
> - Build the returned dsmas_flags from the new booleans.
> 1.3. Changes Related to 0x5602 - FMAPI Set DC Region Config
> - Added locking for CXLDCRegion bitmap for the case that extents are being
> added/released via a different CCI than that of the FM-enabled CCI.
> - Prepatory patch created for the above (quite short, can be squashed if
> preferred)
> - Added a check to verify that the requested block_size is supported by the
> region by looking at region->supported_blk_sizes_bitmask
> - Instead of event_record validity flag being cleared, set to 1
> - Fixed bug of forgetting to update region->block_size
> 1.4. Changes Related to 0x5603 - FMAPI Get DC Region Extents
> - Minor refactoring of loop filling in response payload extents
>
> 2. Feedback from Fan Ni and Jonathan Cameron on v1
> 2.1. Changes Related to 0x5604 - FMAPI Initiate DC Add
> - Remove redundant storage of extents in event_rec_exts
> - Refactor event record creation into helper function for re-use by release
> - Return event_record.available_extents
> (total_extents_available - num_pending - num_accepted) instead of
> leaving it blank
> 2.2. Changes Related to 0x5605 - FMAPI Initiate DC Release
> - Remove redundant storage of extents in event_rec_exts/redundant 2nd loop
> - Add #define for removal_policy_bitmask instead of hardcoding 0x7
>
> Anisa Su (10):
> cxl-mailbox-utils: Move opcodes enum to new header file
> cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
> cxl/type3: Add dsmas_flags to CXLDCRegion struct
> cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
> cxl_events.h: Move definition for dynamic_capacity_uuid and enum for
> DC event types
> hw/cxl_type3: Add DC Region bitmap lock
> cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
> cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
> cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
> cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
>
> hw/cxl/cxl-mailbox-utils.c | 649 +++++++++++++++++++++++++++++++----
> hw/cxl/i2c_mctp_cxl.c | 6 +-
> hw/mem/cxl_type3.c | 41 ++-
> include/hw/cxl/cxl_device.h | 24 ++
> include/hw/cxl/cxl_events.h | 15 +
> include/hw/cxl/cxl_mailbox.h | 6 +
> include/hw/cxl/cxl_opcodes.h | 72 ++++
> 7 files changed, 724 insertions(+), 89 deletions(-)
> create mode 100644 include/hw/cxl/cxl_opcodes.h
>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file
2025-05-08 0:00 ` [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file anisa.su887
@ 2025-05-20 15:37 ` Fan Ni
2025-05-20 17:33 ` Anisa Su
0 siblings, 1 reply; 31+ messages in thread
From: Fan Ni @ 2025-05-20 15:37 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, linux-cxl,
Anisa Su
On Thu, May 08, 2025 at 12:00:57AM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> In preparation for the next patch, move opcodes enum to new cxl_opcodes.h file
> for visibility from mailbox-utils.c and i2c_mctp_cxl.c, which checks that
> certain command sets are bound with the correct MCTP binding.
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
> hw/cxl/cxl-mailbox-utils.c | 68 ++----------------------------------
> include/hw/cxl/cxl_opcodes.h | 64 +++++++++++++++++++++++++++++++++
Should we put the opcodes into include/hw/cxl/cxl_mailbox.h instead of
creating a new file. cxl_mailbox.h only has some macros.
Fan
> 2 files changed, 66 insertions(+), 66 deletions(-)
> create mode 100644 include/hw/cxl/cxl_opcodes.h
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index a02d130926..ed3294530f 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -23,6 +23,7 @@
> #include "qemu/uuid.h"
> #include "system/hostmem.h"
> #include "qemu/range.h"
> +#include "hw/cxl/cxl_opcodes.h"
>
> #define CXL_CAPACITY_MULTIPLIER (256 * MiB)
> #define CXL_DC_EVENT_LOG_SIZE 8
> @@ -36,7 +37,7 @@
>
> /*
> * How to add a new command, example. The command set FOO, with cmd BAR.
> - * 1. Add the command set and cmd to the enum.
> + * 1. Add the command set and cmd to the enum in cxl_opcodes.h.
> * FOO = 0x7f,
> * #define BAR 0
> * 2. Implement the handler
> @@ -59,71 +60,6 @@
> * a register interface that already deals with it.
> */
>
> -enum {
> - INFOSTAT = 0x00,
> - #define IS_IDENTIFY 0x1
> - #define BACKGROUND_OPERATION_STATUS 0x2
> - #define GET_RESPONSE_MSG_LIMIT 0x3
> - #define SET_RESPONSE_MSG_LIMIT 0x4
> - #define BACKGROUND_OPERATION_ABORT 0x5
> - EVENTS = 0x01,
> - #define GET_RECORDS 0x0
> - #define CLEAR_RECORDS 0x1
> - #define GET_INTERRUPT_POLICY 0x2
> - #define SET_INTERRUPT_POLICY 0x3
> - FIRMWARE_UPDATE = 0x02,
> - #define GET_INFO 0x0
> - #define TRANSFER 0x1
> - #define ACTIVATE 0x2
> - TIMESTAMP = 0x03,
> - #define GET 0x0
> - #define SET 0x1
> - LOGS = 0x04,
> - #define GET_SUPPORTED 0x0
> - #define GET_LOG 0x1
> - #define GET_LOG_CAPABILITIES 0x2
> - #define CLEAR_LOG 0x3
> - #define POPULATE_LOG 0x4
> - FEATURES = 0x05,
> - #define GET_SUPPORTED 0x0
> - #define GET_FEATURE 0x1
> - #define SET_FEATURE 0x2
> - IDENTIFY = 0x40,
> - #define MEMORY_DEVICE 0x0
> - CCLS = 0x41,
> - #define GET_PARTITION_INFO 0x0
> - #define GET_LSA 0x2
> - #define SET_LSA 0x3
> - HEALTH_INFO_ALERTS = 0x42,
> - #define GET_ALERT_CONFIG 0x1
> - #define SET_ALERT_CONFIG 0x2
> - SANITIZE = 0x44,
> - #define OVERWRITE 0x0
> - #define SECURE_ERASE 0x1
> - #define MEDIA_OPERATIONS 0x2
> - PERSISTENT_MEM = 0x45,
> - #define GET_SECURITY_STATE 0x0
> - MEDIA_AND_POISON = 0x43,
> - #define GET_POISON_LIST 0x0
> - #define INJECT_POISON 0x1
> - #define CLEAR_POISON 0x2
> - #define GET_SCAN_MEDIA_CAPABILITIES 0x3
> - #define SCAN_MEDIA 0x4
> - #define GET_SCAN_MEDIA_RESULTS 0x5
> - DCD_CONFIG = 0x48,
> - #define GET_DC_CONFIG 0x0
> - #define GET_DYN_CAP_EXT_LIST 0x1
> - #define ADD_DYN_CAP_RSP 0x2
> - #define RELEASE_DYN_CAP 0x3
> - PHYSICAL_SWITCH = 0x51,
> - #define IDENTIFY_SWITCH_DEVICE 0x0
> - #define GET_PHYSICAL_PORT_STATE 0x1
> - TUNNEL = 0x53,
> - #define MANAGEMENT_COMMAND 0x0
> - MHD = 0x55,
> - #define GET_MHD_INFO 0x0
> -};
> -
> /* CCI Message Format CXL r3.1 Figure 7-19 */
> typedef struct CXLCCIMessage {
> uint8_t category;
> diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> new file mode 100644
> index 0000000000..26d3a99e8a
> --- /dev/null
> +++ b/include/hw/cxl/cxl_opcodes.h
> @@ -0,0 +1,64 @@
> +enum {
> + INFOSTAT = 0x00,
> + #define IS_IDENTIFY 0x1
> + #define BACKGROUND_OPERATION_STATUS 0x2
> + #define GET_RESPONSE_MSG_LIMIT 0x3
> + #define SET_RESPONSE_MSG_LIMIT 0x4
> + #define BACKGROUND_OPERATION_ABORT 0x5
> + EVENTS = 0x01,
> + #define GET_RECORDS 0x0
> + #define CLEAR_RECORDS 0x1
> + #define GET_INTERRUPT_POLICY 0x2
> + #define SET_INTERRUPT_POLICY 0x3
> + FIRMWARE_UPDATE = 0x02,
> + #define GET_INFO 0x0
> + #define TRANSFER 0x1
> + #define ACTIVATE 0x2
> + TIMESTAMP = 0x03,
> + #define GET 0x0
> + #define SET 0x1
> + LOGS = 0x04,
> + #define GET_SUPPORTED 0x0
> + #define GET_LOG 0x1
> + #define GET_LOG_CAPABILITIES 0x2
> + #define CLEAR_LOG 0x3
> + #define POPULATE_LOG 0x4
> + FEATURES = 0x05,
> + #define GET_SUPPORTED 0x0
> + #define GET_FEATURE 0x1
> + #define SET_FEATURE 0x2
> + IDENTIFY = 0x40,
> + #define MEMORY_DEVICE 0x0
> + CCLS = 0x41,
> + #define GET_PARTITION_INFO 0x0
> + #define GET_LSA 0x2
> + #define SET_LSA 0x3
> + HEALTH_INFO_ALERTS = 0x42,
> + #define GET_ALERT_CONFIG 0x1
> + #define SET_ALERT_CONFIG 0x2
> + SANITIZE = 0x44,
> + #define OVERWRITE 0x0
> + #define SECURE_ERASE 0x1
> + #define MEDIA_OPERATIONS 0x2
> + PERSISTENT_MEM = 0x45,
> + #define GET_SECURITY_STATE 0x0
> + MEDIA_AND_POISON = 0x43,
> + #define GET_POISON_LIST 0x0
> + #define INJECT_POISON 0x1
> + #define CLEAR_POISON 0x2
> + #define GET_SCAN_MEDIA_CAPABILITIES 0x3
> + #define SCAN_MEDIA 0x4
> + #define GET_SCAN_MEDIA_RESULTS 0x5
> + DCD_CONFIG = 0x48,
> + #define GET_DC_CONFIG 0x0
> + #define GET_DYN_CAP_EXT_LIST 0x1
> + #define ADD_DYN_CAP_RSP 0x2
> + #define RELEASE_DYN_CAP 0x3
> + PHYSICAL_SWITCH = 0x51,
> + #define IDENTIFY_SWITCH_DEVICE 0x0
> + #define GET_PHYSICAL_PORT_STATE 0x1
> + TUNNEL = 0x53,
> + #define MANAGEMENT_COMMAND 0x0
> + MHD = 0x55,
> + #define GET_MHD_INFO 0x0
> +};
> --
> 2.47.2
>
--
Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 02/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
2025-05-08 0:00 ` [PATCH v2 02/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info anisa.su887
@ 2025-05-20 15:59 ` Fan Ni
2025-05-30 14:07 ` Jonathan Cameron
1 sibling, 0 replies; 31+ messages in thread
From: Fan Ni @ 2025-05-20 15:59 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, linux-cxl,
Anisa Su
On Thu, May 08, 2025 at 12:00:58AM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1.
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
LGTM. minor comments inline.
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> ---
> hw/cxl/cxl-mailbox-utils.c | 56 ++++++++++++++++++++++++++++++++++++
> hw/cxl/i2c_mctp_cxl.c | 6 ++--
> hw/mem/cxl_type3.c | 4 +++
> include/hw/cxl/cxl_device.h | 1 +
> include/hw/cxl/cxl_opcodes.h | 3 ++
> 5 files changed, 68 insertions(+), 2 deletions(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index ed3294530f..d3c69233b8 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -3280,6 +3280,52 @@ static CXLRetCode cmd_dcd_release_dyn_cap(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +/* CXL r3.2 section 7.6.7.6.1: Get DCD Info (Opcode 5600h) */
> +static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint8_t num_hosts;
> + uint8_t num_regions_supported;
> + uint8_t rsvd1[2];
> + uint16_t add_select_policy_bitmask;
uint16_t supported_add_sel_policy_bitmask;
> + uint8_t rsvd2[2];
> + uint16_t release_select_policy_bitmask;
uint16_t supported_removal_policy_bitmask;
Fan
> + uint8_t sanitize_on_release_bitmask;
> + uint8_t rsvd3;
> + uint64_t total_dynamic_capacity;
> + uint64_t region_blk_size_bitmasks[8];
> + } QEMU_PACKED *out = (void *)payload_out;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + CXLDCRegion *region;
> + int i;
> +
> + out->num_hosts = 1;
> + out->num_regions_supported = ct3d->dc.num_regions;
> + stw_le_p(&out->add_select_policy_bitmask,
> + BIT(CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE));
> + stw_le_p(&out->release_select_policy_bitmask,
> + BIT(CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE));
> + out->sanitize_on_release_bitmask = 0;
> +
> + stq_le_p(&out->total_dynamic_capacity,
> + ct3d->dc.total_capacity / CXL_CAPACITY_MULTIPLIER);
> +
> + for (i = 0; i < ct3d->dc.num_regions; i++) {
> + region = &ct3d->dc.regions[i];
> + memcpy(&out->region_blk_size_bitmasks[i],
> + ®ion->supported_blk_size_bitmask,
> + sizeof(out->region_blk_size_bitmasks[i]));
> + }
> +
> + *len_out = sizeof(*out);
> + return CXL_MBOX_SUCCESS;
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3401,6 +3447,11 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
> cmd_tunnel_management_cmd, ~0, 0 },
> };
>
> +static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> + [FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
> + cmd_fm_get_dcd_info, 0, 0 },
> +};
> +
> /*
> * While the command is executing in the background, the device should
> * update the percentage complete in the Background Command Status Register
> @@ -3703,7 +3754,12 @@ void cxl_initialize_t3_fm_owned_ld_mctpcci(CXLCCI *cci, DeviceState *d,
> DeviceState *intf,
> size_t payload_max)
> {
> + CXLType3Dev *ct3d = CXL_TYPE3(d);
> +
> cxl_copy_cci_commands(cci, cxl_cmd_set_t3_fm_owned_ld_mctp);
> + if (ct3d->dc.num_regions) {
> + cxl_copy_cci_commands(cci, cxl_cmd_set_fm_dcd);
> + }
> cci->d = d;
> cci->intf = intf;
> cxl_init_cci(cci, payload_max);
> diff --git a/hw/cxl/i2c_mctp_cxl.c b/hw/cxl/i2c_mctp_cxl.c
> index 7d2cbc3b75..dd5fc4f393 100644
> --- a/hw/cxl/i2c_mctp_cxl.c
> +++ b/hw/cxl/i2c_mctp_cxl.c
> @@ -29,6 +29,7 @@
> #include "hw/pci/pcie_port.h"
> #include "hw/qdev-properties.h"
> #include "hw/registerfields.h"
> +#include "hw/cxl/cxl_opcodes.h"
>
> #define TYPE_I2C_MCTP_CXL "i2c_mctp_cxl"
>
> @@ -198,9 +199,10 @@ static void i2c_mctp_cxl_handle_message(MCTPI2CEndpoint *mctp)
> */
>
> if (!(msg->message_type == MCTP_MT_CXL_TYPE3 &&
> - msg->command_set < 0x51) &&
> + msg->command_set < PHYSICAL_SWITCH) &&
> !(msg->message_type == MCTP_MT_CXL_FMAPI &&
> - msg->command_set >= 0x51 && msg->command_set < 0x56)) {
> + msg->command_set >= PHYSICAL_SWITCH &&
> + msg->command_set < GLOBAL_MEMORY_ACCESS_EP_MGMT)) {
> buf->rc = CXL_MBOX_UNSUPPORTED;
> st24_le_p(buf->pl_length, len_out);
> s->len = s->pos;
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 11c38a9292..7129da0940 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -8,6 +8,7 @@
> *
> * SPDX-License-Identifier: GPL-v2-only
> */
> +#include <math.h>
>
> #include "qemu/osdep.h"
> #include "qemu/units.h"
> @@ -766,6 +767,8 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
> uint64_t region_len;
> uint64_t decode_len;
> uint64_t blk_size = 2 * MiB;
> + /* Only 1 block size is supported for now. */
> + uint64_t supported_blk_size_bitmask = BIT((int) log2(blk_size));
> CXLDCRegion *region;
> MemoryRegion *mr;
> uint64_t dc_size;
> @@ -811,6 +814,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
> .block_size = blk_size,
> /* dsmad_handle set when creating CDAT table entries */
> .flags = 0,
> + .supported_blk_size_bitmask = supported_blk_size_bitmask,
> };
> ct3d->dc.total_capacity += region->len;
> region->blk_bitmap = bitmap_new(region->len / region->block_size);
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index ca515cab13..bebed04085 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -608,6 +608,7 @@ typedef struct CXLDCRegion {
> uint32_t dsmadhandle;
> uint8_t flags;
> unsigned long *blk_bitmap;
> + uint64_t supported_blk_size_bitmask;
> } CXLDCRegion;
>
> typedef struct CXLSetFeatureInfo {
> diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> index 26d3a99e8a..c4c233665e 100644
> --- a/include/hw/cxl/cxl_opcodes.h
> +++ b/include/hw/cxl/cxl_opcodes.h
> @@ -61,4 +61,7 @@ enum {
> #define MANAGEMENT_COMMAND 0x0
> MHD = 0x55,
> #define GET_MHD_INFO 0x0
> + FMAPI_DCD_MGMT = 0x56,
> + #define GET_DCD_INFO 0x0
> + GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
> };
> --
> 2.47.2
>
--
Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 03/10] cxl/type3: Add dsmas_flags to CXLDCRegion struct
2025-05-08 0:00 ` [PATCH v2 03/10] cxl/type3: Add dsmas_flags to CXLDCRegion struct anisa.su887
@ 2025-05-20 16:05 ` Fan Ni
0 siblings, 0 replies; 31+ messages in thread
From: Fan Ni @ 2025-05-20 16:05 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, linux-cxl,
Anisa Su
On Thu, May 08, 2025 at 12:00:59AM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> Add booleans to DC Region struct to represent dsmas flags (defined in CDAT)
> in preparation for the next command, which returns the flags in the
s/next command/mailbox command 0x5601h/, otherwise
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> response.
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
> hw/mem/cxl_type3.c | 8 +++++++-
> include/hw/cxl/cxl_device.h | 15 +++++++++++++++
> 2 files changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 7129da0940..05d4c861f1 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -232,10 +232,16 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv)
> * future.
> */
> for (i = 0; i < ct3d->dc.num_regions; i++) {
> + ct3d->dc.regions[i].nonvolatile = false;
> + ct3d->dc.regions[i].sharable = false;
> + ct3d->dc.regions[i].hw_managed_coherency = false;
> + ct3d->dc.regions[i].ic_specific_dc_management = false;
> + ct3d->dc.regions[i].rdonly = false;
> ct3_build_cdat_entries_for_mr(&(table[cur_ent]),
> dsmad_handle++,
> ct3d->dc.regions[i].len,
> - false, true, region_base);
> + ct3d->dc.regions[i].nonvolatile,
> + true, region_base);
> ct3d->dc.regions[i].dsmadhandle = dsmad_handle - 1;
>
> cur_ent += CT3_CDAT_NUM_ENTRIES;
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index bebed04085..cbcc1bc9f5 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -177,6 +177,15 @@ typedef enum {
> MAX_LOG_TYPE
> } CXLLogType;
>
> +/* DSMAS Flags Bits */
> +typedef enum {
> + CXL_DSMAS_FLAGS_NONVOLATILE = 2,
> + CXL_DSMAS_FLAGS_SHARABLE = 3,
> + CXL_DSMAS_FLAGS_HW_MANAGED_COHERENCY = 4,
> + CXL_DSMAS_FLAGS_IC_SPECIFIC_DC_MANAGEMENT = 5,
> + CXL_DSMAS_FLAGS_RDONLY = 6,
> +} CXLDSMASFlags;
> +
> typedef struct CXLCCI CXLCCI;
> typedef struct cxl_device_state CXLDeviceState;
> struct cxl_cmd;
> @@ -609,6 +618,12 @@ typedef struct CXLDCRegion {
> uint8_t flags;
> unsigned long *blk_bitmap;
> uint64_t supported_blk_size_bitmask;
> + /* Following bools make up dsmas flags, as defined in the CDAT */
> + bool nonvolatile;
> + bool sharable;
> + bool hw_managed_coherency;
> + bool ic_specific_dc_management;
> + bool rdonly;
> } CXLDCRegion;
>
> typedef struct CXLSetFeatureInfo {
> --
> 2.47.2
>
--
Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 04/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
2025-05-08 0:01 ` [PATCH v2 04/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config anisa.su887
@ 2025-05-20 16:23 ` Fan Ni
0 siblings, 0 replies; 31+ messages in thread
From: Fan Ni @ 2025-05-20 16:23 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, linux-cxl,
Anisa Su
On Thu, May 08, 2025 at 12:01:00AM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5601 implemented per CXL r3.2 Spec Section 7.6.7.6.2
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
One minor comment inline. Otherwise,
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> ---
> hw/cxl/cxl-mailbox-utils.c | 102 +++++++++++++++++++++++++++++++++++
> include/hw/cxl/cxl_opcodes.h | 1 +
> 2 files changed, 103 insertions(+)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index d3c69233b8..6afc45833d 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -3326,6 +3326,106 @@ static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +static void build_dsmas_flags(uint8_t *flags, CXLDCRegion *region)
> +{
> + *flags = 0;
> +
> + if (region->nonvolatile) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_NONVOLATILE);
> + }
> + if (region->sharable) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_SHARABLE);
> + }
> + if (region->hw_managed_coherency) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_HW_MANAGED_COHERENCY);
> + }
> + if (region->ic_specific_dc_management) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_IC_SPECIFIC_DC_MANAGEMENT);
> + }
> + if (region->rdonly) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_RDONLY);
> + }
> +}
> +
> +/* CXL r3.2 section 7.6.7.6.2: Get Host DC Region Configuration (Opcode 5601h) */
> +static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t region_cnt;
> + uint8_t start_rid;
> + } QEMU_PACKED *in = (void *)payload_in;
> + struct {
> + uint16_t host_id;
> + uint8_t num_regions;
> + uint8_t regions_returned;
> + struct {
> + uint64_t base;
> + uint64_t decode_len;
> + uint64_t region_len;
> + uint64_t block_size;
> + uint8_t dsmas_flags;
> + uint8_t rsvd1[3];
> + uint8_t sanitize;
We may have other flags in the future, maybe we want to generalize the
name of the field. Maybe "flags"?
Fan
> + uint8_t rsvd2[3];
> + } QEMU_PACKED records[];
> + } QEMU_PACKED *out = (void *)payload_out;
> + struct {
> + uint32_t num_extents_supported;
> + uint32_t num_extents_available;
> + uint32_t num_tags_supported;
> + uint32_t num_tags_available;
> + } QEMU_PACKED *extra_out;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + uint16_t record_count, out_pl_len, i;
> +
> + if (in->start_rid >= ct3d->dc.num_regions) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
> + record_count = MIN(ct3d->dc.num_regions - in->start_rid, in->region_cnt);
> +
> + out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
> + extra_out = (void *)out + out_pl_len;
> + out_pl_len += sizeof(*extra_out);
> +
> + assert(out_pl_len <= CXL_MAILBOX_MAX_PAYLOAD_SIZE);
> +
> + stw_le_p(&out->host_id, 0);
> + out->num_regions = ct3d->dc.num_regions;
> + out->regions_returned = record_count;
> +
> + for (i = 0; i < record_count; i++) {
> + stq_le_p(&out->records[i].base,
> + ct3d->dc.regions[in->start_rid + i].base);
> + stq_le_p(&out->records[i].decode_len,
> + ct3d->dc.regions[in->start_rid + i].decode_len /
> + CXL_CAPACITY_MULTIPLIER);
> + stq_le_p(&out->records[i].region_len,
> + ct3d->dc.regions[in->start_rid + i].len);
> + stq_le_p(&out->records[i].block_size,
> + ct3d->dc.regions[in->start_rid + i].block_size);
> + build_dsmas_flags(&out->records[i].dsmas_flags,
> + &ct3d->dc.regions[in->start_rid + i]);
> + /* Sanitize is bit 0 of flags. */
> + out->records[i].sanitize =
> + ct3d->dc.regions[in->start_rid + i].flags & BIT(0);
> + }
> +
> + stl_le_p(&extra_out->num_extents_supported, CXL_NUM_EXTENTS_SUPPORTED);
> + stl_le_p(&extra_out->num_extents_available, CXL_NUM_EXTENTS_SUPPORTED -
> + ct3d->dc.total_extent_count);
> + stl_le_p(&extra_out->num_tags_supported, CXL_NUM_TAGS_SUPPORTED);
> + stl_le_p(&extra_out->num_tags_available, CXL_NUM_TAGS_SUPPORTED);
> +
> + *len_out = out_pl_len;
> + return CXL_MBOX_SUCCESS;
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3450,6 +3550,8 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
> static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> [FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
> cmd_fm_get_dcd_info, 0, 0 },
> + [FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
> + cmd_fm_get_host_dc_region_config, 4, 0 },
> };
>
> /*
> diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> index c4c233665e..68ad68291c 100644
> --- a/include/hw/cxl/cxl_opcodes.h
> +++ b/include/hw/cxl/cxl_opcodes.h
> @@ -63,5 +63,6 @@ enum {
> #define GET_MHD_INFO 0x0
> FMAPI_DCD_MGMT = 0x56,
> #define GET_DCD_INFO 0x0
> + #define GET_HOST_DC_REGION_CONFIG 0x1
> GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
> };
> --
> 2.47.2
>
--
Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 05/10] cxl_events.h: Move definition for dynamic_capacity_uuid and enum for DC event types
2025-05-08 0:01 ` [PATCH v2 05/10] cxl_events.h: Move definition for dynamic_capacity_uuid and enum for DC event types anisa.su887
@ 2025-05-20 16:44 ` Fan Ni
0 siblings, 0 replies; 31+ messages in thread
From: Fan Ni @ 2025-05-20 16:44 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, linux-cxl,
Anisa Su
On Thu, May 08, 2025 at 12:01:01AM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> Move definition/enum to cxl_events.h for shared use in next patch
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> hw/mem/cxl_type3.c | 15 ---------------
> include/hw/cxl/cxl_events.h | 15 +++++++++++++++
> 2 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 05d4c861f1..6ad48f55ce 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1982,21 +1982,6 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
> }
> }
>
> -/* CXL r3.1 Table 8-50: Dynamic Capacity Event Record */
> -static const QemuUUID dynamic_capacity_uuid = {
> - .data = UUID(0xca95afa7, 0xf183, 0x4018, 0x8c, 0x2f,
> - 0x95, 0x26, 0x8e, 0x10, 0x1a, 0x2a),
> -};
> -
> -typedef enum CXLDCEventType {
> - DC_EVENT_ADD_CAPACITY = 0x0,
> - DC_EVENT_RELEASE_CAPACITY = 0x1,
> - DC_EVENT_FORCED_RELEASE_CAPACITY = 0x2,
> - DC_EVENT_REGION_CONFIG_UPDATED = 0x3,
> - DC_EVENT_ADD_CAPACITY_RSP = 0x4,
> - DC_EVENT_CAPACITY_RELEASED = 0x5,
> -} CXLDCEventType;
> -
> /*
> * Check whether the range [dpa, dpa + len - 1] has overlaps with extents in
> * the list.
> diff --git a/include/hw/cxl/cxl_events.h b/include/hw/cxl/cxl_events.h
> index 38cadaa0f3..758b075a64 100644
> --- a/include/hw/cxl/cxl_events.h
> +++ b/include/hw/cxl/cxl_events.h
> @@ -184,4 +184,19 @@ typedef struct CXLEventDynamicCapacity {
> uint32_t tags_avail;
> } QEMU_PACKED CXLEventDynamicCapacity;
>
> +/* CXL r3.1 Table 8-50: Dynamic Capacity Event Record */
> +static const QemuUUID dynamic_capacity_uuid = {
> + .data = UUID(0xca95afa7, 0xf183, 0x4018, 0x8c, 0x2f,
> + 0x95, 0x26, 0x8e, 0x10, 0x1a, 0x2a),
> +};
> +
> +typedef enum CXLDCEventType {
> + DC_EVENT_ADD_CAPACITY = 0x0,
> + DC_EVENT_RELEASE_CAPACITY = 0x1,
> + DC_EVENT_FORCED_RELEASE_CAPACITY = 0x2,
> + DC_EVENT_REGION_CONFIG_UPDATED = 0x3,
> + DC_EVENT_ADD_CAPACITY_RSP = 0x4,
> + DC_EVENT_CAPACITY_RELEASED = 0x5,
> +} CXLDCEventType;
> +
> #endif /* CXL_EVENTS_H */
> --
> 2.47.2
>
--
Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 06/10] hw/cxl_type3: Add DC Region bitmap lock
2025-05-08 0:01 ` [PATCH v2 06/10] hw/cxl_type3: Add DC Region bitmap lock anisa.su887
@ 2025-05-20 16:56 ` Fan Ni
0 siblings, 0 replies; 31+ messages in thread
From: Fan Ni @ 2025-05-20 16:56 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, linux-cxl,
Anisa Su
On Thu, May 08, 2025 at 12:01:02AM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> Add a lock on the bitmap of each CXLDCRegion in preparation for the next
> patch which implements FMAPI Set DC Region Configuration. This command
> can modify the block size, which means the region's bitmap must be updated
> accordingly.
>
> The lock becomes necessary when commands that add/release extents
> (meaning they update the bitmap too) are enabled on a different CCI than
> the CCI on which the FMAPI commands are enabled.
read/write access also need to touch the blk_bitmap to ensure the range
to access is backed by DC blocks through ct3_test_region_block_backed().
Otherwise,
Reviewed-by: Fan Ni <fan.ni@samsung.com>
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
> hw/mem/cxl_type3.c | 4 ++++
> include/hw/cxl/cxl_device.h | 1 +
> 2 files changed, 5 insertions(+)
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 6ad48f55ce..b5b3df5edf 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -824,6 +824,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
> };
> ct3d->dc.total_capacity += region->len;
> region->blk_bitmap = bitmap_new(region->len / region->block_size);
> + qemu_mutex_init(®ion->bitmap_lock);
> }
> QTAILQ_INIT(&ct3d->dc.extents);
> QTAILQ_INIT(&ct3d->dc.extents_pending);
> @@ -1176,6 +1177,7 @@ void ct3_set_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
> return;
> }
>
> + QEMU_LOCK_GUARD(®ion->bitmap_lock);
> bitmap_set(region->blk_bitmap, (dpa - region->base) / region->block_size,
> len / region->block_size);
> }
> @@ -1202,6 +1204,7 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
> * if bits between [dpa, dpa + len) are all 1s, meaning the DPA range is
> * backed with DC extents, return true; else return false.
> */
> + QEMU_LOCK_GUARD(®ion->bitmap_lock);
> return find_next_zero_bit(region->blk_bitmap, nr + nbits, nr) == nr + nbits;
> }
>
> @@ -1223,6 +1226,7 @@ void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
>
> nr = (dpa - region->base) / region->block_size;
> nbits = len / region->block_size;
> + QEMU_LOCK_GUARD(®ion->bitmap_lock);
> bitmap_clear(region->blk_bitmap, nr, nbits);
> }
>
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index cbcc1bc9f5..9cfd9c5a9f 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -618,6 +618,7 @@ typedef struct CXLDCRegion {
> uint8_t flags;
> unsigned long *blk_bitmap;
> uint64_t supported_blk_size_bitmask;
> + QemuMutex bitmap_lock;
> /* Following bools make up dsmas flags, as defined in the CDAT */
> bool nonvolatile;
> bool sharable;
> --
> 2.47.2
>
--
Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 07/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-05-08 0:01 ` [PATCH v2 07/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config anisa.su887
2025-05-20 13:29 ` Jonathan Cameron
@ 2025-05-20 17:07 ` Fan Ni
1 sibling, 0 replies; 31+ messages in thread
From: Fan Ni @ 2025-05-20 17:07 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, linux-cxl,
Anisa Su
On Thu, May 08, 2025 at 12:01:03AM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
> hw/cxl/cxl-mailbox-utils.c | 97 ++++++++++++++++++++++++++++++++++++
> hw/mem/cxl_type3.c | 2 +-
> include/hw/cxl/cxl_device.h | 3 ++
> include/hw/cxl/cxl_mailbox.h | 6 +++
> include/hw/cxl/cxl_opcodes.h | 1 +
> 5 files changed, 108 insertions(+), 1 deletion(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 6afc45833d..fe38a13f71 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -3426,6 +3426,96 @@ static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +static void cxl_mbox_dc_event_create_record_hdr(CXLType3Dev *ct3d,
> + CXLEventRecordHdr *hdr)
> +{
> + /*
> + * CXL r3.1 section 8.2.9.2.1.6: Dynamic Capacity Event Record
> + *
> + * All Dynamic Capacity event records shall set the Event Record Severity
> + * field in the Common Event Record Format to Informational Event. All
> + * Dynamic Capacity related events shall be logged in the Dynamic Capacity
> + * Event Log.
> + */
> + uint8_t flags = 1 << CXL_EVENT_TYPE_INFO;
> +
> + st24_le_p(&hdr->flags, flags);
> + hdr->length = sizeof(struct CXLEventDynamicCapacity);
> + memcpy(&hdr->id, &dynamic_capacity_uuid, sizeof(hdr->id));
> + stq_le_p(&hdr->timestamp, cxl_device_get_timestamp(&ct3d->cxl_dstate));
> +}
This function does the same thing as cxl_assign_event_header(), maybe we
can move the cxl_assign_event_header() to header file so it can be used by
both cxl_type3.c and cxl-mailbox-utils.c and then this function is not
needed or simplified by calling cxl_assign_event_header().
Fan
> +
> +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint8_t reg_id;
> + uint8_t rsvd[3];
> + uint64_t block_sz;
> + uint8_t flags;
> + uint8_t rsvd2[3];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + CXLEventDynamicCapacity dcEvent = {};
> + CXLDCRegion *region;
> +
> + region = &ct3d->dc.regions[in->reg_id];
> +
> + /*
> + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> + * This command shall fail with Unsupported when the Sanitize on Release
> + * field does not match the region’s configuration... and the device
> + * does not support reconfiguration of the Sanitize on Release setting.
> + *
> + * Currently not reconfigurable, so always fail if sanitize bit
> + * doesn't match.
> + */
> + if ((in->flags & 0x1) != (region->flags & 0x1)) {
> + return CXL_MBOX_UNSUPPORTED;
> + }
> +
> + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> + return CXL_MBOX_UNSUPPORTED;
> + }
> +
> + /* Check that no extents are in the region being reconfigured */
> + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> + return CXL_MBOX_UNSUPPORTED;
> + }
> +
> + /* Check that new block size is supported */
> + if (!test_bit(BIT((int) log2(in->block_sz)),
> + ®ion->supported_blk_size_bitmask)) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
> +
> + /* Free bitmap and create new one for new block size. */
> + qemu_mutex_lock(®ion->bitmap_lock);
> + g_free(region->blk_bitmap);
> + region->blk_bitmap = bitmap_new(region->len / in->block_sz);
> + qemu_mutex_unlock(®ion->bitmap_lock);
> + region->block_size = in->block_sz;
If the new block size equals to region->block_size, we can avoid the free
and allocation of the bitmap?
Fan
> +
> + /* Create event record and insert into event log */
> + cxl_mbox_dc_event_create_record_hdr(ct3d, &dcEvent.hdr);
> + dcEvent.type = DC_EVENT_REGION_CONFIG_UPDATED;
> + dcEvent.validity_flags = 1;
> + dcEvent.host_id = 0;
> + dcEvent.updated_region_id = in->reg_id;
> +
> + if (cxl_event_insert(&ct3d->cxl_dstate,
> + CXL_EVENT_TYPE_DYNAMIC_CAP,
> + (CXLEventRecordRaw *)&dcEvent)) {
> + cxl_event_irq_assert(ct3d);
> + }
> + return CXL_MBOX_SUCCESS;
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3552,6 +3642,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> cmd_fm_get_dcd_info, 0, 0 },
> [FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
> cmd_fm_get_host_dc_region_config, 4, 0 },
> + [FMAPI_DCD_MGMT][SET_DC_REGION_CONFIG] = { "SET_DC_REGION_CONFIG",
> + cmd_fm_set_dc_region_config, 16,
> + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> };
>
> /*
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index b5b3df5edf..edc29f1ccb 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1695,7 +1695,7 @@ void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type,
> pcie_aer_inject_error(PCI_DEVICE(obj), &err);
> }
>
> -static void cxl_assign_event_header(CXLEventRecordHdr *hdr,
> +void cxl_assign_event_header(CXLEventRecordHdr *hdr,
> const QemuUUID *uuid, uint32_t flags,
> uint8_t length, uint64_t timestamp)
> {
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index 9cfd9c5a9f..22823e2054 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -821,4 +821,7 @@ void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
> uint64_t len);
> bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
> uint64_t len);
> +void cxl_assign_event_header(CXLEventRecordHdr *hdr,
> + const QemuUUID *uuid, uint32_t flags,
> + uint8_t length, uint64_t timestamp);
> #endif
> diff --git a/include/hw/cxl/cxl_mailbox.h b/include/hw/cxl/cxl_mailbox.h
> index 8e1c7c5f15..820c411cbb 100644
> --- a/include/hw/cxl/cxl_mailbox.h
> +++ b/include/hw/cxl/cxl_mailbox.h
> @@ -8,6 +8,7 @@
> #ifndef CXL_MAILBOX_H
> #define CXL_MAILBOX_H
>
> +#define CXL_MBOX_CONFIG_CHANGE_COLD_RESET (1)
> #define CXL_MBOX_IMMEDIATE_CONFIG_CHANGE (1 << 1)
> #define CXL_MBOX_IMMEDIATE_DATA_CHANGE (1 << 2)
> #define CXL_MBOX_IMMEDIATE_POLICY_CHANGE (1 << 3)
> @@ -15,6 +16,11 @@
> #define CXL_MBOX_SECURITY_STATE_CHANGE (1 << 5)
> #define CXL_MBOX_BACKGROUND_OPERATION (1 << 6)
> #define CXL_MBOX_BACKGROUND_OPERATION_ABORT (1 << 7)
> +#define CXL_MBOX_SECONDARY_MBOX_SUPPORTED (1 << 8)
> +#define CXL_MBOX_REQUEST_ABORT_BACKGROUND_OP_SUPPORTED (1 << 9)
> +#define CXL_MBOX_CEL_10_TO_11_VALID (1 << 10)
> +#define CXL_MBOX_CONFIG_CHANGE_CONV_RESET (1 << 11)
> +#define CXL_MBOX_CONFIG_CHANGE_CXL_RESET (1 << 12)
>
> #define CXL_LOG_CAP_CLEAR_SUPPORTED (1 << 0)
> #define CXL_LOG_CAP_POPULATE_SUPPORTED (1 << 1)
> diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> index 68ad68291c..ed4be23b75 100644
> --- a/include/hw/cxl/cxl_opcodes.h
> +++ b/include/hw/cxl/cxl_opcodes.h
> @@ -64,5 +64,6 @@ enum {
> FMAPI_DCD_MGMT = 0x56,
> #define GET_DCD_INFO 0x0
> #define GET_HOST_DC_REGION_CONFIG 0x1
> + #define SET_DC_REGION_CONFIG 0x2
> GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
> };
> --
> 2.47.2
>
--
Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 08/10] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
2025-05-08 0:01 ` [PATCH v2 08/10] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists anisa.su887
@ 2025-05-20 17:18 ` Fan Ni
0 siblings, 0 replies; 31+ messages in thread
From: Fan Ni @ 2025-05-20 17:18 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, linux-cxl,
Anisa Su
On Thu, May 08, 2025 at 12:01:04AM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5603 implemented per CXL r3.2 Spec Section 7.6.7.6.4
> Very similar to previously implemented command 0x4801.
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> ---
> hw/cxl/cxl-mailbox-utils.c | 75 ++++++++++++++++++++++++++++++++++++
> include/hw/cxl/cxl_opcodes.h | 1 +
> 2 files changed, 76 insertions(+)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index fe38a13f71..a897a34ef9 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -3516,6 +3516,79 @@ static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +/* CXL r3.2 section 7.6.7.6.4 Get DC Region Extent Lists (Opcode 5603h) */
> +static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t rsvd[2];
> + uint32_t extent_cnt;
> + uint32_t start_extent_id;
> + } QEMU_PACKED *in = (void *)payload_in;
> + struct {
> + uint16_t host_id;
> + uint8_t rsvd[2];
> + uint32_t start_extent_id;
> + uint32_t extents_returned;
> + uint32_t total_extents;
> + uint32_t list_generation_num;
> + uint8_t rsvd2[4];
> + CXLDCExtentRaw records[];
> + } QEMU_PACKED *out = (void *)payload_out;
> + QEMU_BUILD_BUG_ON(sizeof(*in) != 0xc);
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + CXLDCExtent *ent;
> + CXLDCExtentRaw *out_rec;
> + uint16_t record_count = 0, record_done = 0, i = 0;
> + uint16_t out_pl_len, max_size;
> +
> + if (in->host_id != 0) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
> +
> + if (in->start_extent_id > ct3d->dc.total_extent_count) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
> +
> + record_count = MIN(in->extent_cnt,
> + ct3d->dc.total_extent_count - in->start_extent_id);
> + max_size = CXL_MAILBOX_MAX_PAYLOAD_SIZE - sizeof(*out);
> + record_count = MIN(record_count, max_size / sizeof(out->records[0]));
> + out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
> +
> + stw_le_p(&out->host_id, in->host_id);
> + stl_le_p(&out->start_extent_id, in->start_extent_id);
> + stl_le_p(&out->extents_returned, record_count);
> + stl_le_p(&out->total_extents, ct3d->dc.total_extent_count);
> + stl_le_p(&out->list_generation_num, ct3d->dc.ext_list_gen_seq);
> +
> + if (record_count > 0) {
> + QTAILQ_FOREACH(ent, &ct3d->dc.extents, node) {
> + if (i++ < in->start_extent_id) {
> + continue;
> + }
> + out_rec = &out->records[record_done];
> + stq_le_p(&out_rec->start_dpa, ent->start_dpa);
> + stq_le_p(&out_rec->len, ent->len);
> + memcpy(&out_rec->tag, ent->tag, 0x10);
> + stw_le_p(&out_rec->shared_seq, ent->shared_seq);
> +
> + record_done++;
> + if (record_done == record_count) {
> + break;
> + }
> + }
> + }
> +
> + *len_out = out_pl_len;
> + return CXL_MBOX_SUCCESS;
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3649,6 +3722,8 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> + [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
> + cmd_fm_get_dc_region_extent_list, 12, 0 },
> };
>
> /*
> diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> index ed4be23b75..ad4e614daa 100644
> --- a/include/hw/cxl/cxl_opcodes.h
> +++ b/include/hw/cxl/cxl_opcodes.h
> @@ -65,5 +65,6 @@ enum {
> #define GET_DCD_INFO 0x0
> #define GET_HOST_DC_REGION_CONFIG 0x1
> #define SET_DC_REGION_CONFIG 0x2
> + #define GET_DC_REGION_EXTENT_LIST 0x3
> GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
> };
> --
> 2.47.2
>
--
Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file
2025-05-20 15:37 ` Fan Ni
@ 2025-05-20 17:33 ` Anisa Su
2025-05-30 13:43 ` Jonathan Cameron
0 siblings, 1 reply; 31+ messages in thread
From: Anisa Su @ 2025-05-20 17:33 UTC (permalink / raw)
To: Fan Ni; +Cc: anisa.su887, qemu-devel, Jonathan.Cameron, dave, linux-cxl
On Tue, May 20, 2025 at 08:37:35AM -0700, Fan Ni wrote:
> On Thu, May 08, 2025 at 12:00:57AM +0000, anisa.su887@gmail.com wrote:
> > From: Anisa Su <anisa.su@samsung.com>
> >
> > In preparation for the next patch, move opcodes enum to new cxl_opcodes.h file
> > for visibility from mailbox-utils.c and i2c_mctp_cxl.c, which checks that
> > certain command sets are bound with the correct MCTP binding.
> >
> > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > ---
> > hw/cxl/cxl-mailbox-utils.c | 68 ++----------------------------------
> > include/hw/cxl/cxl_opcodes.h | 64 +++++++++++++++++++++++++++++++++
>
> Should we put the opcodes into include/hw/cxl/cxl_mailbox.h instead of
> creating a new file. cxl_mailbox.h only has some macros.
>
> Fan
>
I had some discussion with Jonathan in the v1 thread about this. We
agreed it is fine to use mailbox.h because it only has a few macros in it,
but in case more things get added to it later, I made a separate file.
Then no need to re-organize later.
>
>
> > 2 files changed, 66 insertions(+), 66 deletions(-)
> > create mode 100644 include/hw/cxl/cxl_opcodes.h
> >
> > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > index a02d130926..ed3294530f 100644
> > --- a/hw/cxl/cxl-mailbox-utils.c
> > +++ b/hw/cxl/cxl-mailbox-utils.c
> > @@ -23,6 +23,7 @@
> > #include "qemu/uuid.h"
> > #include "system/hostmem.h"
> > #include "qemu/range.h"
> > +#include "hw/cxl/cxl_opcodes.h"
> >
> > #define CXL_CAPACITY_MULTIPLIER (256 * MiB)
> > #define CXL_DC_EVENT_LOG_SIZE 8
> > @@ -36,7 +37,7 @@
> >
> > /*
> > * How to add a new command, example. The command set FOO, with cmd BAR.
> > - * 1. Add the command set and cmd to the enum.
> > + * 1. Add the command set and cmd to the enum in cxl_opcodes.h.
> > * FOO = 0x7f,
> > * #define BAR 0
> > * 2. Implement the handler
> > @@ -59,71 +60,6 @@
> > * a register interface that already deals with it.
> > */
> >
> > -enum {
> > - INFOSTAT = 0x00,
> > - #define IS_IDENTIFY 0x1
> > - #define BACKGROUND_OPERATION_STATUS 0x2
> > - #define GET_RESPONSE_MSG_LIMIT 0x3
> > - #define SET_RESPONSE_MSG_LIMIT 0x4
> > - #define BACKGROUND_OPERATION_ABORT 0x5
> > - EVENTS = 0x01,
> > - #define GET_RECORDS 0x0
> > - #define CLEAR_RECORDS 0x1
> > - #define GET_INTERRUPT_POLICY 0x2
> > - #define SET_INTERRUPT_POLICY 0x3
> > - FIRMWARE_UPDATE = 0x02,
> > - #define GET_INFO 0x0
> > - #define TRANSFER 0x1
> > - #define ACTIVATE 0x2
> > - TIMESTAMP = 0x03,
> > - #define GET 0x0
> > - #define SET 0x1
> > - LOGS = 0x04,
> > - #define GET_SUPPORTED 0x0
> > - #define GET_LOG 0x1
> > - #define GET_LOG_CAPABILITIES 0x2
> > - #define CLEAR_LOG 0x3
> > - #define POPULATE_LOG 0x4
> > - FEATURES = 0x05,
> > - #define GET_SUPPORTED 0x0
> > - #define GET_FEATURE 0x1
> > - #define SET_FEATURE 0x2
> > - IDENTIFY = 0x40,
> > - #define MEMORY_DEVICE 0x0
> > - CCLS = 0x41,
> > - #define GET_PARTITION_INFO 0x0
> > - #define GET_LSA 0x2
> > - #define SET_LSA 0x3
> > - HEALTH_INFO_ALERTS = 0x42,
> > - #define GET_ALERT_CONFIG 0x1
> > - #define SET_ALERT_CONFIG 0x2
> > - SANITIZE = 0x44,
> > - #define OVERWRITE 0x0
> > - #define SECURE_ERASE 0x1
> > - #define MEDIA_OPERATIONS 0x2
> > - PERSISTENT_MEM = 0x45,
> > - #define GET_SECURITY_STATE 0x0
> > - MEDIA_AND_POISON = 0x43,
> > - #define GET_POISON_LIST 0x0
> > - #define INJECT_POISON 0x1
> > - #define CLEAR_POISON 0x2
> > - #define GET_SCAN_MEDIA_CAPABILITIES 0x3
> > - #define SCAN_MEDIA 0x4
> > - #define GET_SCAN_MEDIA_RESULTS 0x5
> > - DCD_CONFIG = 0x48,
> > - #define GET_DC_CONFIG 0x0
> > - #define GET_DYN_CAP_EXT_LIST 0x1
> > - #define ADD_DYN_CAP_RSP 0x2
> > - #define RELEASE_DYN_CAP 0x3
> > - PHYSICAL_SWITCH = 0x51,
> > - #define IDENTIFY_SWITCH_DEVICE 0x0
> > - #define GET_PHYSICAL_PORT_STATE 0x1
> > - TUNNEL = 0x53,
> > - #define MANAGEMENT_COMMAND 0x0
> > - MHD = 0x55,
> > - #define GET_MHD_INFO 0x0
> > -};
> > -
> > /* CCI Message Format CXL r3.1 Figure 7-19 */
> > typedef struct CXLCCIMessage {
> > uint8_t category;
> > diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> > new file mode 100644
> > index 0000000000..26d3a99e8a
> > --- /dev/null
> > +++ b/include/hw/cxl/cxl_opcodes.h
> > @@ -0,0 +1,64 @@
> > +enum {
> > + INFOSTAT = 0x00,
> > + #define IS_IDENTIFY 0x1
> > + #define BACKGROUND_OPERATION_STATUS 0x2
> > + #define GET_RESPONSE_MSG_LIMIT 0x3
> > + #define SET_RESPONSE_MSG_LIMIT 0x4
> > + #define BACKGROUND_OPERATION_ABORT 0x5
> > + EVENTS = 0x01,
> > + #define GET_RECORDS 0x0
> > + #define CLEAR_RECORDS 0x1
> > + #define GET_INTERRUPT_POLICY 0x2
> > + #define SET_INTERRUPT_POLICY 0x3
> > + FIRMWARE_UPDATE = 0x02,
> > + #define GET_INFO 0x0
> > + #define TRANSFER 0x1
> > + #define ACTIVATE 0x2
> > + TIMESTAMP = 0x03,
> > + #define GET 0x0
> > + #define SET 0x1
> > + LOGS = 0x04,
> > + #define GET_SUPPORTED 0x0
> > + #define GET_LOG 0x1
> > + #define GET_LOG_CAPABILITIES 0x2
> > + #define CLEAR_LOG 0x3
> > + #define POPULATE_LOG 0x4
> > + FEATURES = 0x05,
> > + #define GET_SUPPORTED 0x0
> > + #define GET_FEATURE 0x1
> > + #define SET_FEATURE 0x2
> > + IDENTIFY = 0x40,
> > + #define MEMORY_DEVICE 0x0
> > + CCLS = 0x41,
> > + #define GET_PARTITION_INFO 0x0
> > + #define GET_LSA 0x2
> > + #define SET_LSA 0x3
> > + HEALTH_INFO_ALERTS = 0x42,
> > + #define GET_ALERT_CONFIG 0x1
> > + #define SET_ALERT_CONFIG 0x2
> > + SANITIZE = 0x44,
> > + #define OVERWRITE 0x0
> > + #define SECURE_ERASE 0x1
> > + #define MEDIA_OPERATIONS 0x2
> > + PERSISTENT_MEM = 0x45,
> > + #define GET_SECURITY_STATE 0x0
> > + MEDIA_AND_POISON = 0x43,
> > + #define GET_POISON_LIST 0x0
> > + #define INJECT_POISON 0x1
> > + #define CLEAR_POISON 0x2
> > + #define GET_SCAN_MEDIA_CAPABILITIES 0x3
> > + #define SCAN_MEDIA 0x4
> > + #define GET_SCAN_MEDIA_RESULTS 0x5
> > + DCD_CONFIG = 0x48,
> > + #define GET_DC_CONFIG 0x0
> > + #define GET_DYN_CAP_EXT_LIST 0x1
> > + #define ADD_DYN_CAP_RSP 0x2
> > + #define RELEASE_DYN_CAP 0x3
> > + PHYSICAL_SWITCH = 0x51,
> > + #define IDENTIFY_SWITCH_DEVICE 0x0
> > + #define GET_PHYSICAL_PORT_STATE 0x1
> > + TUNNEL = 0x53,
> > + #define MANAGEMENT_COMMAND 0x0
> > + MHD = 0x55,
> > + #define GET_MHD_INFO 0x0
> > +};
> > --
> > 2.47.2
> >
>
> --
> Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-05-08 0:01 ` [PATCH v2 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add anisa.su887
2025-05-20 13:34 ` Jonathan Cameron
@ 2025-05-20 18:08 ` Fan Ni
1 sibling, 0 replies; 31+ messages in thread
From: Fan Ni @ 2025-05-20 18:08 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, linux-cxl,
Anisa Su
On Thu, May 08, 2025 at 12:01:05AM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
>
This patch needs to fix. See comments below.
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
> hw/cxl/cxl-mailbox-utils.c | 195 +++++++++++++++++++++++++++++++++++
> hw/mem/cxl_type3.c | 8 +-
> include/hw/cxl/cxl_device.h | 4 +
> include/hw/cxl/cxl_opcodes.h | 1 +
> 4 files changed, 204 insertions(+), 4 deletions(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index a897a34ef9..9b176dea08 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -3589,6 +3589,194 @@ static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +static CXLRetCode cxl_mbox_dc_prescriptive_sanity_check(CXLType3Dev *dcd,
> + uint16_t host_id,
> + uint32_t ext_count,
> + CXLDCExtentRaw extents[],
> + CXLDCEventType type)
> +{
> + CXLDCExtentRaw ext;
> + CXLDCRegion *reg = NULL;
> + int i, j;
> +
> + if (host_id != 0) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
> +
> + for (i = 0; i < ext_count; i++) {
> + ext = extents[i];
> +
> + if (ext.len == 0) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> +
> + reg = cxl_find_dc_region(dcd, ext.start_dpa, ext.len);
> + if (!reg) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> +
> + if (ext.len % reg->block_size || ext.start_dpa % reg->block_size) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> +
> + /* Check requested extents do not overlap with each other. */
> + for (j = i + 1; j < ext_count; j++) {
> + if (ranges_overlap(ext.start_dpa, ext.len, extents[j].start_dpa,
> + extents[j].len)) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + }
> +
> + if (type == DC_EVENT_ADD_CAPACITY) {
> + /* Check requested extents do not overlap with pending extents. */
> + if (cxl_extent_groups_overlaps_dpa_range(&dcd->dc.extents_pending,
> + ext.start_dpa, ext.len)) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + /* Check requested extents do not overlap with existing extents. */
> + if (cxl_extents_overlaps_dpa_range(&dcd->dc.extents,
> + ext.start_dpa, ext.len)) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + }
> + }
> +
> + return CXL_MBOX_SUCCESS;
> +}
Per the spec, we need to detect resource exhausted case.
"The command shall fail with Resources Exhausted if the Extent List would cause the
device to exceed its extent or tag tracking ability."
We need to make sure the total number of extents does not exceed the max
number of extents the device can maintain.
> +
> +static int cxl_mbox_get_pending_ext_count(CXLType3Dev *ct3d)
> +{
> + CXLDCExtentGroup *group;
> + CXLDCExtentList *list;
> + CXLDCExtent *ent;
> + int count = 0;
> +
> + QTAILQ_FOREACH(group, &ct3d->dc.extents_pending, node) {
> + list = &group->list;
> + QTAILQ_FOREACH(ent, list, node) {
> + count++;
> + }
> + }
> +
> + return count;
> +}
> +
> +static int cxl_mbox_get_accepted_ext_count(CXLType3Dev *ct3d)
> +{
> + CXLDCExtent *ent;
> + int count = 0;
> +
> + QTAILQ_FOREACH(ent, &ct3d->dc.extents, node) {
> + count++;
> + }
> +
> + return count;
> +}
ct3d->total_extent_count is used to record number of accepted
extents.
So in below, the code logic is not correct.
> +
> +static void cxl_mbox_dc_add_to_pending(CXLType3Dev *ct3d,
> + uint32_t ext_count,
> + CXLDCExtentRaw extents[])
> +{
> + CXLDCExtentGroup *group = NULL;
> + int i;
> +
> + for (i = 0; i < ext_count; i++) {
> + group = cxl_insert_extent_to_extent_group(group,
> + extents[i].start_dpa,
> + extents[i].len,
> + extents[i].tag,
> + extents[i].shared_seq);
> + }
> +
> + cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
> +}
> +
> +static void cxl_mbox_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
> + CXLDCEventType type,
> + CXLDCExtentRaw extents[],
> + uint32_t ext_count)
> +{
> + CXLEventDynamicCapacity event_rec = {};
> + int i;
> +
> + cxl_mbox_dc_event_create_record_hdr(ct3d, &event_rec.hdr);
> + event_rec.type = type;
> + event_rec.validity_flags = 1;
> + event_rec.host_id = 0;
> + event_rec.updated_region_id = 0;
> + event_rec.extents_avail = ct3d->dc.total_extent_count -
> + cxl_mbox_get_accepted_ext_count(ct3d) -
> + cxl_mbox_get_pending_ext_count(ct3d);
This is not right.
As I mentioned total_extent_count only accounts for accepted extents
today.
Also, max number of extents to track is hardcoded to
CXL_NUM_EXTENTS_SUPPORTED.
The value for the above shoud be consistent with what we return for
command 5601h or 4800h.
Based on the spec cxl r3.2 9.13.3.3 Extent list Tracking.
We should take pending extents into account when considering the
tracking ability. So after this series gets in, we need to fix
"num_extents_available" field for 4800h.
Or a easier way, take pending list counting into total_extent_count.
Fan
> +
> + for (i = 0; i < ext_count; i++) {
> + memcpy(&event_rec.dynamic_capacity_extent,
> + &extents[i],
> + sizeof(CXLDCExtentRaw));
> + event_rec.flags = 0;
> + if (i < ext_count - 1) {
> + /* Set "More" flag */
> + event_rec.flags |= BIT(0);
> + }
> +
> + if (cxl_event_insert(&ct3d->cxl_dstate,
> + CXL_EVENT_TYPE_DYNAMIC_CAP,
> + (CXLEventRecordRaw *)&event_rec)) {
> + cxl_event_irq_assert(ct3d);
> + }
> + }
> +}
> +
> +/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
> +static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t selection_policy;
> + uint8_t reg_num;
> + uint64_t length;
> + uint8_t tag[0x10];
> + uint32_t ext_count;
> + CXLDCExtentRaw extents[];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + int rc;
> +
> + switch (in->selection_policy) {
> + case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE:
> + /* Adding extents exceeds device's extent tracking ability. */
> + if (in->ext_count + ct3d->dc.total_extent_count >
> + CXL_NUM_EXTENTS_SUPPORTED) {
> + return CXL_MBOX_RESOURCES_EXHAUSTED;
> + }
> + rc = cxl_mbox_dc_prescriptive_sanity_check(ct3d,
> + in->host_id,
> + in->ext_count,
> + in->extents,
> + DC_EVENT_ADD_CAPACITY);
> + if (rc) {
> + return rc;
> + }
> + cxl_mbox_dc_add_to_pending(ct3d, in->ext_count, in->extents);
> + cxl_mbox_create_dc_event_records_for_extents(ct3d,
> + DC_EVENT_ADD_CAPACITY,
> + in->extents,
> + in->ext_count);
> +
> + return CXL_MBOX_SUCCESS;
> + default:
> + qemu_log_mask(LOG_UNIMP,
> + "CXL extent selection policy not supported.\n");
> + return CXL_MBOX_INVALID_INPUT;
> + }
> +
> + return CXL_MBOX_SUCCESS;
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3724,6 +3912,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
> cmd_fm_get_dc_region_extent_list, 12, 0 },
> + [FMAPI_DCD_MGMT][INITIATE_DC_ADD] = { "INIT_DC_ADD",
> + cmd_fm_initiate_dc_add, ~0,
> + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> };
>
> /*
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index edc29f1ccb..71fad3391c 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1991,8 +1991,8 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
> * the list.
> * Return value: return true if has overlaps; otherwise, return false
> */
> -static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> - uint64_t dpa, uint64_t len)
> +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> + uint64_t dpa, uint64_t len)
> {
> CXLDCExtent *ent;
> Range range1, range2;
> @@ -2037,8 +2037,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *list,
> return false;
> }
>
> -static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> - uint64_t dpa, uint64_t len)
> +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> + uint64_t dpa, uint64_t len)
> {
> CXLDCExtentGroup *group;
>
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index 22823e2054..93b6df0ccd 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -824,4 +824,8 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
> void cxl_assign_event_header(CXLEventRecordHdr *hdr,
> const QemuUUID *uuid, uint32_t flags,
> uint8_t length, uint64_t timestamp);
> +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> + uint64_t dpa, uint64_t len);
> +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> + uint64_t dpa, uint64_t len);
> #endif
> diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> index ad4e614daa..72ea0a7d44 100644
> --- a/include/hw/cxl/cxl_opcodes.h
> +++ b/include/hw/cxl/cxl_opcodes.h
> @@ -66,5 +66,6 @@ enum {
> #define GET_HOST_DC_REGION_CONFIG 0x1
> #define SET_DC_REGION_CONFIG 0x2
> #define GET_DC_REGION_EXTENT_LIST 0x3
> + #define INITIATE_DC_ADD 0x4
> GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
> };
> --
> 2.47.2
>
--
Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file
2025-05-20 17:33 ` Anisa Su
@ 2025-05-30 13:43 ` Jonathan Cameron
2025-05-30 19:57 ` Anisa Su
0 siblings, 1 reply; 31+ messages in thread
From: Jonathan Cameron @ 2025-05-30 13:43 UTC (permalink / raw)
To: Anisa Su; +Cc: Fan Ni, qemu-devel, dave, linux-cxl
On Tue, 20 May 2025 17:33:46 +0000
Anisa Su <anisa.su887@gmail.com> wrote:
> On Tue, May 20, 2025 at 08:37:35AM -0700, Fan Ni wrote:
> > On Thu, May 08, 2025 at 12:00:57AM +0000, anisa.su887@gmail.com wrote:
> > > From: Anisa Su <anisa.su@samsung.com>
> > >
> > > In preparation for the next patch, move opcodes enum to new cxl_opcodes.h file
> > > for visibility from mailbox-utils.c and i2c_mctp_cxl.c, which checks that
> > > certain command sets are bound with the correct MCTP binding.
> > >
> > > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > > ---
> > > hw/cxl/cxl-mailbox-utils.c | 68 ++----------------------------------
> > > include/hw/cxl/cxl_opcodes.h | 64 +++++++++++++++++++++++++++++++++
> >
> > Should we put the opcodes into include/hw/cxl/cxl_mailbox.h instead of
> > creating a new file. cxl_mailbox.h only has some macros.
> >
> > Fan
> >
> I had some discussion with Jonathan in the v1 thread about this. We
> agreed it is fine to use mailbox.h because it only has a few macros in it,
> but in case more things get added to it later, I made a separate file.
> Then no need to re-organize later.
> >
We can always move them in future if it turns out cxl_mailbox.h is
not a good home.
Also, note that the include file added in this patch has no descriptive
comments or ifndef magic which would have wanted to be there.
Jonathan
> >
> > > 2 files changed, 66 insertions(+), 66 deletions(-)
> > > create mode 100644 include/hw/cxl/cxl_opcodes.h
> > >
> > > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > > index a02d130926..ed3294530f 100644
> > > --- a/hw/cxl/cxl-mailbox-utils.c
> > > +++ b/hw/cxl/cxl-mailbox-utils.c
> > > @@ -23,6 +23,7 @@
> > > #include "qemu/uuid.h"
> > > #include "system/hostmem.h"
> > > #include "qemu/range.h"
> > > +#include "hw/cxl/cxl_opcodes.h"
> > >
> > > #define CXL_CAPACITY_MULTIPLIER (256 * MiB)
> > > #define CXL_DC_EVENT_LOG_SIZE 8
> > > @@ -36,7 +37,7 @@
> > >
> > > /*
> > > * How to add a new command, example. The command set FOO, with cmd BAR.
> > > - * 1. Add the command set and cmd to the enum.
> > > + * 1. Add the command set and cmd to the enum in cxl_opcodes.h.
> > > * FOO = 0x7f,
> > > * #define BAR 0
> > > * 2. Implement the handler
> > > @@ -59,71 +60,6 @@
> > > * a register interface that already deals with it.
> > > */
> > >
> > > -enum {
> > > - INFOSTAT = 0x00,
> > > - #define IS_IDENTIFY 0x1
> > > - #define BACKGROUND_OPERATION_STATUS 0x2
> > > - #define GET_RESPONSE_MSG_LIMIT 0x3
> > > - #define SET_RESPONSE_MSG_LIMIT 0x4
> > > - #define BACKGROUND_OPERATION_ABORT 0x5
> > > - EVENTS = 0x01,
> > > - #define GET_RECORDS 0x0
> > > - #define CLEAR_RECORDS 0x1
> > > - #define GET_INTERRUPT_POLICY 0x2
> > > - #define SET_INTERRUPT_POLICY 0x3
> > > - FIRMWARE_UPDATE = 0x02,
> > > - #define GET_INFO 0x0
> > > - #define TRANSFER 0x1
> > > - #define ACTIVATE 0x2
> > > - TIMESTAMP = 0x03,
> > > - #define GET 0x0
> > > - #define SET 0x1
> > > - LOGS = 0x04,
> > > - #define GET_SUPPORTED 0x0
> > > - #define GET_LOG 0x1
> > > - #define GET_LOG_CAPABILITIES 0x2
> > > - #define CLEAR_LOG 0x3
> > > - #define POPULATE_LOG 0x4
> > > - FEATURES = 0x05,
> > > - #define GET_SUPPORTED 0x0
> > > - #define GET_FEATURE 0x1
> > > - #define SET_FEATURE 0x2
> > > - IDENTIFY = 0x40,
> > > - #define MEMORY_DEVICE 0x0
> > > - CCLS = 0x41,
> > > - #define GET_PARTITION_INFO 0x0
> > > - #define GET_LSA 0x2
> > > - #define SET_LSA 0x3
> > > - HEALTH_INFO_ALERTS = 0x42,
> > > - #define GET_ALERT_CONFIG 0x1
> > > - #define SET_ALERT_CONFIG 0x2
> > > - SANITIZE = 0x44,
> > > - #define OVERWRITE 0x0
> > > - #define SECURE_ERASE 0x1
> > > - #define MEDIA_OPERATIONS 0x2
> > > - PERSISTENT_MEM = 0x45,
> > > - #define GET_SECURITY_STATE 0x0
> > > - MEDIA_AND_POISON = 0x43,
> > > - #define GET_POISON_LIST 0x0
> > > - #define INJECT_POISON 0x1
> > > - #define CLEAR_POISON 0x2
> > > - #define GET_SCAN_MEDIA_CAPABILITIES 0x3
> > > - #define SCAN_MEDIA 0x4
> > > - #define GET_SCAN_MEDIA_RESULTS 0x5
> > > - DCD_CONFIG = 0x48,
> > > - #define GET_DC_CONFIG 0x0
> > > - #define GET_DYN_CAP_EXT_LIST 0x1
> > > - #define ADD_DYN_CAP_RSP 0x2
> > > - #define RELEASE_DYN_CAP 0x3
> > > - PHYSICAL_SWITCH = 0x51,
> > > - #define IDENTIFY_SWITCH_DEVICE 0x0
> > > - #define GET_PHYSICAL_PORT_STATE 0x1
> > > - TUNNEL = 0x53,
> > > - #define MANAGEMENT_COMMAND 0x0
> > > - MHD = 0x55,
> > > - #define GET_MHD_INFO 0x0
> > > -};
> > > -
> > > /* CCI Message Format CXL r3.1 Figure 7-19 */
> > > typedef struct CXLCCIMessage {
> > > uint8_t category;
> > > diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> > > new file mode 100644
> > > index 0000000000..26d3a99e8a
> > > --- /dev/null
> > > +++ b/include/hw/cxl/cxl_opcodes.h
> > > @@ -0,0 +1,64 @@
> > > +enum {
> > > + INFOSTAT = 0x00,
> > > + #define IS_IDENTIFY 0x1
> > > + #define BACKGROUND_OPERATION_STATUS 0x2
> > > + #define GET_RESPONSE_MSG_LIMIT 0x3
> > > + #define SET_RESPONSE_MSG_LIMIT 0x4
> > > + #define BACKGROUND_OPERATION_ABORT 0x5
> > > + EVENTS = 0x01,
> > > + #define GET_RECORDS 0x0
> > > + #define CLEAR_RECORDS 0x1
> > > + #define GET_INTERRUPT_POLICY 0x2
> > > + #define SET_INTERRUPT_POLICY 0x3
> > > + FIRMWARE_UPDATE = 0x02,
> > > + #define GET_INFO 0x0
> > > + #define TRANSFER 0x1
> > > + #define ACTIVATE 0x2
> > > + TIMESTAMP = 0x03,
> > > + #define GET 0x0
> > > + #define SET 0x1
> > > + LOGS = 0x04,
> > > + #define GET_SUPPORTED 0x0
> > > + #define GET_LOG 0x1
> > > + #define GET_LOG_CAPABILITIES 0x2
> > > + #define CLEAR_LOG 0x3
> > > + #define POPULATE_LOG 0x4
> > > + FEATURES = 0x05,
> > > + #define GET_SUPPORTED 0x0
> > > + #define GET_FEATURE 0x1
> > > + #define SET_FEATURE 0x2
> > > + IDENTIFY = 0x40,
> > > + #define MEMORY_DEVICE 0x0
> > > + CCLS = 0x41,
> > > + #define GET_PARTITION_INFO 0x0
> > > + #define GET_LSA 0x2
> > > + #define SET_LSA 0x3
> > > + HEALTH_INFO_ALERTS = 0x42,
> > > + #define GET_ALERT_CONFIG 0x1
> > > + #define SET_ALERT_CONFIG 0x2
> > > + SANITIZE = 0x44,
> > > + #define OVERWRITE 0x0
> > > + #define SECURE_ERASE 0x1
> > > + #define MEDIA_OPERATIONS 0x2
> > > + PERSISTENT_MEM = 0x45,
> > > + #define GET_SECURITY_STATE 0x0
> > > + MEDIA_AND_POISON = 0x43,
> > > + #define GET_POISON_LIST 0x0
> > > + #define INJECT_POISON 0x1
> > > + #define CLEAR_POISON 0x2
> > > + #define GET_SCAN_MEDIA_CAPABILITIES 0x3
> > > + #define SCAN_MEDIA 0x4
> > > + #define GET_SCAN_MEDIA_RESULTS 0x5
> > > + DCD_CONFIG = 0x48,
> > > + #define GET_DC_CONFIG 0x0
> > > + #define GET_DYN_CAP_EXT_LIST 0x1
> > > + #define ADD_DYN_CAP_RSP 0x2
> > > + #define RELEASE_DYN_CAP 0x3
> > > + PHYSICAL_SWITCH = 0x51,
> > > + #define IDENTIFY_SWITCH_DEVICE 0x0
> > > + #define GET_PHYSICAL_PORT_STATE 0x1
> > > + TUNNEL = 0x53,
> > > + #define MANAGEMENT_COMMAND 0x0
> > > + MHD = 0x55,
> > > + #define GET_MHD_INFO 0x0
> > > +};
> > > --
> > > 2.47.2
> > >
> >
> > --
> > Fan Ni
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 02/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
2025-05-08 0:00 ` [PATCH v2 02/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info anisa.su887
2025-05-20 15:59 ` Fan Ni
@ 2025-05-30 14:07 ` Jonathan Cameron
1 sibling, 0 replies; 31+ messages in thread
From: Jonathan Cameron @ 2025-05-30 14:07 UTC (permalink / raw)
To: anisa.su887; +Cc: qemu-devel, nifan.cxl, dave, linux-cxl, Anisa Su
On Thu, 8 May 2025 00:00:58 +0000
anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1.
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
Looks like a missing include - though probably due to some indirect include
going away.
> ---
> hw/cxl/cxl-mailbox-utils.c | 56 ++++++++++++++++++++++++++++++++++++
> hw/cxl/i2c_mctp_cxl.c | 6 ++--
> hw/mem/cxl_type3.c | 4 +++
> include/hw/cxl/cxl_device.h | 1 +
> include/hw/cxl/cxl_opcodes.h | 3 ++
> 5 files changed, 68 insertions(+), 2 deletions(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index ed3294530f..d3c69233b8 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -3280,6 +3280,52 @@ static CXLRetCode cmd_dcd_release_dyn_cap(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +/* CXL r3.2 section 7.6.7.6.1: Get DCD Info (Opcode 5600h) */
> +static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint8_t num_hosts;
> + uint8_t num_regions_supported;
> + uint8_t rsvd1[2];
> + uint16_t add_select_policy_bitmask;
> + uint8_t rsvd2[2];
> + uint16_t release_select_policy_bitmask;
> + uint8_t sanitize_on_release_bitmask;
> + uint8_t rsvd3;
> + uint64_t total_dynamic_capacity;
> + uint64_t region_blk_size_bitmasks[8];
> + } QEMU_PACKED *out = (void *)payload_out;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + CXLDCRegion *region;
> + int i;
> +
> + out->num_hosts = 1;
> + out->num_regions_supported = ct3d->dc.num_regions;
> + stw_le_p(&out->add_select_policy_bitmask,
> + BIT(CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE));
Something seems to have changed upstream so this now needs
#include <qapi/qapi-types-cxl.h> to get these enum values.
> + stw_le_p(&out->release_select_policy_bitmask,
> + BIT(CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE));
> + out->sanitize_on_release_bitmask = 0;
> +
> + stq_le_p(&out->total_dynamic_capacity,
> + ct3d->dc.total_capacity / CXL_CAPACITY_MULTIPLIER);
> +
> + for (i = 0; i < ct3d->dc.num_regions; i++) {
> + region = &ct3d->dc.regions[i];
> + memcpy(&out->region_blk_size_bitmasks[i],
> + ®ion->supported_blk_size_bitmask,
> + sizeof(out->region_blk_size_bitmasks[i]));
> + }
> +
> + *len_out = sizeof(*out);
> + return CXL_MBOX_SUCCESS;
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3401,6 +3447,11 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
> cmd_tunnel_management_cmd, ~0, 0 },
> };
>
> +static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> + [FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
> + cmd_fm_get_dcd_info, 0, 0 },
> +};
> +
> /*
> * While the command is executing in the background, the device should
> * update the percentage complete in the Background Command Status Register
> @@ -3703,7 +3754,12 @@ void cxl_initialize_t3_fm_owned_ld_mctpcci(CXLCCI *cci, DeviceState *d,
> DeviceState *intf,
> size_t payload_max)
> {
> + CXLType3Dev *ct3d = CXL_TYPE3(d);
> +
> cxl_copy_cci_commands(cci, cxl_cmd_set_t3_fm_owned_ld_mctp);
> + if (ct3d->dc.num_regions) {
> + cxl_copy_cci_commands(cci, cxl_cmd_set_fm_dcd);
> + }
> cci->d = d;
> cci->intf = intf;
> cxl_init_cci(cci, payload_max);
> diff --git a/hw/cxl/i2c_mctp_cxl.c b/hw/cxl/i2c_mctp_cxl.c
> index 7d2cbc3b75..dd5fc4f393 100644
> --- a/hw/cxl/i2c_mctp_cxl.c
> +++ b/hw/cxl/i2c_mctp_cxl.c
> @@ -29,6 +29,7 @@
> #include "hw/pci/pcie_port.h"
> #include "hw/qdev-properties.h"
> #include "hw/registerfields.h"
> +#include "hw/cxl/cxl_opcodes.h"
>
> #define TYPE_I2C_MCTP_CXL "i2c_mctp_cxl"
>
> @@ -198,9 +199,10 @@ static void i2c_mctp_cxl_handle_message(MCTPI2CEndpoint *mctp)
> */
>
> if (!(msg->message_type == MCTP_MT_CXL_TYPE3 &&
> - msg->command_set < 0x51) &&
> + msg->command_set < PHYSICAL_SWITCH) &&
> !(msg->message_type == MCTP_MT_CXL_FMAPI &&
> - msg->command_set >= 0x51 && msg->command_set < 0x56)) {
> + msg->command_set >= PHYSICAL_SWITCH &&
> + msg->command_set < GLOBAL_MEMORY_ACCESS_EP_MGMT)) {
> buf->rc = CXL_MBOX_UNSUPPORTED;
> st24_le_p(buf->pl_length, len_out);
> s->len = s->pos;
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 11c38a9292..7129da0940 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -8,6 +8,7 @@
> *
> * SPDX-License-Identifier: GPL-v2-only
> */
> +#include <math.h>
>
> #include "qemu/osdep.h"
> #include "qemu/units.h"
> @@ -766,6 +767,8 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
> uint64_t region_len;
> uint64_t decode_len;
> uint64_t blk_size = 2 * MiB;
> + /* Only 1 block size is supported for now. */
> + uint64_t supported_blk_size_bitmask = BIT((int) log2(blk_size));
> CXLDCRegion *region;
> MemoryRegion *mr;
> uint64_t dc_size;
> @@ -811,6 +814,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
> .block_size = blk_size,
> /* dsmad_handle set when creating CDAT table entries */
> .flags = 0,
> + .supported_blk_size_bitmask = supported_blk_size_bitmask,
> };
> ct3d->dc.total_capacity += region->len;
> region->blk_bitmap = bitmap_new(region->len / region->block_size);
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index ca515cab13..bebed04085 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -608,6 +608,7 @@ typedef struct CXLDCRegion {
> uint32_t dsmadhandle;
> uint8_t flags;
> unsigned long *blk_bitmap;
> + uint64_t supported_blk_size_bitmask;
> } CXLDCRegion;
>
> typedef struct CXLSetFeatureInfo {
> diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> index 26d3a99e8a..c4c233665e 100644
> --- a/include/hw/cxl/cxl_opcodes.h
> +++ b/include/hw/cxl/cxl_opcodes.h
> @@ -61,4 +61,7 @@ enum {
> #define MANAGEMENT_COMMAND 0x0
> MHD = 0x55,
> #define GET_MHD_INFO 0x0
> + FMAPI_DCD_MGMT = 0x56,
> + #define GET_DCD_INFO 0x0
> + GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
> };
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605
2025-05-20 13:39 ` [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 Jonathan Cameron
@ 2025-05-30 14:26 ` Jonathan Cameron
2025-06-02 17:46 ` Anisa Su
0 siblings, 1 reply; 31+ messages in thread
From: Jonathan Cameron @ 2025-05-30 14:26 UTC (permalink / raw)
To: Jonathan Cameron via
Cc: Jonathan Cameron, anisa.su887, nifan.cxl, dave, linux-cxl,
Anisa Su
On Tue, 20 May 2025 14:39:47 +0100
Jonathan Cameron via <qemu-devel@nongnu.org> wrote:
> On Thu, 8 May 2025 00:00:56 +0000
> anisa.su887@gmail.com wrote:
>
> > From: Anisa Su <anisa.su@samsung.com>
> >
> > This patchset adds support for 6 FM API DCD Management commands (0x5600-0x5605)
> > according to the CXL r3.2 Spec. It is based on the following branch:
> > https://gitlab.com/jic23/qemu/-/tree/cxl-2025-02-20.
>
> Nice work - this is very clean and well presented.
>
> I would like Fan to take a look an provide some tags as DCD modeling in
> QEMU is more in his area of expertise than mine!
>
> I think this series is much more ready for upstream than much of
> my staging cxl tree so I'll rebase it to go near the front.
>
> Today I'm focused on getting test cases to Richard for the TCG issues but
> after that I'll spin a new tree (probably pushed out under a name
> that makes it clear there is a known nasty problem though!)
Anisa,
Ideally I'd like to get the majority of this upstream once you post
a v3. To do that I'd like to break the dependence on mctp_i2c in patch 2.
These commands are equally valid via a switch-cci (and that path to the
fm owned ld_mctpcci is already upstream).
If you could send it as two series. One of which sits on upstream and
doesn't include the i2c_mctp part and the other of which is applied once
that support is available in my tree that would be great. I'll squash
the i2c_mctp part into the patch that adds support for that in the
first place.
I'll deal with rebasing needed for other command introductions etc.
There are just enough open questions in this series that I haven't done
this rework directly (though I did start doing it - hence the missing
include note in one of the patches).
Thanks,
Jonathan
>
> Jonathan
>
>
> >
> > The code was tested with libcxlmi, which runs in the QEMU VM and sends 56xxh
> > commands to the device (QEMU emulated) through MCTP messages over I2C
> > bus. To perform end-to-end tests, both MCTP and DCD support are needed
> > for the kernel, so the needed MCTP patches are applied on top of Ira's DCD
> > branch https://github.com/weiny2/linux-kernel/tree/dcd-v4-2024-12-11.
> >
> > For the tests of commands 0x5600 (Get DCD Info), 0x5601 (Get Host DC Region
> > Config), and 0x5603 (Get DC Region Extent Lists), DCD kernel code is not involved.
> > The libcxlmi test program is used to send the command to the device and results
> > are collected and verified.
> >
> > For command 0x5602 (Set DC Region Config): device creates an event record with type
> > DC_EVENT_REGION_CONFIG_UPDATED and triggers an interrupt to the host
> > if the configuration changes as a result of the command. Currently, the kernel
> > version used to test this only supports Add/Release type events. Thus, this
> > request essentially gets ignored but did not cause problems besides the host
> > not knowing about the configuration change when tested.
> >
> > For the command 0x5604 (Initiate DC Add) and 0x5605 (Initiate DC Release), the
> > tests involve libcxlmi test program (acting as the FM), kernel DCD
> > code (host) and QEMU device. The test workflow follows that in cxl r3.2 section
> > 7.6.7.6.5 and 7.6.7.6.6. More specifically, the tests involve following
> > steps,
> > 1. Start a VM with CXL topology: https://github.com/moking/cxl-test-tool/blob/main/utils/cxl.py#L54.
> > 2. Load the CXL related drivers in the VM;
> > 3. Create a DC region for the DCD device attached.
> > 4. add/release DC extents by sending 0x5604 and 0x5605 respectively through
> > the out-of-tree libcxlmi test program
> > (https://github.com/anisa-su993/libcxlmi/blob/dcd_management_cmds/tests/test-fmapi.c).
> > 5. Check and verify the extents by retrieving the extents list through
> > command 0x5603 in the test program.
> >
> > The remaining 3 commands in this series (0x5606-0x5608) are related to tags
> > and sharing, thus have not been implemented.
> >
> > Changes
> > ================================================================================
> > v1 -> v2:
> > 1. Feedback from Jonathan Cameron on v1
> > Addressed general style concerns (newlines/spacing, minor refactoring, etc.)
> > 1.1. Changes Related to 0x5600 - FMAPI Get DCD Info
> > - Squashed prepatory patch adding supported_blk_sizes_bitmask
> > - Added new prepatory patch moving opcodes enum from cxl-mailbox-utils.c to
> > new header file opcodes.h
> > Needed for the check in i2c_mctp_cxl.c to ensure the FMAPI Commands
> > (0x51 - 0x59) are bound with MCTP_MT_CXL_FMAPI. By moving the enum,
> > the hardcoded values (0x51, 0x59) can be replaced with their
> > enumerators.
> > - Bug fix to return Add/Release Extent Selection Policy bitmasks
> > correctly
> > 1.2. Changes Related to 0x5601 - FMAPI Get Host Region Config
> > - Prepatory patch to add dsmas_flags to CXLDCRegion struct was modified to
> > store the booleans dsmas_flags is made up of instead of copying it from the
> > CDAT for that region. Values hardcoded for unsupported flags.
> > - Build the returned dsmas_flags from the new booleans.
> > 1.3. Changes Related to 0x5602 - FMAPI Set DC Region Config
> > - Added locking for CXLDCRegion bitmap for the case that extents are being
> > added/released via a different CCI than that of the FM-enabled CCI.
> > - Prepatory patch created for the above (quite short, can be squashed if
> > preferred)
> > - Added a check to verify that the requested block_size is supported by the
> > region by looking at region->supported_blk_sizes_bitmask
> > - Instead of event_record validity flag being cleared, set to 1
> > - Fixed bug of forgetting to update region->block_size
> > 1.4. Changes Related to 0x5603 - FMAPI Get DC Region Extents
> > - Minor refactoring of loop filling in response payload extents
> >
> > 2. Feedback from Fan Ni and Jonathan Cameron on v1
> > 2.1. Changes Related to 0x5604 - FMAPI Initiate DC Add
> > - Remove redundant storage of extents in event_rec_exts
> > - Refactor event record creation into helper function for re-use by release
> > - Return event_record.available_extents
> > (total_extents_available - num_pending - num_accepted) instead of
> > leaving it blank
> > 2.2. Changes Related to 0x5605 - FMAPI Initiate DC Release
> > - Remove redundant storage of extents in event_rec_exts/redundant 2nd loop
> > - Add #define for removal_policy_bitmask instead of hardcoding 0x7
> >
> > Anisa Su (10):
> > cxl-mailbox-utils: Move opcodes enum to new header file
> > cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
> > cxl/type3: Add dsmas_flags to CXLDCRegion struct
> > cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
> > cxl_events.h: Move definition for dynamic_capacity_uuid and enum for
> > DC event types
> > hw/cxl_type3: Add DC Region bitmap lock
> > cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
> > cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
> > cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
> > cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
> >
> > hw/cxl/cxl-mailbox-utils.c | 649 +++++++++++++++++++++++++++++++----
> > hw/cxl/i2c_mctp_cxl.c | 6 +-
> > hw/mem/cxl_type3.c | 41 ++-
> > include/hw/cxl/cxl_device.h | 24 ++
> > include/hw/cxl/cxl_events.h | 15 +
> > include/hw/cxl/cxl_mailbox.h | 6 +
> > include/hw/cxl/cxl_opcodes.h | 72 ++++
> > 7 files changed, 724 insertions(+), 89 deletions(-)
> > create mode 100644 include/hw/cxl/cxl_opcodes.h
> >
>
>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file
2025-05-30 13:43 ` Jonathan Cameron
@ 2025-05-30 19:57 ` Anisa Su
0 siblings, 0 replies; 31+ messages in thread
From: Anisa Su @ 2025-05-30 19:57 UTC (permalink / raw)
To: Jonathan Cameron; +Cc: Anisa Su, Fan Ni, qemu-devel, dave, linux-cxl
On Fri, May 30, 2025 at 02:43:35PM +0100, Jonathan Cameron wrote:
> On Tue, 20 May 2025 17:33:46 +0000
> Anisa Su <anisa.su887@gmail.com> wrote:
>
> > On Tue, May 20, 2025 at 08:37:35AM -0700, Fan Ni wrote:
> > > On Thu, May 08, 2025 at 12:00:57AM +0000, anisa.su887@gmail.com wrote:
> > > > From: Anisa Su <anisa.su@samsung.com>
> > > >
> > > > In preparation for the next patch, move opcodes enum to new cxl_opcodes.h file
> > > > for visibility from mailbox-utils.c and i2c_mctp_cxl.c, which checks that
> > > > certain command sets are bound with the correct MCTP binding.
> > > >
> > > > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > > > ---
> > > > hw/cxl/cxl-mailbox-utils.c | 68 ++----------------------------------
> > > > include/hw/cxl/cxl_opcodes.h | 64 +++++++++++++++++++++++++++++++++
> > >
> > > Should we put the opcodes into include/hw/cxl/cxl_mailbox.h instead of
> > > creating a new file. cxl_mailbox.h only has some macros.
> > >
> > > Fan
> > >
> > I had some discussion with Jonathan in the v1 thread about this. We
> > agreed it is fine to use mailbox.h because it only has a few macros in it,
> > but in case more things get added to it later, I made a separate file.
> > Then no need to re-organize later.
> > >
>
> We can always move them in future if it turns out cxl_mailbox.h is
> not a good home.
>
> Also, note that the include file added in this patch has no descriptive
> comments or ifndef magic which would have wanted to be there.
>
> Jonathan
>
Ah ok~ I'll have it in cxl_mailbox.h for v3 then.
Thanks,
Anisa
> > >
> > > > 2 files changed, 66 insertions(+), 66 deletions(-)
> > > > create mode 100644 include/hw/cxl/cxl_opcodes.h
> > > >
> > > > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > > > index a02d130926..ed3294530f 100644
> > > > --- a/hw/cxl/cxl-mailbox-utils.c
> > > > +++ b/hw/cxl/cxl-mailbox-utils.c
> > > > @@ -23,6 +23,7 @@
> > > > #include "qemu/uuid.h"
> > > > #include "system/hostmem.h"
> > > > #include "qemu/range.h"
> > > > +#include "hw/cxl/cxl_opcodes.h"
> > > >
> > > > #define CXL_CAPACITY_MULTIPLIER (256 * MiB)
> > > > #define CXL_DC_EVENT_LOG_SIZE 8
> > > > @@ -36,7 +37,7 @@
> > > >
> > > > /*
> > > > * How to add a new command, example. The command set FOO, with cmd BAR.
> > > > - * 1. Add the command set and cmd to the enum.
> > > > + * 1. Add the command set and cmd to the enum in cxl_opcodes.h.
> > > > * FOO = 0x7f,
> > > > * #define BAR 0
> > > > * 2. Implement the handler
> > > > @@ -59,71 +60,6 @@
> > > > * a register interface that already deals with it.
> > > > */
> > > >
> > > > -enum {
> > > > - INFOSTAT = 0x00,
> > > > - #define IS_IDENTIFY 0x1
> > > > - #define BACKGROUND_OPERATION_STATUS 0x2
> > > > - #define GET_RESPONSE_MSG_LIMIT 0x3
> > > > - #define SET_RESPONSE_MSG_LIMIT 0x4
> > > > - #define BACKGROUND_OPERATION_ABORT 0x5
> > > > - EVENTS = 0x01,
> > > > - #define GET_RECORDS 0x0
> > > > - #define CLEAR_RECORDS 0x1
> > > > - #define GET_INTERRUPT_POLICY 0x2
> > > > - #define SET_INTERRUPT_POLICY 0x3
> > > > - FIRMWARE_UPDATE = 0x02,
> > > > - #define GET_INFO 0x0
> > > > - #define TRANSFER 0x1
> > > > - #define ACTIVATE 0x2
> > > > - TIMESTAMP = 0x03,
> > > > - #define GET 0x0
> > > > - #define SET 0x1
> > > > - LOGS = 0x04,
> > > > - #define GET_SUPPORTED 0x0
> > > > - #define GET_LOG 0x1
> > > > - #define GET_LOG_CAPABILITIES 0x2
> > > > - #define CLEAR_LOG 0x3
> > > > - #define POPULATE_LOG 0x4
> > > > - FEATURES = 0x05,
> > > > - #define GET_SUPPORTED 0x0
> > > > - #define GET_FEATURE 0x1
> > > > - #define SET_FEATURE 0x2
> > > > - IDENTIFY = 0x40,
> > > > - #define MEMORY_DEVICE 0x0
> > > > - CCLS = 0x41,
> > > > - #define GET_PARTITION_INFO 0x0
> > > > - #define GET_LSA 0x2
> > > > - #define SET_LSA 0x3
> > > > - HEALTH_INFO_ALERTS = 0x42,
> > > > - #define GET_ALERT_CONFIG 0x1
> > > > - #define SET_ALERT_CONFIG 0x2
> > > > - SANITIZE = 0x44,
> > > > - #define OVERWRITE 0x0
> > > > - #define SECURE_ERASE 0x1
> > > > - #define MEDIA_OPERATIONS 0x2
> > > > - PERSISTENT_MEM = 0x45,
> > > > - #define GET_SECURITY_STATE 0x0
> > > > - MEDIA_AND_POISON = 0x43,
> > > > - #define GET_POISON_LIST 0x0
> > > > - #define INJECT_POISON 0x1
> > > > - #define CLEAR_POISON 0x2
> > > > - #define GET_SCAN_MEDIA_CAPABILITIES 0x3
> > > > - #define SCAN_MEDIA 0x4
> > > > - #define GET_SCAN_MEDIA_RESULTS 0x5
> > > > - DCD_CONFIG = 0x48,
> > > > - #define GET_DC_CONFIG 0x0
> > > > - #define GET_DYN_CAP_EXT_LIST 0x1
> > > > - #define ADD_DYN_CAP_RSP 0x2
> > > > - #define RELEASE_DYN_CAP 0x3
> > > > - PHYSICAL_SWITCH = 0x51,
> > > > - #define IDENTIFY_SWITCH_DEVICE 0x0
> > > > - #define GET_PHYSICAL_PORT_STATE 0x1
> > > > - TUNNEL = 0x53,
> > > > - #define MANAGEMENT_COMMAND 0x0
> > > > - MHD = 0x55,
> > > > - #define GET_MHD_INFO 0x0
> > > > -};
> > > > -
> > > > /* CCI Message Format CXL r3.1 Figure 7-19 */
> > > > typedef struct CXLCCIMessage {
> > > > uint8_t category;
> > > > diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
> > > > new file mode 100644
> > > > index 0000000000..26d3a99e8a
> > > > --- /dev/null
> > > > +++ b/include/hw/cxl/cxl_opcodes.h
> > > > @@ -0,0 +1,64 @@
> > > > +enum {
> > > > + INFOSTAT = 0x00,
> > > > + #define IS_IDENTIFY 0x1
> > > > + #define BACKGROUND_OPERATION_STATUS 0x2
> > > > + #define GET_RESPONSE_MSG_LIMIT 0x3
> > > > + #define SET_RESPONSE_MSG_LIMIT 0x4
> > > > + #define BACKGROUND_OPERATION_ABORT 0x5
> > > > + EVENTS = 0x01,
> > > > + #define GET_RECORDS 0x0
> > > > + #define CLEAR_RECORDS 0x1
> > > > + #define GET_INTERRUPT_POLICY 0x2
> > > > + #define SET_INTERRUPT_POLICY 0x3
> > > > + FIRMWARE_UPDATE = 0x02,
> > > > + #define GET_INFO 0x0
> > > > + #define TRANSFER 0x1
> > > > + #define ACTIVATE 0x2
> > > > + TIMESTAMP = 0x03,
> > > > + #define GET 0x0
> > > > + #define SET 0x1
> > > > + LOGS = 0x04,
> > > > + #define GET_SUPPORTED 0x0
> > > > + #define GET_LOG 0x1
> > > > + #define GET_LOG_CAPABILITIES 0x2
> > > > + #define CLEAR_LOG 0x3
> > > > + #define POPULATE_LOG 0x4
> > > > + FEATURES = 0x05,
> > > > + #define GET_SUPPORTED 0x0
> > > > + #define GET_FEATURE 0x1
> > > > + #define SET_FEATURE 0x2
> > > > + IDENTIFY = 0x40,
> > > > + #define MEMORY_DEVICE 0x0
> > > > + CCLS = 0x41,
> > > > + #define GET_PARTITION_INFO 0x0
> > > > + #define GET_LSA 0x2
> > > > + #define SET_LSA 0x3
> > > > + HEALTH_INFO_ALERTS = 0x42,
> > > > + #define GET_ALERT_CONFIG 0x1
> > > > + #define SET_ALERT_CONFIG 0x2
> > > > + SANITIZE = 0x44,
> > > > + #define OVERWRITE 0x0
> > > > + #define SECURE_ERASE 0x1
> > > > + #define MEDIA_OPERATIONS 0x2
> > > > + PERSISTENT_MEM = 0x45,
> > > > + #define GET_SECURITY_STATE 0x0
> > > > + MEDIA_AND_POISON = 0x43,
> > > > + #define GET_POISON_LIST 0x0
> > > > + #define INJECT_POISON 0x1
> > > > + #define CLEAR_POISON 0x2
> > > > + #define GET_SCAN_MEDIA_CAPABILITIES 0x3
> > > > + #define SCAN_MEDIA 0x4
> > > > + #define GET_SCAN_MEDIA_RESULTS 0x5
> > > > + DCD_CONFIG = 0x48,
> > > > + #define GET_DC_CONFIG 0x0
> > > > + #define GET_DYN_CAP_EXT_LIST 0x1
> > > > + #define ADD_DYN_CAP_RSP 0x2
> > > > + #define RELEASE_DYN_CAP 0x3
> > > > + PHYSICAL_SWITCH = 0x51,
> > > > + #define IDENTIFY_SWITCH_DEVICE 0x0
> > > > + #define GET_PHYSICAL_PORT_STATE 0x1
> > > > + TUNNEL = 0x53,
> > > > + #define MANAGEMENT_COMMAND 0x0
> > > > + MHD = 0x55,
> > > > + #define GET_MHD_INFO 0x0
> > > > +};
> > > > --
> > > > 2.47.2
> > > >
> > >
> > > --
> > > Fan Ni
>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605
2025-05-30 14:26 ` Jonathan Cameron
@ 2025-06-02 17:46 ` Anisa Su
2025-06-06 0:28 ` Anisa Su
0 siblings, 1 reply; 31+ messages in thread
From: Anisa Su @ 2025-06-02 17:46 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Jonathan Cameron via, anisa.su887, nifan.cxl, dave, linux-cxl
On Fri, May 30, 2025 at 03:26:55PM +0100, Jonathan Cameron wrote:
> On Tue, 20 May 2025 14:39:47 +0100
> Jonathan Cameron via <qemu-devel@nongnu.org> wrote:
>
> > On Thu, 8 May 2025 00:00:56 +0000
> > anisa.su887@gmail.com wrote:
> >
> > > From: Anisa Su <anisa.su@samsung.com>
> > >
> > > This patchset adds support for 6 FM API DCD Management commands (0x5600-0x5605)
> > > according to the CXL r3.2 Spec. It is based on the following branch:
> > > https://gitlab.com/jic23/qemu/-/tree/cxl-2025-02-20.
> >
> > Nice work - this is very clean and well presented.
> >
> > I would like Fan to take a look an provide some tags as DCD modeling in
> > QEMU is more in his area of expertise than mine!
> >
> > I think this series is much more ready for upstream than much of
> > my staging cxl tree so I'll rebase it to go near the front.
> >
> > Today I'm focused on getting test cases to Richard for the TCG issues but
> > after that I'll spin a new tree (probably pushed out under a name
> > that makes it clear there is a known nasty problem though!)
>
> Anisa,
>
> Ideally I'd like to get the majority of this upstream once you post
> a v3. To do that I'd like to break the dependence on mctp_i2c in patch 2.
> These commands are equally valid via a switch-cci (and that path to the
> fm owned ld_mctpcci is already upstream).
>
> If you could send it as two series. One of which sits on upstream and
> doesn't include the i2c_mctp part and the other of which is applied once
> that support is available in my tree that would be great. I'll squash
> the i2c_mctp part into the patch that adds support for that in the
> first place.
>
> I'll deal with rebasing needed for other command introductions etc.
>
> There are just enough open questions in this series that I haven't done
> this rework directly (though I did start doing it - hence the missing
> include note in one of the patches).
>
> Thanks,
>
Sounds good, will do :)
Thanks,
Anisa
> Jonathan
> >
> > Jonathan
> >
> >
> > >
> > > The code was tested with libcxlmi, which runs in the QEMU VM and sends 56xxh
> > > commands to the device (QEMU emulated) through MCTP messages over I2C
> > > bus. To perform end-to-end tests, both MCTP and DCD support are needed
> > > for the kernel, so the needed MCTP patches are applied on top of Ira's DCD
> > > branch https://github.com/weiny2/linux-kernel/tree/dcd-v4-2024-12-11.
> > >
> > > For the tests of commands 0x5600 (Get DCD Info), 0x5601 (Get Host DC Region
> > > Config), and 0x5603 (Get DC Region Extent Lists), DCD kernel code is not involved.
> > > The libcxlmi test program is used to send the command to the device and results
> > > are collected and verified.
> > >
> > > For command 0x5602 (Set DC Region Config): device creates an event record with type
> > > DC_EVENT_REGION_CONFIG_UPDATED and triggers an interrupt to the host
> > > if the configuration changes as a result of the command. Currently, the kernel
> > > version used to test this only supports Add/Release type events. Thus, this
> > > request essentially gets ignored but did not cause problems besides the host
> > > not knowing about the configuration change when tested.
> > >
> > > For the command 0x5604 (Initiate DC Add) and 0x5605 (Initiate DC Release), the
> > > tests involve libcxlmi test program (acting as the FM), kernel DCD
> > > code (host) and QEMU device. The test workflow follows that in cxl r3.2 section
> > > 7.6.7.6.5 and 7.6.7.6.6. More specifically, the tests involve following
> > > steps,
> > > 1. Start a VM with CXL topology: https://github.com/moking/cxl-test-tool/blob/main/utils/cxl.py#L54.
> > > 2. Load the CXL related drivers in the VM;
> > > 3. Create a DC region for the DCD device attached.
> > > 4. add/release DC extents by sending 0x5604 and 0x5605 respectively through
> > > the out-of-tree libcxlmi test program
> > > (https://github.com/anisa-su993/libcxlmi/blob/dcd_management_cmds/tests/test-fmapi.c).
> > > 5. Check and verify the extents by retrieving the extents list through
> > > command 0x5603 in the test program.
> > >
> > > The remaining 3 commands in this series (0x5606-0x5608) are related to tags
> > > and sharing, thus have not been implemented.
> > >
> > > Changes
> > > ================================================================================
> > > v1 -> v2:
> > > 1. Feedback from Jonathan Cameron on v1
> > > Addressed general style concerns (newlines/spacing, minor refactoring, etc.)
> > > 1.1. Changes Related to 0x5600 - FMAPI Get DCD Info
> > > - Squashed prepatory patch adding supported_blk_sizes_bitmask
> > > - Added new prepatory patch moving opcodes enum from cxl-mailbox-utils.c to
> > > new header file opcodes.h
> > > Needed for the check in i2c_mctp_cxl.c to ensure the FMAPI Commands
> > > (0x51 - 0x59) are bound with MCTP_MT_CXL_FMAPI. By moving the enum,
> > > the hardcoded values (0x51, 0x59) can be replaced with their
> > > enumerators.
> > > - Bug fix to return Add/Release Extent Selection Policy bitmasks
> > > correctly
> > > 1.2. Changes Related to 0x5601 - FMAPI Get Host Region Config
> > > - Prepatory patch to add dsmas_flags to CXLDCRegion struct was modified to
> > > store the booleans dsmas_flags is made up of instead of copying it from the
> > > CDAT for that region. Values hardcoded for unsupported flags.
> > > - Build the returned dsmas_flags from the new booleans.
> > > 1.3. Changes Related to 0x5602 - FMAPI Set DC Region Config
> > > - Added locking for CXLDCRegion bitmap for the case that extents are being
> > > added/released via a different CCI than that of the FM-enabled CCI.
> > > - Prepatory patch created for the above (quite short, can be squashed if
> > > preferred)
> > > - Added a check to verify that the requested block_size is supported by the
> > > region by looking at region->supported_blk_sizes_bitmask
> > > - Instead of event_record validity flag being cleared, set to 1
> > > - Fixed bug of forgetting to update region->block_size
> > > 1.4. Changes Related to 0x5603 - FMAPI Get DC Region Extents
> > > - Minor refactoring of loop filling in response payload extents
> > >
> > > 2. Feedback from Fan Ni and Jonathan Cameron on v1
> > > 2.1. Changes Related to 0x5604 - FMAPI Initiate DC Add
> > > - Remove redundant storage of extents in event_rec_exts
> > > - Refactor event record creation into helper function for re-use by release
> > > - Return event_record.available_extents
> > > (total_extents_available - num_pending - num_accepted) instead of
> > > leaving it blank
> > > 2.2. Changes Related to 0x5605 - FMAPI Initiate DC Release
> > > - Remove redundant storage of extents in event_rec_exts/redundant 2nd loop
> > > - Add #define for removal_policy_bitmask instead of hardcoding 0x7
> > >
> > > Anisa Su (10):
> > > cxl-mailbox-utils: Move opcodes enum to new header file
> > > cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
> > > cxl/type3: Add dsmas_flags to CXLDCRegion struct
> > > cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
> > > cxl_events.h: Move definition for dynamic_capacity_uuid and enum for
> > > DC event types
> > > hw/cxl_type3: Add DC Region bitmap lock
> > > cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
> > > cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
> > > cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
> > > cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
> > >
> > > hw/cxl/cxl-mailbox-utils.c | 649 +++++++++++++++++++++++++++++++----
> > > hw/cxl/i2c_mctp_cxl.c | 6 +-
> > > hw/mem/cxl_type3.c | 41 ++-
> > > include/hw/cxl/cxl_device.h | 24 ++
> > > include/hw/cxl/cxl_events.h | 15 +
> > > include/hw/cxl/cxl_mailbox.h | 6 +
> > > include/hw/cxl/cxl_opcodes.h | 72 ++++
> > > 7 files changed, 724 insertions(+), 89 deletions(-)
> > > create mode 100644 include/hw/cxl/cxl_opcodes.h
> > >
> >
> >
>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605
2025-06-02 17:46 ` Anisa Su
@ 2025-06-06 0:28 ` Anisa Su
2025-06-10 14:47 ` Jonathan Cameron
0 siblings, 1 reply; 31+ messages in thread
From: Anisa Su @ 2025-06-06 0:28 UTC (permalink / raw)
To: Anisa Su; +Cc: Jonathan Cameron, Jonathan Cameron via, nifan.cxl, dave,
linux-cxl
On Mon, Jun 02, 2025 at 05:46:57PM +0000, Anisa Su wrote:
> On Fri, May 30, 2025 at 03:26:55PM +0100, Jonathan Cameron wrote:
> > On Tue, 20 May 2025 14:39:47 +0100
> > Jonathan Cameron via <qemu-devel@nongnu.org> wrote:
> >
> > > On Thu, 8 May 2025 00:00:56 +0000
> > > anisa.su887@gmail.com wrote:
> > >
> > > > From: Anisa Su <anisa.su@samsung.com>
> > > >
snip
> > Anisa,
> >
> > Ideally I'd like to get the majority of this upstream once you post
> > a v3. To do that I'd like to break the dependence on mctp_i2c in patch 2.
> > These commands are equally valid via a switch-cci (and that path to the
> > fm owned ld_mctpcci is already upstream).
> >
> > If you could send it as two series. One of which sits on upstream and
> > doesn't include the i2c_mctp part and the other of which is applied once
> > that support is available in my tree that would be great. I'll squash
> > the i2c_mctp part into the patch that adds support for that in the
> > first place.
> >
> > I'll deal with rebasing needed for other command introductions etc.
> >
Hi Jonathan,
I applied the v3 patches (which are based on ToT master) on your latest
published branch cxl-2025-03-20 + Fan's patch fixing dc extent tracking
and then edited the first patch to add the i2c_mctp stuff and rebased
the remaining patches on top.
Would it be easier for you if I send you those?
Let me know, thanks!
Anisa
> > There are just enough open questions in this series that I haven't done
> > this rework directly (though I did start doing it - hence the missing
> > include note in one of the patches).
> >
> > Thanks,
> >
> Sounds good, will do :)
>
> Thanks,
> Anisa
> > Jonathan
> > >
> > > Jonathan
> > >
> > >
> > >
snip
> > > > Anisa Su (10):
> > > > cxl-mailbox-utils: Move opcodes enum to new header file
> > > > cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
> > > > cxl/type3: Add dsmas_flags to CXLDCRegion struct
> > > > cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
> > > > cxl_events.h: Move definition for dynamic_capacity_uuid and enum for
> > > > DC event types
> > > > hw/cxl_type3: Add DC Region bitmap lock
> > > > cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
> > > > cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
> > > > cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
> > > > cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
> > > >
> > > > hw/cxl/cxl-mailbox-utils.c | 649 +++++++++++++++++++++++++++++++----
> > > > hw/cxl/i2c_mctp_cxl.c | 6 +-
> > > > hw/mem/cxl_type3.c | 41 ++-
> > > > include/hw/cxl/cxl_device.h | 24 ++
> > > > include/hw/cxl/cxl_events.h | 15 +
> > > > include/hw/cxl/cxl_mailbox.h | 6 +
> > > > include/hw/cxl/cxl_opcodes.h | 72 ++++
> > > > 7 files changed, 724 insertions(+), 89 deletions(-)
> > > > create mode 100644 include/hw/cxl/cxl_opcodes.h
> > > >
> > >
> > >
> >
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605
2025-06-06 0:28 ` Anisa Su
@ 2025-06-10 14:47 ` Jonathan Cameron
0 siblings, 0 replies; 31+ messages in thread
From: Jonathan Cameron @ 2025-06-10 14:47 UTC (permalink / raw)
To: Anisa Su; +Cc: Jonathan Cameron via, nifan.cxl, dave, linux-cxl
On Fri, 6 Jun 2025 00:28:42 +0000
Anisa Su <anisa.su887@gmail.com> wrote:
> On Mon, Jun 02, 2025 at 05:46:57PM +0000, Anisa Su wrote:
> > On Fri, May 30, 2025 at 03:26:55PM +0100, Jonathan Cameron wrote:
> > > On Tue, 20 May 2025 14:39:47 +0100
> > > Jonathan Cameron via <qemu-devel@nongnu.org> wrote:
> > >
> > > > On Thu, 8 May 2025 00:00:56 +0000
> > > > anisa.su887@gmail.com wrote:
> > > >
> > > > > From: Anisa Su <anisa.su@samsung.com>
> > > > >
> snip
> > > Anisa,
> > >
> > > Ideally I'd like to get the majority of this upstream once you post
> > > a v3. To do that I'd like to break the dependence on mctp_i2c in patch 2.
> > > These commands are equally valid via a switch-cci (and that path to the
> > > fm owned ld_mctpcci is already upstream).
> > >
> > > If you could send it as two series. One of which sits on upstream and
> > > doesn't include the i2c_mctp part and the other of which is applied once
> > > that support is available in my tree that would be great. I'll squash
> > > the i2c_mctp part into the patch that adds support for that in the
> > > first place.
> > >
> > > I'll deal with rebasing needed for other command introductions etc.
> > >
> Hi Jonathan,
>
> I applied the v3 patches (which are based on ToT master) on your latest
> published branch cxl-2025-03-20 + Fan's patch fixing dc extent tracking
> and then edited the first patch to add the i2c_mctp stuff and rebased
> the remaining patches on top.
>
> Would it be easier for you if I send you those?
I'm lost in the description I'm afraid. Maybe just have a go at it and we'll
see?
Jonathan
>
> Let me know, thanks!
> Anisa
>
> > > There are just enough open questions in this series that I haven't done
> > > this rework directly (though I did start doing it - hence the missing
> > > include note in one of the patches).
> > >
> > > Thanks,
> > >
> > Sounds good, will do :)
> >
> > Thanks,
> > Anisa
> > > Jonathan
> > > >
> > > > Jonathan
> > > >
> > > >
> > > >
> snip
> > > > > Anisa Su (10):
> > > > > cxl-mailbox-utils: Move opcodes enum to new header file
> > > > > cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
> > > > > cxl/type3: Add dsmas_flags to CXLDCRegion struct
> > > > > cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
> > > > > cxl_events.h: Move definition for dynamic_capacity_uuid and enum for
> > > > > DC event types
> > > > > hw/cxl_type3: Add DC Region bitmap lock
> > > > > cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
> > > > > cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
> > > > > cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
> > > > > cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
> > > > >
> > > > > hw/cxl/cxl-mailbox-utils.c | 649 +++++++++++++++++++++++++++++++----
> > > > > hw/cxl/i2c_mctp_cxl.c | 6 +-
> > > > > hw/mem/cxl_type3.c | 41 ++-
> > > > > include/hw/cxl/cxl_device.h | 24 ++
> > > > > include/hw/cxl/cxl_events.h | 15 +
> > > > > include/hw/cxl/cxl_mailbox.h | 6 +
> > > > > include/hw/cxl/cxl_opcodes.h | 72 ++++
> > > > > 7 files changed, 724 insertions(+), 89 deletions(-)
> > > > > create mode 100644 include/hw/cxl/cxl_opcodes.h
> > > > >
> > > >
> > > >
> > >
^ permalink raw reply [flat|nested] 31+ messages in thread
end of thread, other threads:[~2025-06-10 14:47 UTC | newest]
Thread overview: 31+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-05-08 0:00 [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
2025-05-08 0:00 ` [PATCH v2 01/10] cxl-mailbox-utils: Move opcodes enum to new header file anisa.su887
2025-05-20 15:37 ` Fan Ni
2025-05-20 17:33 ` Anisa Su
2025-05-30 13:43 ` Jonathan Cameron
2025-05-30 19:57 ` Anisa Su
2025-05-08 0:00 ` [PATCH v2 02/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info anisa.su887
2025-05-20 15:59 ` Fan Ni
2025-05-30 14:07 ` Jonathan Cameron
2025-05-08 0:00 ` [PATCH v2 03/10] cxl/type3: Add dsmas_flags to CXLDCRegion struct anisa.su887
2025-05-20 16:05 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 04/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config anisa.su887
2025-05-20 16:23 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 05/10] cxl_events.h: Move definition for dynamic_capacity_uuid and enum for DC event types anisa.su887
2025-05-20 16:44 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 06/10] hw/cxl_type3: Add DC Region bitmap lock anisa.su887
2025-05-20 16:56 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 07/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config anisa.su887
2025-05-20 13:29 ` Jonathan Cameron
2025-05-20 17:07 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 08/10] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists anisa.su887
2025-05-20 17:18 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add anisa.su887
2025-05-20 13:34 ` Jonathan Cameron
2025-05-20 18:08 ` Fan Ni
2025-05-08 0:01 ` [PATCH v2 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release anisa.su887
2025-05-20 13:39 ` [PATCH v2 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 Jonathan Cameron
2025-05-30 14:26 ` Jonathan Cameron
2025-06-02 17:46 ` Anisa Su
2025-06-06 0:28 ` Anisa Su
2025-06-10 14:47 ` Jonathan Cameron
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