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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?OUC6tMQ3PvOLkVwYRaxshebBVSlF8K/wAFwa/Ab2tgNr15+4bgJHk/6GrJrv?= =?us-ascii?Q?LDr8oFqlflkBMB3RhZk3NlDoXXcsECTsYarneK+OQeonqG0/UexjdRe1Pcie?= =?us-ascii?Q?807zJNkWy7vG29tEYiGL/q/uPXelohwhh9YZOPBUyBl8FCx7jR66F67V89ES?= =?us-ascii?Q?nCQM/zEaBFhwgwF2UQZQlLFmiCHbf1hfYidRqBNptvNqII9Oyh7Mqau5T4iZ?= =?us-ascii?Q?OqyzWVmx2H6du2kqXChT/2PNsfLcE6vyDkXxcqfQBgIiDlb3OVnqN72quFZc?= =?us-ascii?Q?9x9dUQU4ezS3KEDnHIZMuTwcsXReMU//bR+Q64eIXG/Mhw6p/LKWPS0fqP/A?= =?us-ascii?Q?owW8dblFPixx4fEK2Bak4T+vOhnBLF2EW2kBdUo2+ynQQmx5+6vYAcO0X/g9?= =?us-ascii?Q?axof4HAlPFE7/ALjO980TCFgsx9h/epi5MtKov5YN9aJH+wmQaeJPOPGyzgk?= =?us-ascii?Q?NOz85N5gtQGho+2k9TNd8eZkTUAdqOh5beWXdS9pwfTvwZIpQwOB84SsGHEy?= =?us-ascii?Q?TkYnBSxwHetaO3KFXRLtajqz2IeFuYMcy6IwFIMfYoIsmJsDzzBrPREtSBHT?= =?us-ascii?Q?ilcrAD33RBojbFqHKnQfeNnUNKSJ4mIkD0LUz16U+wbMxz/5/B1jdUg0Vbm0?= =?us-ascii?Q?fM2R3LPTvyjsK1llH7R9QB/bcsS5KHgZZsSSyiIgVdI4pnbhlk/P9JtCDRUS?= =?us-ascii?Q?rLsAyprFa4pHGVifRQz+FdQmsYaUQBRpvy7HJ23Sd1vJuWZhYk05Est+3afA?= =?us-ascii?Q?MTz2E4wFo6hiMJE537MVftsy+4a4LH5TGvuVzhINzx2I4dnLU3TN8fi20x1H?= =?us-ascii?Q?yArYvNCfTJg73BLbeYnuTed/pKiWYfQgngmMJB2nWLYw9PHvazvct5xNuZaV?= =?us-ascii?Q?QZLJTQgrNXZGI8yoNvprcLlm7U8qZ+j8L45/ZFO7TVa5mYJyb+gA/j6S1fpf?= =?us-ascii?Q?75Qho09VD0Axgyc0rJXMSguvZz+ADM+ZZAXgFrEalOYDgQNeRoklyo76BKrl?= =?us-ascii?Q?7Qe20Z5dKiuVQyNVn4pq9kY8jw9G0y1Xr6TQQtj9tl1BCDO4a0HIz0TiQ+n4?= =?us-ascii?Q?1o+Zps3FV78fIX0NlviMdx1wAUnXXmpRyM2U/KcMKRzL1FgAQdvWQyLGz3/K?= =?us-ascii?Q?MFMzphsWL/jGUv1pxuC47sOHOdHDbBE+uBqON/Ox7+ge+rn8Dk7FV7wFO9ug?= =?us-ascii?Q?Q7/TH9xSUbE8W/1cbsy54RGXb+mb5RTyYl9rSlq8GERSTzn3Pliik0j346Ob?= =?us-ascii?Q?kxVpwiQH44B6LYnPtbITvgwAnjFtqWJi2YozYXdxpSEiGyfpFlXwPQyMjLjU?= =?us-ascii?Q?0W3JtIuAtK7zSg3zSDzHrb8ttTjjSrInj9BrACys8+z2W7cfkzdERblNX0P2?= =?us-ascii?Q?0LLeLqsSJEWnf3Ix82zla1pL3XJhB0NgjKPIS2YF005Ixq3tL060l3qbz+gL?= =?us-ascii?Q?indd8RP7OlTqsq857hvT9VNPMGRoD5K9W3V2QguaEXFmIMIx0m6Bv1WbWSfM?= =?us-ascii?Q?qAnUsiQd5rOqaFrVbPNkc55/CqhdiFKQ5PWMogepLIT97nNCYcSiW1KGXVAe?= =?us-ascii?Q?VjQb+xSxC6w94mtPa6fq8cZ8ERriaZcvEi8UX2Iz?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1e6da714-a053-4baa-8954-08ddc06f4e92 X-MS-Exchange-CrossTenant-AuthSource: CYYPR12MB8750.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jul 2025 11:37:25.1851 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Wtav3EV14n3q181VVVRgQ3FdKrmoCIBqPFcGb6G3zkl50iTJ9CEOk4y5LWJWXRoK2iQ4xEk5eHA8LeF1uIsWdQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6213 Hi Dave, On 03.07.25 16:49:11, Dave Jiang wrote: > > > On 6/10/25 10:29 AM, Dave Jiang wrote: > > It was a mistake to introduce core/acpi.c and putting ACPI dependency on > > cxl_core when adding the extended linear cache support. Add a callback > > in the cxl_root_decoder to retrieve the extended linear cache size from > > ACPI via the cxl_acpi driver. > > > > Signed-off-by: Dave Jiang > > Applied to cxl/next > 1a45e1cd694fdf2d2a22e3c70a6917ff39fe77ab I am sorry to come back to this patch that late in the process. While rebasing my current region rework and address translation patches I came across your patch and realized that I have a much more simpler rework of that in my patch queue. I extracted that patch below from my series I am working on. Could you take a look at it? The changes are less intrusive and part of my rework required for address translation. If it looks good to you and during review, I rather prefer to replace your patch with this one. Note that I have follow on patches that reduce more code and remove the cxl_extended_linear_cache_resize() function entirely. Patch below bases on: ac0fe6a57317 cxl: make cxl_bus_type constant Many thanks, -Robert >From fd3f1f5b33313bb10a2e51861031015ac48a8cd1 Mon Sep 17 00:00:00 2001 From: Robert Richter Date: Fri, 11 Jul 2025 11:56:56 +0200 Subject: [PATCH] cxl: Remove core/acpi.c and cxl core dependency on ACPI >From Dave [1]: """ It was a mistake to introduce core/acpi.c and putting ACPI dependency on cxl_core when adding the extended linear cache support. """ Current implementation calls hmat_get_extended_linear_cache_size() of the ACPI subsystem. That external reference causes issue running cxl_test as there is no way to "mock" that function and ignore it when using cxl test. Instead of working around that using cxlrd ops and extensively expanding cxl_test code [1], just move HMAT calls out of the core module to cxl_acpi. Implement this by adding a @cache_size member to struct cxl_root_decoder. During initialization the cache size is determined and added to the root decoder object in cxl_acpi. Later on in cxl_core the cache_size parameter is used to setup extended linear caching. [1] https://patch.msgid.link/20250610172938.139428-1-dave.jiang@intel.com Cc: Dave Jiang Signed-off-by: Robert Richter --- drivers/cxl/acpi.c | 59 +++++++++++++++++++++++++++++++++++++++ drivers/cxl/core/Makefile | 1 - drivers/cxl/core/acpi.c | 11 -------- drivers/cxl/core/core.h | 2 -- drivers/cxl/core/region.c | 7 +---- drivers/cxl/cxl.h | 1 + 6 files changed, 61 insertions(+), 20 deletions(-) delete mode 100644 drivers/cxl/core/acpi.c diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index a1a99ec3f12c..712624cba2b6 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -335,6 +335,63 @@ static int add_or_reset_cxl_resource(struct resource *parent, struct resource *r return rc; } +static int cxl_acpi_set_cache_size(struct cxl_root_decoder *cxlrd) +{ + struct cxl_decoder *cxld = &cxlrd->cxlsd.cxld; + struct range *hpa = &cxld->hpa_range; + resource_size_t size = range_len(hpa); + resource_size_t start = hpa->start; + resource_size_t cache_size; + struct resource res; + int nid, rc; + + res = DEFINE_RES(start, size, 0); + nid = phys_to_target_node(start); + + rc = hmat_get_extended_linear_cache_size(&res, nid, &cache_size); + if (rc) + return rc; + + /* + * The cache range is expected to be within the CFMWS. + * Currently there is only support cache_size == cxl_size. CXL + * size is then half of the total CFMWS window size. + */ + size = size >> 1; + if (cache_size && size != cache_size) { + dev_warn(&cxld->dev, + "Extended Linear Cache size %pa != CXL size %pa. No Support!", + &cache_size, &size); + return -ENXIO; + } + + cxlrd->cache_size = cache_size; + + return 0; +} + +static void cxl_setup_extended_linear_cache(struct cxl_root_decoder *cxlrd) +{ + int rc; + + rc = cxl_acpi_set_cache_size(cxlrd); + if (!rc) + return; + + if (rc != -EOPNOTSUPP) { + /* + * Failing to support extended linear cache region resize does not + * prevent the region from functioning. Only causes cxl list showing + * incorrect region size. + */ + dev_warn(cxlrd->cxlsd.cxld.dev.parent, + "Extended linear cache calculation failed rc:%d\n", rc); + } + + /* Ignoring return code */ + cxlrd->cache_size = 0; +} + DEFINE_FREE(put_cxlrd, struct cxl_root_decoder *, if (!IS_ERR_OR_NULL(_T)) put_device(&_T->cxlsd.cxld.dev)) DEFINE_FREE(del_cxl_resource, struct resource *, if (_T) del_cxl_resource(_T)) @@ -394,6 +451,8 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws, ig = CXL_DECODER_MIN_GRANULARITY; cxld->interleave_granularity = ig; + cxl_setup_extended_linear_cache(cxlrd); + if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) { if (ways != 1 && ways != 3) { cxims_ctx = (struct cxl_cxims_context) { diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile index 79e2ef81fde8..5ad8fef210b5 100644 --- a/drivers/cxl/core/Makefile +++ b/drivers/cxl/core/Makefile @@ -15,7 +15,6 @@ cxl_core-y += hdm.o cxl_core-y += pmu.o cxl_core-y += cdat.o cxl_core-y += ras.o -cxl_core-y += acpi.o cxl_core-$(CONFIG_TRACING) += trace.o cxl_core-$(CONFIG_CXL_REGION) += region.o cxl_core-$(CONFIG_CXL_MCE) += mce.o diff --git a/drivers/cxl/core/acpi.c b/drivers/cxl/core/acpi.c deleted file mode 100644 index f13b4dae6ac5..000000000000 --- a/drivers/cxl/core/acpi.c +++ /dev/null @@ -1,11 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* Copyright(c) 2024 Intel Corporation. All rights reserved. */ -#include -#include "cxl.h" -#include "core.h" - -int cxl_acpi_get_extended_linear_cache_size(struct resource *backing_res, - int nid, resource_size_t *size) -{ - return hmat_get_extended_linear_cache_size(backing_res, nid, size); -} diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index 29b61828a847..9462aea9ce9d 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -120,8 +120,6 @@ int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port, int cxl_ras_init(void); void cxl_ras_exit(void); int cxl_gpf_port_setup(struct cxl_dport *dport); -int cxl_acpi_get_extended_linear_cache_size(struct resource *backing_res, - int nid, resource_size_t *size); #ifdef CONFIG_CXL_FEATURES struct cxl_feat_entry * diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 6e5e1460068d..bc542a7142c0 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3282,15 +3282,10 @@ static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr, { struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent); struct cxl_region_params *p = &cxlr->params; - int nid = phys_to_target_node(res->start); resource_size_t size = resource_size(res); resource_size_t cache_size, start; - int rc; - - rc = cxl_acpi_get_extended_linear_cache_size(res, nid, &cache_size); - if (rc) - return rc; + cache_size = cxlrd->cache_size; if (!cache_size) return 0; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index e7b66ca1d423..4643a95ca111 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -432,6 +432,7 @@ typedef u64 (*cxl_hpa_to_spa_fn)(struct cxl_root_decoder *cxlrd, u64 hpa); */ struct cxl_root_decoder { struct resource *res; + resource_size_t cache_size; atomic_t region_id; cxl_hpa_to_spa_fn hpa_to_spa; void *platform_data; -- 2.39.5