From: Alison Schofield <alison.schofield@intel.com>
To: "Koralahalli Channabasappa, Smita" <skoralah@amd.com>
Cc: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
<linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<nvdimm@lists.linux.dev>, <linux-fsdevel@vger.kernel.org>,
<linux-pm@vger.kernel.org>, Ard Biesheuvel <ardb@kernel.org>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Yazen Ghannam <yazen.ghannam@amd.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Matthew Wilcox <willy@infradead.org>, Jan Kara <jack@suse.cz>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <len.brown@intel.com>, Pavel Machek <pavel@kernel.org>,
Li Ming <ming.li@zohomail.com>,
Jeff Johnson <jeff.johnson@oss.qualcomm.com>,
"Ying Huang" <huang.ying.caritas@gmail.com>,
Yao Xingtao <yaoxt.fnst@fujitsu.com>,
Peter Zijlstra <peterz@infradead.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Nathan Fontenot <nathan.fontenot@amd.com>,
Terry Bowman <terry.bowman@amd.com>,
Robert Richter <rrichter@amd.com>,
Benjamin Cheatham <benjamin.cheatham@amd.com>,
Zhijian Li <lizhijian@fujitsu.com>,
Borislav Petkov <bp@alien8.de>,
Tomasz Wolski <tomasz.wolski@fujitsu.com>
Subject: Re: [PATCH v5 6/7] dax/hmem, cxl: Defer and resolve ownership of Soft Reserved memory ranges
Date: Wed, 28 Jan 2026 13:47:16 -0800 [thread overview]
Message-ID: <aXqD5JUmMJAiQU2C@aschofie-mobl2.lan> (raw)
In-Reply-To: <5a150b32-2396-4870-8467-fc3fa9f8d0e7@amd.com>
On Wed, Jan 28, 2026 at 01:14:52PM -0800, Koralahalli Channabasappa, Smita wrote:
> On 1/26/2026 5:38 PM, Alison Schofield wrote:
>
> [snip]
> ..
>
> > > +static void process_defer_work(struct work_struct *_work)
> > > +{
> > > + struct dax_defer_work *work = container_of(_work, typeof(*work), work);
> > > + struct platform_device *pdev = work->pdev;
> > > + int rc;
> > > +
> > > + /* relies on cxl_acpi and cxl_pci having had a chance to load */
> > > + wait_for_device_probe();
> > > +
> > > + rc = walk_hmem_resources(&pdev->dev, cxl_contains_soft_reserve);
> > > +
> > > + if (!rc) {
> > > + dax_cxl_mode = DAX_CXL_MODE_DROP;
> > > + rc = bus_rescan_devices(&cxl_bus_type);
> > > + if (rc)
> > > + dev_warn(&pdev->dev, "CXL bus rescan failed: %d\n", rc);
> > > + } else {
> > > + dax_cxl_mode = DAX_CXL_MODE_REGISTER;
> > > + cxl_region_teardown_all();
> >
> > The region teardown appears as a one-shot sweep of existing regions
> > without considering regions not yet assembled. After this point will
> > a newly arriving region, be racing with HMEM again to create a DAX
> > region?
>
> My understanding is that with the probe ordering patches and
> wait_for_device_probe(), CXL region discovery and assembly should have
> completed before this point.
OK - my confusion. Thanks for explaining.
-- Alison
>
> Thanks
> Smita
> >
> >
> > > + }
> > > +
> > > + walk_hmem_resources(&pdev->dev, hmem_register_device);
> > > +}
> > > +
> > > +static void kill_defer_work(void *_work)
> > > +{
> > > + struct dax_defer_work *work = container_of(_work, typeof(*work), work);
> > > +
> > > + cancel_work_sync(&work->work);
> > > + kfree(work);
> > > +}
> > > +
> > > static int dax_hmem_platform_probe(struct platform_device *pdev)
> > > {
> > > + struct dax_defer_work *work = kzalloc(sizeof(*work), GFP_KERNEL);
> > > + int rc;
> > > +
> > > + if (!work)
> > > + return -ENOMEM;
> > > +
> > > + work->pdev = pdev;
> > > + INIT_WORK(&work->work, process_defer_work);
> > > +
> > > + rc = devm_add_action_or_reset(&pdev->dev, kill_defer_work, work);
> > > + if (rc)
> > > + return rc;
> > > +
> > > + platform_set_drvdata(pdev, work);
> > > +
> > > return walk_hmem_resources(&pdev->dev, hmem_register_device);
> > > }
> > > @@ -174,3 +250,4 @@ MODULE_ALIAS("platform:hmem_platform*");
> > > MODULE_DESCRIPTION("HMEM DAX: direct access to 'specific purpose' memory");
> > > MODULE_LICENSE("GPL v2");
> > > MODULE_AUTHOR("Intel Corporation");
> > > +MODULE_IMPORT_NS("CXL");
> > > --
> > > 2.17.1
> > >
>
next prev parent reply other threads:[~2026-01-28 21:47 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-22 4:55 [PATCH v5 0/7] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL and HMEM Smita Koralahalli
2026-01-22 4:55 ` [PATCH v5 1/7] dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges Smita Koralahalli
2026-01-22 16:16 ` Jonathan Cameron
2026-01-22 4:55 ` [PATCH v5 2/7] dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL Smita Koralahalli
2026-01-22 4:55 ` [PATCH v5 3/7] cxl/region: Skip decoder reset on detach for autodiscovered regions Smita Koralahalli
2026-01-22 16:18 ` Jonathan Cameron
2026-01-26 21:37 ` Koralahalli Channabasappa, Smita
2026-01-27 23:37 ` dan.j.williams
2026-01-28 15:39 ` Alejandro Lucero Palau
2026-01-28 21:24 ` dan.j.williams
2026-01-23 10:42 ` Alejandro Lucero Palau
2026-01-23 21:58 ` Dave Jiang
2026-01-22 4:55 ` [PATCH v5 4/7] cxl/region: Add helper to check Soft Reserved containment by CXL regions Smita Koralahalli
2026-01-22 16:25 ` Jonathan Cameron
2026-01-27 21:47 ` Koralahalli Channabasappa, Smita
2026-01-23 22:19 ` Dave Jiang
2026-01-25 3:30 ` Koralahalli Channabasappa, Smita
2026-01-27 21:59 ` dan.j.williams
2026-01-28 21:07 ` Koralahalli Channabasappa, Smita
2026-01-28 21:33 ` dan.j.williams
2026-01-22 4:55 ` [PATCH v5 5/7] dax: Introduce dax_cxl_mode for CXL coordination Smita Koralahalli
2026-01-22 16:33 ` Jonathan Cameron
2026-01-23 22:30 ` Dave Jiang
2026-01-27 20:03 ` Alison Schofield
2026-01-22 4:55 ` [PATCH v5 6/7] dax/hmem, cxl: Defer and resolve ownership of Soft Reserved memory ranges Smita Koralahalli
2026-01-22 13:40 ` kernel test robot
2026-01-23 5:30 ` kernel test robot
2026-01-23 6:35 ` Alison Schofield
2026-01-26 21:05 ` Koralahalli Channabasappa, Smita
2026-01-26 22:33 ` Alison Schofield
2026-01-27 21:45 ` Koralahalli Channabasappa, Smita
2026-01-29 0:45 ` dan.j.williams
2026-01-23 11:59 ` Alejandro Lucero Palau
2026-01-25 3:17 ` Koralahalli Channabasappa, Smita
2026-01-26 12:20 ` Alejandro Lucero Palau
2026-01-26 14:26 ` Alejandro Lucero Palau
2026-01-26 23:53 ` dan.j.williams
2026-01-27 12:16 ` Alejandro Lucero Palau
2025-10-01 17:15 ` Tomasz Wolski
2026-01-27 16:52 ` Alejandro Lucero Palau
2026-01-27 23:41 ` dan.j.williams
2026-01-28 16:19 ` Alejandro Lucero Palau
2026-01-27 21:29 ` Koralahalli Channabasappa, Smita
2026-01-23 22:55 ` Dave Jiang
2026-01-27 1:38 ` Alison Schofield
2026-01-28 21:14 ` Koralahalli Channabasappa, Smita
2026-01-28 21:47 ` Alison Schofield [this message]
2026-01-27 20:11 ` Alison Schofield
2026-01-28 23:35 ` dan.j.williams
2026-01-29 3:09 ` dan.j.williams
2026-01-29 21:20 ` Koralahalli Channabasappa, Smita
2026-01-29 22:01 ` dan.j.williams
2026-02-04 23:27 ` Tomasz Wolski
2026-01-22 4:55 ` [PATCH v5 7/7] dax/hmem: Reintroduce Soft Reserved ranges back into the iomem tree Smita Koralahalli
2026-01-22 16:39 ` Jonathan Cameron
2026-01-28 22:07 ` Koralahalli Channabasappa, Smita
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