From: Alison Schofield <alison.schofield@intel.com>
To: <alejandro.lucero-palau@amd.com>
Cc: <linux-cxl@vger.kernel.org>, <dan.j.williams@intel.com>,
<dave.jiang@intel.com>, Alejandro Lucero <alucerop@amd.com>,
Gregory Price <gourry@gourry.net>
Subject: Re: [PATCH v2 2/3] cxl/region: Factor out interleave ways setup
Date: Wed, 25 Feb 2026 15:49:12 -0800 [thread overview]
Message-ID: <aZ-KeLC8tKemoNJH@aschofie-mobl2.lan> (raw)
In-Reply-To: <20260225122223.3841889-3-alejandro.lucero-palau@amd.com>
On Wed, Feb 25, 2026 at 12:22:22PM +0000, alejandro.lucero-palau@amd.com wrote:
> From: Alejandro Lucero <alucerop@amd.com>
>
> Region creation based on Type3 devices can be triggered from user space
> allowing memory combination through interleaving.
>
> In preparation for kernel driven region creation, that is Type2 drivers
> triggering region creation backed with its advertised CXL memory, factor
> out a common helper from the user-sysfs region setup for interleave ways.
>
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Reviewed-by: Gregory Price <gourry@gourry.net>
> Tested-by: Gregory Price <gourry@gourry.net>
> ---
> drivers/cxl/core/region.c | 41 +++++++++++++++++++++++++--------------
> 1 file changed, 26 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index cac33c99fe6a..3ef4ccf1c92b 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -485,22 +485,14 @@ static ssize_t interleave_ways_show(struct device *dev,
>
> static const struct attribute_group *get_cxl_region_target_group(void);
>
> -static ssize_t interleave_ways_store(struct device *dev,
> - struct device_attribute *attr,
> - const char *buf, size_t len)
> +static int set_interleave_ways(struct cxl_region *cxlr, int val)
> {
> - struct cxl_region *cxlr = to_cxl_region(dev);
> struct cxl_root_decoder *cxlrd = cxlr->cxlrd;
> struct cxl_decoder *cxld = &cxlrd->cxlsd.cxld;
> struct cxl_region_params *p = &cxlr->params;
> - unsigned int val, save;
> - int rc;
> + int save, rc;
> u8 iw;
Why the type differences? set_interleave_ways() takes an int while
the sysfs store path parses val as unsigned int via kstrtouint()?
How about keeping the helper argument type aligned with the sysfs
parse type (and/or p->interleave_ways type)?
Even if todays sysfs path won't pass negative, the helper is
being positioned for non sysfs callers IIUC.
Similar question with 'save'? Should it match type of
p->interleave_ways?
>
> - rc = kstrtouint(buf, 0, &val);
> - if (rc)
> - return rc;
> -
> rc = ways_to_eiw(val, &iw);
> if (rc)
> return rc;
> @@ -515,9 +507,7 @@ static ssize_t interleave_ways_store(struct device *dev,
> return -EINVAL;
> }
>
> - ACQUIRE(rwsem_write_kill, rwsem)(&cxl_rwsem.region);
> - if ((rc = ACQUIRE_ERR(rwsem_write_kill, &rwsem)))
> - return rc;
> + lockdep_assert_held_write(&cxl_rwsem.region);
>
> if (p->state >= CXL_CONFIG_INTERLEAVE_ACTIVE)
> return -EBUSY;
> @@ -525,10 +515,31 @@ static ssize_t interleave_ways_store(struct device *dev,
> save = p->interleave_ways;
> p->interleave_ways = val;
> rc = sysfs_update_group(&cxlr->dev.kobj, get_cxl_region_target_group());
> - if (rc) {
> + if (rc)
> p->interleave_ways = save;
> +
> + return rc;
> +}
> +
> +static ssize_t interleave_ways_store(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf, size_t len)
> +{
> + struct cxl_region *cxlr = to_cxl_region(dev);
> + unsigned int val;
> + int rc;
> +
> + rc = kstrtouint(buf, 0, &val);
> + if (rc)
> + return rc;
> +
> + ACQUIRE(rwsem_write_kill, rwsem)(&cxl_rwsem.region);
> + if ((rc = ACQUIRE_ERR(rwsem_write_kill, &rwsem)))
> + return rc;
> +
> + rc = set_interleave_ways(cxlr, val);
> + if (rc)
> return rc;
> - }
>
> return len;
> }
> --
> 2.34.1
>
>
next prev parent reply other threads:[~2026-02-25 23:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-25 12:22 [PATCH v2 0/3] cxl region changes for Type2 support alejandro.lucero-palau
2026-02-25 12:22 ` [PATCH v2 1/3] cxl: Make region type based on endpoint type alejandro.lucero-palau
2026-02-25 12:22 ` [PATCH v2 2/3] cxl/region: Factor out interleave ways setup alejandro.lucero-palau
2026-02-25 23:49 ` Alison Schofield [this message]
2026-02-27 20:13 ` Alejandro Lucero Palau
2026-02-25 12:22 ` [PATCH v2 3/3] cxl/region: Factor out interleave granularity setup alejandro.lucero-palau
2026-02-25 23:52 ` Alison Schofield
2026-02-27 13:21 ` Jonathan Cameron
2026-02-27 20:17 ` Alejandro Lucero Palau
2026-02-25 23:42 ` [PATCH v2 0/3] cxl region changes for Type2 support Alison Schofield
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