Re: [PATCH v4 09/10] PCI: save/restore CXL config around reset

Lukas Wunner
2026-01-22T10:09:27Z

On Tue, Jan 20, 2026 at 10:26:09PM +0000, smadhavan@nvidia.com wrote:
> +++ b/drivers/pci/pci.c
> @@ -4989,6 +4990,11 @@ static int cxl_reset(struct pci_dev *dev, bool probe)
> if (probe)
> return 0;
>
> + pci_save_state(dev);
> + rc = cxl_config_save_state(dev, &cxl_state);
> + if (rc)
> + pci_warn(dev, "Failed to save CXL config state: %d\n", rc);
> +

Hm, shouldn't the call to cxl_config_save_state() be moved to
pci_save_state() (and likewise, cxl_config_restore_state() moved to
pci_restore_state())?

E.g. when a DPC event occurs, I assume CXL registers need to
be restored as well on recovery, right?

Note that since v6.19-rc1, state is saved on enumeration and
thus always available for recovery, see a2f1e22390ac.

As a general remark on this series, it seems to have considerable
overlap with Terry's work on AER support for CXL, particularly in
patch [01/10], as Jonathan has remarked. Please cc Terry on future
submissions and coordinate with him on conflicting parts of your
patches:

https://lore.kernel.org/all/20260114182055.46029-1-terry.bowman@amd.com/

Thanks,

Lukas