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Wed, 30 Sep 2026 23:08:54 +0000 Date: Wed, 30 Sep 2026 16:08:50 -0700 From: Alison Schofield To: Davidlohr Bueso CC: , , , , , , , Jonathan Cameron Subject: Re: [PATCH v9 10/10] cxl/doc: Update maturity map with BI support Message-ID: References: <8d84cdb26c176226070377f8fdd66fc6af5ace6c.1790103847.git.dave@stgolabs.net> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <8d84cdb26c176226070377f8fdd66fc6af5ace6c.1790103847.git.dave@stgolabs.net> X-ClientProxiedBy: SJ0PR13CA0019.namprd13.prod.outlook.com (2603:10b6:a03:2c0::24) To DS4PPF0BAC23327.namprd11.prod.outlook.com (2603:10b6:f:fc02::9) Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS4PPF0BAC23327:EE_|SJ5PPF4990C6B9D:EE_ X-MS-Office365-Filtering-Correlation-Id: b0accb6e-6adc-4a23-50f8-08df1f47cc3c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|376014|1800799024|366016|6133799003|18002099003|22082099003|3023799007|56012099006|10067099003|11063799006|4143699003; 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Looks like this actually updates BI and Type2 status, which is good, just not stated in the commit subject or message. If you're reving anyways, please fix that up. Reviewed-by: Alison Schofield > > Reviewed-by: Jonathan Cameron > Signed-off-by: Davidlohr Bueso > --- > Documentation/driver-api/cxl/maturity-map.rst | 16 +++++++++++++++- > 1 file changed, 15 insertions(+), 1 deletion(-) > > diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst > index 282c1102dd81..0b857476cb47 100644 > --- a/Documentation/driver-api/cxl/maturity-map.rst > +++ b/Documentation/driver-api/cxl/maturity-map.rst > @@ -63,6 +63,11 @@ in place, but there are several corner cases that are pending closure. > > * [0] Decoder target and granularity constraints > > +* [1] :ref:`Back-Invalidate (HDM-DB) ` > + > + * [3] BI topology enable / disable (endpoint, DSP, USP route table, RP) > + * [2] Firmware-enabled path adoption > + > * [2] Performance enumeration > > * [3] Endpoint CDAT > @@ -166,7 +171,7 @@ Accelerator > ----------- > > * [0] Accelerator memory enumeration HDM-D (CXL 1.1/2.0 Type-2) > -* [0] Accelerator memory enumeration HDM-DB (CXL 3.0 Type-2) > +* [1] Accelerator memory enumeration HDM-DB (CXL 3.0 Type-2) > * [0] CXL.cache 68b (CXL 2.0) > * [0] CXL.cache 256b Cache IDs (CXL 3.0) > > @@ -192,6 +197,15 @@ Details > hiding some standard registers like PCIe Link Status / Capabilities in > the CXL RCRB (Root Complex Register Block). > > +.. _back-invalidate: > + > +* **Back-Invalidate**: HDM-DB lets a device snoop the host over the > + CXL.mem BISnp channel instead of CXL.cache. The kernel enables BI on > + every port between a device and its root port, requires 256B Flit > + mode on the path, adopts paths firmware already enabled, and creates > + HDM-DB regions under CFMWS windows carrying the Back-Invalidate > + restriction for Type 3 and Type 2 devices alike. > + > .. _background-commands: > > * **Background commands**: The CXL background command mechanism is > -- > 2.39.5 >