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Mon, 28 Sep 2026 14:53:03 -0700 (PDT) From: Anisa Su X-Google-Original-From: Anisa Su Date: Mon, 28 Sep 2026 14:53:00 -0700 To: Dave Jiang Cc: Anisa Su , linux-cxl@vger.kernel.org, Alison Schofield , Jonathan Cameron , Davidlohr Bueso , Li Ming , Gregory Price , Richard Cheng , Ben Cheatham Subject: Re: [PATCH v14 8/8] Documentation/cxl: Document DPA partition layout and ordering rules Message-ID: References: <20260918203049.7273-1-anisa.su@samsung.com> <20260918203049.7273-9-anisa.su@samsung.com> <9ffddb3d-9b22-4fe4-b355-bbad82f4b8aa@intel.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9ffddb3d-9b22-4fe4-b355-bbad82f4b8aa@intel.com> On Mon, Sep 21, 2026 at 03:02:49PM -0700, Dave Jiang wrote: > > > On 9/18/26 1:30 PM, Anisa Su wrote: > > DC Partitions complicate DPA ordering. Add a DPA Partitions section to > > cxl-driver.rst describing spec-mandated and Linux requirements for the > > layout. > > > > maturity-map.rst breaks the DCD entry into sub-items so the map shows > > what this series lands: partition enumeration is [1], event handling > > and DC-backed DAX regions remain [0] until the follow-on series enables > > them. The parent stays [0]; nothing is usable yet. > > > > Suggested-by: Gregory Price > > Signed-off-by: Anisa Su > > Reviewed-by: Jonathan Cameron > > Reviewed-by: Davidlohr Bueso > > Reviewed-by: Alison Schofield > > --- > > Changes: > > [jonathan]: drop paragraph describing "support for additional > > dc partitions may be added later..." to avoid predicting future work in > > documentation > > [davidlohr]: add DCD sub-items to maturity-map.rst so a multi-step > > upstreaming shows users what is there and sets expectations. > > --- > > .../driver-api/cxl/linux/cxl-driver.rst | 35 +++++++++++++++++++ > > Documentation/driver-api/cxl/maturity-map.rst | 4 +++ > > 2 files changed, 39 insertions(+) > > > > diff --git a/Documentation/driver-api/cxl/linux/cxl-driver.rst b/Documentation/driver-api/cxl/linux/cxl-driver.rst > > index dd6dd17dc536..eb4de2a9a9af 100644 > > --- a/Documentation/driver-api/cxl/linux/cxl-driver.rst > > +++ b/Documentation/driver-api/cxl/linux/cxl-driver.rst > > @@ -181,6 +181,41 @@ A Memory Device is a discrete base object that is not a port. While the > > physical device it belongs to may also host an `endpoint`, the relationship > > between an `endpoint` and a `memdev` is not captured in sysfs. > > > > +DPA Partitions > > +~~~~~~~~~~~~~~ > > +A memory device presents its capacity as one flat `Device Physical Address` > > +(DPA) space divided into `partitions`, which Linux lays out in a fixed > > +order:: > > + > > + DPA 0 end > > + +---------------+---------------+---------------------------+ > > + | ram | pmem | dynamic_ram_1 | > > + +---------------+---------------+---------------------------+ > > + part[0] part[1] part[2] > > + > > +Part of that order is required by the CXL specification and part of it is a > > +Linux choice. > > + > > +The `ram` and `pmem` order is mandated. CXL r4.0 section 8.2.10.9.2.1 "Get > > +Partition Info" (4100h), Table 8-310, mandates that volatile capacity starts > > +at DPA 0 and pmem starts at the DPA immediately following it. > > + > > +Dynamic Capacity partitions only need to be 256MB aligned according to > > +CXL r4.0 section 8.2.10.9.9.1 "Get Dynamic Capacity Configuration" > > +(opcode 4800h), Table 8-347. So a device could leave a gap between ram/pmem > > +(static) capacity and its first DC partition, or between one DC partition > > +and the next. > > + > > +Linux chooses not to support gaps between static and dynamic capacity: the > > +first DC partition must begin at the DPA immediately following static > > +capacity -- after pmem, after ram on a device with no pmem, or at DPA 0 on > > +a device with no static capacity at all. > > + > > +Currently, only one dynamic partition is supported. A device may report up > > +to eight (CXL r4.0 Table 8-346); Linux configures the first and exposes it as > > +`dynamic_ram_1`. Gaps between DC partitions are not checked, since only the > > +first is used. > > + > > Port Relationships > > ~~~~~~~~~~~~~~~~~~ > > In our example described above, there are four host bridges attached to the > > diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst > > index 282c1102dd81..fefd31899229 100644 > > --- a/Documentation/driver-api/cxl/maturity-map.rst > > +++ b/Documentation/driver-api/cxl/maturity-map.rst > > Maybe hold off this commit for when everything goes in? Otherwise it's weird that there's documentation but no code. > On Patch 2 and 8 from v12, which add the dynamic_ram_1 partition and enforce that there is no gap between static capacity and dynamic, I received feedback that it's not clear whether this is from the spec or a Linux rule: patch 2: https://lore.kernel.org/linux-cxl/anIMLnbG_KmRfjv6@gourry-fedora-PF4VCD3F/ patch 8: https://lore.kernel.org/linux-cxl/anFCdsSo6dvxfFrZ@aschofie-mobl2.lan/ > > @@ -150,6 +150,10 @@ Memory-pooling > > * [1] Hotplug of LDs (via PCI hotplug) > > * [0] Dynamic Capacity Device (DCD) Support > > > > + * [1] DC partition enumeration / configuration (Get DC Config, CDAT DSMAS, event interrupts) > > + * [0] Extent add / release event handling > > + * [0] DC-backed DAX regions > > I would just update maturity map once when the entire DCD code is in. > I received the feedback from v13 that if the DCD series is going to be split up, "the maturity map should indicate what is there and help users understand and set expectations." https://lore.kernel.org/linux-cxl/20260908102124.2231730-2-anisa.su@samsung.com/T/#me40889025337fdd9584182bf80cc6dbca45aec9d But I could squash this with the documentation commit at the end of the full series? https://lore.kernel.org/linux-cxl/20260625112638.550691-32-anisa.su@samsung.com/ Thanks, Anisa > > + > > Multi-host sharing > > ------------------ > > >