Re: trace events

[Dave Jiang <dave.jiang@intel.com>]

On 11/18/2022 6:53 AM, Marek Bykowski wrote:
> On Thu, 17 Nov 2022 16:50:56 -0800
> Alison Schofield <alison.schofield@intel.com> wrote:
> 
>> There are a few patchsets under review that are using trace events
>> in CXL. I'm working on one for CXL Poison Retrieval.
>>
>> There is also tool support, the monitor patchset, making its way
>> upstream for ndctl that uses the trace events.
>>
>> I haven't looked at lttng.
>>
>> Can you share more about your project?
> 
> Hi Alison,
> 
> There should be already plenty of tools using the trace events,
> libtraceevent, libtrracefs and trace-cmd, lttng, but I guess
> another one may be of use too. When do you think it should be out
> for testing?
> 
> For the project, it is strictly secret, and I shouldn't reveal too
> much publicly, as I was told at least, but what we do we basically
> test a CXL root complex in RTL/verilog that instead of being synthesized,
> gets compiled to a VCS sim (a simulator) that in turn gets
> connected through the BFM (bus-function-model) to another simulator,
> simics or qemu. The connection to another simulator is for having
> the root complex to test it against something.
> 
> So to serve the purpose I need a good grip at what is happening at
> a very low level, ideally with the CXL operation taken down to the
> register access/mnemonics, especially throughout the enumeration
> phase, which we think will the primary source of all the defects to be
> caught up and fixed in RTL.
> 
> I hope our paths would cross at some point in which the HW will be
> finding its way to Linux with all the support it requires.
> 
> Any tips/suggestions how I can use Linux for now effectively to
> achieve my goals is highly appreciated.

Hi Marek. Have you looked into enabling ftrace? Maybe that would be the 
right starting point for what you are looking for?

https://lwn.net/Articles/365835/

> 
> Thanks,
> Marek