From: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
To: Dave Jiang <dave.jiang@intel.com>,
linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-cxl@vger.kernel.org
Cc: Ard Biesheuvel <ardb@kernel.org>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Yazen Ghannam <yazen.ghannam@amd.com>,
Bowman Terry <terry.bowman@amd.com>
Subject: Re: [PATCH 3/4] acpi/ghes, cxl/pci: Trace FW-First CXL Protocol Errors
Date: Thu, 23 May 2024 14:23:01 -0700 [thread overview]
Message-ID: <c7cb3a9c-02e5-09e7-d3f3-b0a3b93f324d@amd.com> (raw)
In-Reply-To: <7dc64418-6821-49c2-b9af-ee4ab148ba9f@intel.com>
On 5/22/2024 11:05 AM, Dave Jiang wrote:
>
>
> On 5/22/24 8:08 AM, Smita Koralahalli wrote:
>> When PCIe AER is in FW-First, OS should process CXL Protocol errors from
>> CPER records.
>>
>> Reuse the existing work queue cxl_cper_work registered with GHES to notify
>> the CXL subsystem on a Protocol error.
>>
>> The defined trace events cxl_aer_uncorrectable_error and
>> cxl_aer_correctable_error currently trace native CXL AER errors. Reuse
>> them to trace FW-First Protocol Errors.
>>
>> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
>> ---
>> drivers/acpi/apei/ghes.c | 14 ++++++++++++++
>> drivers/cxl/core/pci.c | 24 ++++++++++++++++++++++++
>> drivers/cxl/cxlpci.h | 3 +++
>> drivers/cxl/pci.c | 34 ++++++++++++++++++++++++++++++++--
>> include/linux/cxl-event.h | 1 +
>> 5 files changed, 74 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c
>> index 1a58032770ee..a31bd91e9475 100644
>> --- a/drivers/acpi/apei/ghes.c
>> +++ b/drivers/acpi/apei/ghes.c
>> @@ -723,6 +723,20 @@ static void cxl_cper_handle_prot_err(struct acpi_hest_generic_data *gdata)
>>
>> if (cxl_cper_handle_prot_err_info(gdata, &wd.p_err))
>> return;
>> +
>> + guard(spinlock_irqsave)(&cxl_cper_work_lock);
>> +
>> + if (!cxl_cper_work)
>> + return;
>> +
>> + wd.event_type = CXL_CPER_EVENT_PROT_ERR;
>> +
>> + if (!kfifo_put(&cxl_cper_fifo, wd)) {
>> + pr_err_ratelimited("CXL CPER kfifo overflow\n");
>> + return;
>> + }
>> +
>> + schedule_work(cxl_cper_work);
>> }
>>
>> int cxl_cper_register_work(struct work_struct *work)
>> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
>> index 0df09bd79408..ef9438cb1dd6 100644
>> --- a/drivers/cxl/core/pci.c
>> +++ b/drivers/cxl/core/pci.c
>> @@ -686,6 +686,30 @@ void read_cdat_data(struct cxl_port *port)
>> }
>> EXPORT_SYMBOL_NS_GPL(read_cdat_data, CXL);
>>
>> +void cxl_trace_prot_err(struct cxl_dev_state *cxlds,
>> + struct cxl_cper_prot_err *p_err)
>> +{
>> + u32 status, fe;
>> +
>> + if (p_err->severity == CXL_AER_CORRECTABLE) {
>> + status = p_err->cxl_ras.cor_status & ~p_err->cxl_ras.cor_mask;
>> +
>> + trace_cxl_aer_correctable_error(cxlds->cxlmd, status);
>> + } else {
>> + status = p_err->cxl_ras.uncor_status & ~p_err->cxl_ras.uncor_mask;
>> +
>> + if (hweight32(status) > 1)
>> + fe = BIT(FIELD_GET(CXL_RAS_CAP_CONTROL_FE_MASK,
>> + p_err->cxl_ras.cap_control));
>> + else
>> + fe = status;
>> +
>> + trace_cxl_aer_uncorrectable_error(cxlds->cxlmd, status, fe,
>> + p_err->cxl_ras.header_log);
>> + }
>> +}
>> +EXPORT_SYMBOL_NS_GPL(cxl_trace_prot_err, CXL);
>> +
>> static void __cxl_handle_cor_ras(struct cxl_dev_state *cxlds,
>> void __iomem *ras_base)
>> {
>> diff --git a/drivers/cxl/cxlpci.h b/drivers/cxl/cxlpci.h
>> index 93992a1c8eec..0ba3215786e1 100644
>> --- a/drivers/cxl/cxlpci.h
>> +++ b/drivers/cxl/cxlpci.h
>> @@ -130,4 +130,7 @@ void read_cdat_data(struct cxl_port *port);
>> void cxl_cor_error_detected(struct pci_dev *pdev);
>> pci_ers_result_t cxl_error_detected(struct pci_dev *pdev,
>> pci_channel_state_t state);
>> +struct cxl_cper_prot_err;
>> +void cxl_trace_prot_err(struct cxl_dev_state *cxlds,
>> + struct cxl_cper_prot_err *p_err);
>> #endif /* __CXL_PCI_H__ */
>> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
>> index 74876c9835e8..3e3c36983686 100644
>> --- a/drivers/cxl/pci.c
>> +++ b/drivers/cxl/pci.c
>> @@ -1011,12 +1011,42 @@ static void cxl_handle_cper_event(enum cxl_event_type ev_type,
>> &uuid_null, &rec->event);
>> }
>>
>> +static void cxl_handle_prot_err(struct cxl_cper_prot_err *p_err)
>> +{
>> + struct pci_dev *pdev __free(pci_dev_put) = NULL;
>> + struct cxl_dev_state *cxlds;
>> + unsigned int devfn;
>> +
>> + devfn = PCI_DEVFN(p_err->device, p_err->function);
>> + pdev = pci_get_domain_bus_and_slot(p_err->segment,
>> + p_err->bus, devfn);
>> + if (!pdev)
>> + return;
>> +
>> + guard(device)(&pdev->dev);
>> + if (pdev->driver != &cxl_pci_driver)
>> + return;
>> +
>> + cxlds = pci_get_drvdata(pdev);
>> + if (!cxlds)
>> + return;
>> +
>> + if (((u64)p_err->upper_dw << 32 | p_err->lower_dw) != cxlds->serial)
>> + pr_warn("CPER-reported device serial number does not match expected value\n");
>
> Given that we are operating on a device, perhaps dev_warn(&pdev->dev, ...) may be better served.
Will fix.
Thanks,
Smita
[snip]
next prev parent reply other threads:[~2024-05-23 21:23 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-22 15:08 [PATCH 0/4] acpi/ghes, cper, cxl: Trace FW-First CXL Protocol Errors Smita Koralahalli
2024-05-22 15:08 ` [PATCH 1/4] efi/cper, cxl: Make definitions and structures global Smita Koralahalli
2024-05-22 17:28 ` Dave Jiang
2024-05-22 23:40 ` Alison Schofield
2024-06-07 15:14 ` Jonathan Cameron
2024-06-10 18:31 ` Smita Koralahalli
2024-05-22 15:08 ` [PATCH 2/4] acpi/ghes, efi/cper: Recognize and process CXL Protocol Errors Smita Koralahalli
2024-05-22 17:59 ` Dave Jiang
2024-05-23 21:19 ` Smita Koralahalli
2024-05-23 22:51 ` Dave Jiang
2024-05-23 0:03 ` Alison Schofield
2024-05-23 21:21 ` Smita Koralahalli
2024-06-07 15:26 ` Jonathan Cameron
2024-06-10 19:07 ` Smita Koralahalli
2024-05-22 15:08 ` [PATCH 3/4] acpi/ghes, cxl/pci: Trace FW-First " Smita Koralahalli
2024-05-22 18:05 ` Dave Jiang
2024-05-23 4:38 ` Alison Schofield
2024-05-23 21:23 ` Smita Koralahalli [this message]
2024-05-23 0:22 ` Alison Schofield
2024-05-23 21:35 ` Smita Koralahalli
2024-06-12 0:07 ` Dan Williams
2024-06-13 17:47 ` Smita Koralahalli
2024-06-24 22:04 ` Smita Koralahalli
2024-05-22 15:08 ` [PATCH 4/4] cxl/pci: Define a common function get_cxl_dev() Smita Koralahalli
2024-05-22 19:42 ` Dave Jiang
2024-05-23 21:37 ` Smita Koralahalli
2024-05-23 0:45 ` Alison Schofield
2024-06-07 15:40 ` Jonathan Cameron
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