Re: [PATCH 0/2] acpi: add support for CXL _OSC

["Verma, Vishal L" <vishal.l.verma@intel.com>]

On Fri, 2022-03-18 at 15:30 -0600, Vishal Verma wrote:
> Changes since v1[1]:
> - Update changelogs for both patches (Dan)
> - Fix support/control calculation to be based off CONFIG_MEMORY_FAILURE
>   (Dan)
> - Use defines instead of magic numbers in a few places in patch 2
>   (Jonathan)
> - Fix 'capbuf' array to be the correct 5 elements. ACPI previously had
>   '6' where only 3 were needed. With CXL capabilities, now, 5 are
>   needed. (Jonathan).
> - Fix a couple of uninitialized variable warnings reported by 0day/lkp.
> - Drop 'RFC' annotation for the set
> 
> Add support for using the CXL definition of _OSC where applicable, and
> negotiating CXL specific support and control bits.
> 
> Patch 1 adds the new CXL _OSC UUID, and uses it instead of the PCI UUID
> when a root port is CXL enabled. It provides a fallback method for
> CXL-1.1 platforms that may not implement the CXL-2.0 _OSC.
> 
> Patch 2 performs negotiation for the CXL specific _OSC support and
> control bits.
> 
> I've tested these against a custom qemu[2], which adds the CXL _OSC (in
> addition to other CXL support). Specifically, _OSC support is added
> here[3].
> 
> [1]: https://lore.kernel.org/linux-cxl/146514b2e5237a3c027239a75ace69e72671d4c8.camel@intel.com/T/#t
> [2]: https://gitlab.com/jic23/qemu/-/tree/cxl-v7-draft-2-for-test
> [3]: https://gitlab.com/jic23/qemu/-/commit/31c85054b84645dfbd9e9bb14aa35286141c14cf

Logistical question - Rafael, do you expect this to go through ACPI, or
should Dan pick it up to go through the CXL tree?

> 
> 
> Dan Williams (1):
>   PCI/ACPI: Use CXL _OSC instead of PCIe _OSC
> 
> Vishal Verma (1):
>   acpi/pci_root: negotiate CXL _OSC
> 
>  include/linux/acpi.h    |  14 +++
>  include/acpi/acpi_bus.h |   7 +-
>  drivers/acpi/pci_root.c | 204 ++++++++++++++++++++++++++++++++++------
>  3 files changed, 193 insertions(+), 32 deletions(-)
> 
> 
> base-commit: 74be98774dfbc5b8b795db726bd772e735d2edd4