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Commands that can take too long (over ~2 seconds) > can run in the background asynchronously (to the hardware). > > The driver will deal with such commands synchronously, blocking all > other incoming commands for a specified period of time, allowing > time-slicing the command such that the caller can send incremental > requests to avoid monopolizing the driver/device. This approach > makes the code simpler, where any out of sync (timeout) between the > driver and hardware is just disregarded as an invalid state until > the next successful submission. > > On devices where mbox interrupts are supported, this will still use > a poller that will wakeup in the specified wait intervals. The irq > handler will simply awake a blocked cmd, which is also safe vs a > task that is either waking (timing out) or already awoken. Similarly > any irq setup error during the probing falls back to polling, thus > avoids unnecessarily erroring out. > > Signed-off-by: Davidlohr Bueso > --- ...... > +static bool cxl_mbox_background_complete(struct cxl_dev_state *cxlds) > +{ > + u64 reg; > + > + reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_BG_CMD_STATUS_OFFSET); > + return FIELD_GET(CXLDEV_MBOX_BG_CMD_COMMAND_PCT_MASK, reg) == 100; > +} should using a MACRO to define '100' be better? > + > +static irqreturn_t cxl_pci_mbox_irq(int irq, void *id) > +{ > + struct cxl_dev_state *cxlds = id; > + > + /* spurious or raced with hw? */ > + if (!cxl_mbox_background_complete(cxlds)) { > + struct pci_dev *pdev = to_pci_dev(cxlds->dev); > + > + dev_warn(&pdev->dev, > + "Mailbox background operation IRQ but incomplete\n"); > + goto done; > + } > + > + /* short-circuit the wait in __cxl_pci_mbox_send_cmd() */ > + wake_up(&mbox_wait); > +done: > + return IRQ_HANDLED; > +} > + > /** > * __cxl_pci_mbox_send_cmd() - Execute a mailbox command > * @cxlds: The device state to communicate with. > @@ -178,7 +206,59 @@ static int __cxl_pci_mbox_send_cmd(struct cxl_dev_state *cxlds, > mbox_cmd->return_code = > FIELD_GET(CXLDEV_MBOX_STATUS_RET_CODE_MASK, status_reg); > > - if (mbox_cmd->return_code != CXL_MBOX_CMD_RC_SUCCESS) { > + /* > + * Handle the background command in a synchronous manner. > + * > + * All other mailbox commands will serialize/queue on the mbox_mutex, > + * which we currently hold. Furthermore this also guarantees that > + * cxl_mbox_background_complete() checks are safe amongst each other, > + * in that no new bg operation can occur in between. > + * > + * Background operations are timesliced in accordance with the nature > + * of the command. In the event of timeout, the mailbox state is > + * indeterminate until the next successful command submission and the > + * driver can get back in sync with the hardware state. > + */ > + if (mbox_cmd->return_code == CXL_MBOX_CMD_RC_BACKGROUND) { > + u64 bg_status_reg; > + int i; > + > + dev_dbg(dev, "Mailbox background operation (0x%04x) started\n", > + mbox_cmd->opcode); > + > + for (i = 0; i < mbox_cmd->poll_count; i++) { > + int ret = wait_event_interruptible_timeout( > + mbox_wait, cxl_mbox_background_complete(cxlds), > + msecs_to_jiffies(mbox_cmd->poll_interval)); > + if (ret > 0) > + break; > + > + /* interrupted by a signal */ > + if (ret < 0) > + return ret; > + } > + > + if (!cxl_mbox_background_complete(cxlds)) { > + u64 md_status = > + readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET); > + > + cxl_cmd_err(cxlds->dev, mbox_cmd, md_status, > + "background timeout"); > + return -ETIMEDOUT; > + } > + > + bg_status_reg = readq(cxlds->regs.mbox + > + CXLDEV_MBOX_BG_CMD_STATUS_OFFSET); > + mbox_cmd->return_code = > + FIELD_GET(CXLDEV_MBOX_BG_CMD_COMMAND_RC_MASK, > + bg_status_reg); > + dev_dbg(dev, > + "Mailbox background operation (0x%04x) completed\n", > + mbox_cmd->opcode); > + } > + > + if (mbox_cmd->return_code != CXL_MBOX_CMD_RC_SUCCESS && > + mbox_cmd->return_code != CXL_MBOX_CMD_RC_BACKGROUND) { > dev_dbg(dev, "Mailbox operation had an error: %s\n", > cxl_mbox_cmd_rc2str(mbox_cmd)); > return 0; /* completed but caller must check return_code */ why does here only handle failure cases for non-background command? Maybe I missed something, I think that we need to do same thing here for background command. Thanks Ming > @@ -224,6 +304,7 @@ static int cxl_pci_setup_mailbox(struct cxl_dev_state *cxlds) > const int cap = readl(cxlds->regs.mbox + CXLDEV_MBOX_CAPS_OFFSET); > unsigned long timeout; > u64 md_status; > + int rc, irq; > > timeout = jiffies + mbox_ready_timeout * HZ; > do { > @@ -272,6 +353,27 @@ static int cxl_pci_setup_mailbox(struct cxl_dev_state *cxlds) > dev_dbg(cxlds->dev, "Mailbox payload sized %zu", > cxlds->payload_size); > > + if (cap & CXLDEV_MBOX_CAP_BG_CMD_IRQ) { > + struct pci_dev *pdev = to_pci_dev(cxlds->dev); > + > + irq = pci_irq_vector(pdev, > + FIELD_GET(CXLDEV_MBOX_CAP_IRQ_MSGNUM_MASK, cap)); > + if (irq < 0) > + goto mbox_poll; > + > + rc = devm_request_irq(cxlds->dev, irq, cxl_pci_mbox_irq, > + IRQF_SHARED, "mailbox", cxlds); > + if (rc) > + goto mbox_poll; > + > + writel(CXLDEV_MBOX_CTRL_BG_CMD_IRQ, > + cxlds->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET); > + > + return 0; > + } > + > +mbox_poll: > + dev_dbg(cxlds->dev, "Mailbox interrupts are unsupported"); > return 0; > } >