public inbox for linux-cxl@vger.kernel.org
 help / color / mirror / Atom feed
From: "Bowman, Terry" <terry.bowman@amd.com>
To: Dan Williams <dan.j.williams@intel.com>,
	dave@stgolabs.net, jonathan.cameron@huawei.com,
	dave.jiang@intel.com, alison.schofield@intel.com,
	bhelgaas@google.com, shiju.jose@huawei.com, ming.li@zohomail.com,
	Smita.KoralahalliChannabasappa@amd.com, rrichter@amd.com,
	dan.carpenter@linaro.org, PradeepVineshReddy.Kodamati@amd.com,
	lukas@wunner.de, Benjamin.Cheatham@amd.com,
	sathyanarayanan.kuppuswamy@linux.intel.com,
	linux-cxl@vger.kernel.org, vishal.l.verma@intel.com,
	alucerop@amd.com, ira.weiny@intel.com
Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v16 01/10] PCI/AER: Introduce AER-CXL Kfifo
Date: Mon, 30 Mar 2026 10:15:39 -0500	[thread overview]
Message-ID: <ed968225-632f-4998-809e-c515d28852dd@amd.com> (raw)
In-Reply-To: <69c720adadcd4_1b0cc6100b4@dwillia2-mobl4.notmuch>

Hi Dan

On 3/27/2026 7:28 PM, Dan Williams wrote:
> Terry Bowman wrote:
>> CXL virtual hierarchy (VH) RAS handling for CXL Port devices will be added
>> soon. This requires a notification mechanism for the AER driver to share
>> the AER interrupt with the CXL driver. The notification will be used as an
>> indication for the CXL drivers to handle and log the CXL RAS errors.
>>
>> Note, 'CXL protocol error' terminology will refer to CXL VH and not
>> CXL RCH errors unless specifically noted going forward.
>>
>> Introduce a new file in the AER driver to handle the CXL protocol errors
>> named pci/pcie/aer_cxl_vh.c.
>>
>> Add a kfifo work queue to be used by the AER and CXL drivers. The AER
>> driver will be the sole kfifo producer adding work and the cxl_core will be
>> the sole kfifo consumer removing work. Add the boilerplate kfifo support.
>> Encapsulate the kfifo, RW semaphore, and work pointer in a single structure.
>>
>> Add CXL work queue handler registration functions in the AER driver. Export
>> the functions allowing CXL driver to access. Implement registration
>> functions for the CXL driver to assign or clear the work handler function.
>>
>> Introduce 'struct cxl_proto_err_work_data' to serve as the kfifo work data.
>> This will contain a reference to the PCI error source device and the error
>> severity. This will be used when the work is dequeued by the cxl_core driver.
>>
>> Introduce cxl_forward_error() to take a given CXL protocol error and add it
>> to a work structure before pushing onto the AER-CXL kfifo. This function
>> takes a reference count increment of the PCI device. The kfifo consumer is
>> responsible for reference decrementing. If there is an error on adding the
>> work then this function must decrement the reference count.
>>
>> Synchronize accesses to the work function pointer during registration,
>> deregistration, enqueue, and dequeue. Further synchronization fixes will
>> be added in the following patch.
>>
>> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
>> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
>> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
>>
>> ---
>>
>> Changes in v15->v16:
>> - Add pci_dev_put() and comment in pci_dev_get() (Dan)
>> - /rw_sema/rwsema/ (Dan)
> 
> To be clear I asked for s/rw_sema/rwsem/, easy enough to fix up.
> 
> [..]
>>  drivers/pci/pcie/aer_cxl_vh.c | 87 +++++++++++++++++++++++++++++++++++
>>  create mode 100644 drivers/pci/pcie/aer_cxl_vh.c
> 
> Bjorn, do you want this additional burden to fall on PCI core reviewers,
> or perhaps make this change to the "COMPUTE EXPRESS LINK (CXL)" entry?
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 61bf550fd37c..1b46ac52839d 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -6438,6 +6438,8 @@ S:        Maintained
>  F:     Documentation/driver-api/cxl
>  F:     Documentation/userspace-api/fwctl/fwctl-cxl.rst
>  F:     drivers/cxl/
> +F:     drivers/pci/pcie/aer_cxl_rch.c
> +F:     drivers/pci/pcie/aer_cxl_vh.c
>  F:     include/cxl/
>  F:     include/uapi/linux/cxl_mem.h
>  F:     tools/testing/cxl/
> 
> [..]
>> diff --git a/drivers/pci/pcie/aer_cxl_vh.c b/drivers/pci/pcie/aer_cxl_vh.c
>> new file mode 100644
>> index 000000000000..7e2bc1894395
>> --- /dev/null
>> +++ b/drivers/pci/pcie/aer_cxl_vh.c
> [..]
>> +void cxl_register_proto_err_work(struct work_struct *work)
>> +{
>> +	guard(rwsem_write)(&cxl_proto_err_kfifo.rwsema);
>> +	cxl_proto_err_kfifo.work = work;
>> +}
>> +EXPORT_SYMBOL_NS_GPL(cxl_register_proto_err_work, "CXL");
> 
> Probably more appropriate to make all of these exports:
> 
> EXPORT_SYMBOL_FOR_MODULES(..., "cxl_core");
> 
>> +void cxl_unregister_proto_err_work(void)
>> +{
>> +	guard(rwsem_write)(&cxl_proto_err_kfifo.rwsema);
>> +	cxl_proto_err_kfifo.work = NULL;
> 
> Where is the work cancellation for this?
> 
> Oh, patch2 has it, that should really be in this patch. I would fold in
> that fix... but it needs a bit more, see below.
> 

I thought that was requested to combine with CPER change in following patch 
but unable to find the comment while searching. This needs to be squashed. 
Thanks.

>> +}
>> +EXPORT_SYMBOL_NS_GPL(cxl_unregister_proto_err_work, "CXL");
>> +
>> +int cxl_proto_err_kfifo_get(struct cxl_proto_err_work_data *wd)
>> +{
>> +	guard(rwsem_read)(&cxl_proto_err_kfifo.rwsema);
>> +	return kfifo_get(&cxl_proto_err_kfifo.fifo, wd);
> 
> I just realized that this reacquires the semaphore on every invocation,
> and leaks stranded references.
> 
> How about something like below which I think also address Jonathan's
> concern about the awkwardness of the consumer needing to manage the
> producer's refcounting. With this change all the refcounting is internal
> to the producer, and it is properly cleaned up as to not leave PCI
> devices with dangling refcounts if someone unloads the CXL core. The
> rule is errors are dropped on the floor when the work handler is
> missing, and any errors that race unregistration are also dropped on the
> floor.
> 

Yes, below prevents an orphaned reference count by using a cancel function.
Thanks.

> diff --git a/drivers/pci/pcie/aer_cxl_vh.c b/drivers/pci/pcie/aer_cxl_vh.c
> index 348374859ee4..cc4e443511d0 100644
> --- a/drivers/pci/pcie/aer_cxl_vh.c
> +++ b/drivers/pci/pcie/aer_cxl_vh.c
> @@ -72,16 +72,43 @@ void cxl_register_proto_err_work(struct work_struct *work)
>  }
>  EXPORT_SYMBOL_FOR_MODULES(cxl_register_proto_err_work, "cxl_core");
>  
> -void cxl_unregister_proto_err_work(void)
> +static struct work_struct *cancel_cxl_proto_err(void)
>  {
> +	struct work_struct *work;
> +	struct cxl_proto_err_work_data wd;
> +
>  	guard(rwsem_write)(&cxl_proto_err_kfifo.rwsem);
> +	work = cxl_proto_err_kfifo.work;
>  	cxl_proto_err_kfifo.work = NULL;
> +	while (kfifo_get(&cxl_proto_err_kfifo.fifo, &wd)) {
> +		dev_err_ratelimited(&wd.pdev->dev,
> +				    "AER-CXL error report canceled\n");
> +		pci_dev_put(wd.pdev);
> +	}
> +	return work;
> +}
> +
> +void cxl_unregister_proto_err_work(void)
> +{
> +	struct work_struct *work = cancel_cxl_proto_err();
> +
> +	if (work)
> +		cancel_work_sync(work);
>  }
>  EXPORT_SYMBOL_FOR_MODULES(cxl_unregister_proto_err_work, "cxl_core");
>  
> -int cxl_proto_err_kfifo_get(struct cxl_proto_err_work_data *wd)
> +int for_each_cxl_proto_err(struct cxl_proto_err_work_data *wd, int (*fn)(struct cxl_proto_err_work_data *))
>  {
> +	int rc;
> +
>  	guard(rwsem_read)(&cxl_proto_err_kfifo.rwsem);
> -	return kfifo_get(&cxl_proto_err_kfifo.fifo, wd);
> +	while (kfifo_get(&cxl_proto_err_kfifo.fifo, wd)) {
> +		rc = fn(wd);
> +		pci_dev_put(wd->pdev);
> +		if (rc)
> +			return rc;
> +	}
> +
> +	return 0;
>  }
> -EXPORT_SYMBOL_FOR_MODULES(cxl_proto_err_kfifo_get, "cxl_core");
> +EXPORT_SYMBOL_FOR_MODULES(for_each_cxl_proto_err, "cxl_core");
> diff --git a/include/linux/aer.h b/include/linux/aer.h
> index f351e41dd979..8d60fd97ed67 100644
> --- a/include/linux/aer.h
> +++ b/include/linux/aer.h
> @@ -79,12 +79,19 @@ static inline void pci_aer_unmask_internal_errors(struct pci_dev *dev) { }
>  struct work_struct;
>  
>  #ifdef CONFIG_CXL_RAS
> -int cxl_proto_err_kfifo_get(struct cxl_proto_err_work_data *wd);
>  void cxl_register_proto_err_work(struct work_struct *work);
> +int for_each_cxl_proto_err(struct cxl_proto_err_work_data *wd,
> +			   int (*fn)(struct cxl_proto_err_work_data *));
>  void cxl_unregister_proto_err_work(void);
>  #else
>  static inline int cxl_proto_err_kfifo_get(struct cxl_proto_err_work_data *wd) { return 0; }
>  static inline void cxl_register_proto_err_work(struct work_struct *work) { }
> +static inline int
> +for_each_cxl_proto_err(struct cxl_proto_err_work_data *wd,
> +		       int (*fn)(struct cxl_proto_err_work_data *))
> +{
> +	return 0;
> +}
>  static inline void cxl_unregister_proto_err_work(void) { }
>  #endif


  parent reply	other threads:[~2026-03-30 15:15 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-02 20:36 [PATCH v16 00/10] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2026-03-02 20:36 ` [PATCH v16 01/10] PCI/AER: Introduce AER-CXL Kfifo Terry Bowman
2026-03-09 12:20   ` Jonathan Cameron
2026-03-28  0:28   ` Dan Williams
2026-03-29 20:33     ` Dan Williams
2026-03-30 15:33       ` Bowman, Terry
2026-03-30 15:15     ` Bowman, Terry [this message]
2026-03-02 20:36 ` [PATCH v16 02/10] PCI/CXL: Update unregistration for AER-CXL and CPER-CXL kfifos Terry Bowman
2026-03-09 12:27   ` Jonathan Cameron
2026-03-11 15:03     ` Bowman, Terry
2026-03-09 18:30   ` Dave Jiang
2026-03-29 21:27   ` Dan Williams
2026-03-02 20:36 ` [PATCH v16 03/10] cxl: Update CXL Endpoint tracing Terry Bowman
2026-03-29 21:44   ` Dan Williams
2026-03-02 20:36 ` [PATCH v16 04/10] PCI/ERR: Introduce PCI_ERS_RESULT_PANIC Terry Bowman
2026-03-29 21:57   ` Dan Williams
2026-03-30 16:40     ` Bowman, Terry
2026-03-02 20:36 ` [PATCH v16 05/10] PCI: Establish common CXL Port protocol error flow Terry Bowman
2026-03-09 12:45   ` [PATCH v16 05/10] PCI: Establish common CXL Port protocol error flowUIRE Jonathan Cameron
2026-03-30  0:08   ` [PATCH v16 05/10] PCI: Establish common CXL Port protocol error flow Dan Williams
2026-03-02 20:36 ` [PATCH v16 06/10] PCI/CXL: Add RCH support to CXL handlers Terry Bowman
2026-03-09 14:00   ` Jonathan Cameron
2026-03-11 15:21     ` Bowman, Terry
2026-03-30  0:31   ` Dan Williams
2026-03-30 17:02     ` Bowman, Terry
2026-03-02 20:36 ` [PATCH v16 07/10] cxl: Update error handlers to support CXL Port devices Terry Bowman
2026-03-09 14:05   ` Jonathan Cameron
2026-03-11 15:37     ` Bowman, Terry
2026-03-12 13:05       ` Jonathan Cameron
2026-03-30  1:07   ` Dan Williams
2026-03-30 16:31     ` Bowman, Terry
2026-03-31  2:11       ` Dan Williams
2026-03-02 20:36 ` [PATCH v16 08/10] cxl: Update Endpoint AER uncorrectable handler Terry Bowman
2026-03-09 14:12   ` Jonathan Cameron
2026-03-11 15:58     ` Bowman, Terry
2026-03-30  1:22   ` Dan Williams
2026-03-31 18:52     ` Bowman, Terry
2026-03-31 19:23       ` Dan Williams
2026-03-31 19:52         ` Bowman, Terry
2026-04-02  3:39           ` Dan Williams
2026-03-02 20:36 ` [PATCH v16 09/10] cxl: Remove Endpoint AER correctable handler Terry Bowman
2026-03-09 14:13   ` Jonathan Cameron
2026-03-09 18:55   ` Dave Jiang
2026-03-30  1:24   ` Dan Williams
2026-03-02 20:36 ` [PATCH v16 10/10] cxl: Enable CXL protocol error reporting Terry Bowman
2026-03-30  1:41   ` Dan Williams
2026-03-31 13:31     ` Bowman, Terry
2026-03-31 19:16       ` Dan Williams
2026-03-31 20:50         ` Bowman, Terry
2026-03-31 21:12         ` Bowman, Terry

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ed968225-632f-4998-809e-c515d28852dd@amd.com \
    --to=terry.bowman@amd.com \
    --cc=Benjamin.Cheatham@amd.com \
    --cc=PradeepVineshReddy.Kodamati@amd.com \
    --cc=Smita.KoralahalliChannabasappa@amd.com \
    --cc=alison.schofield@intel.com \
    --cc=alucerop@amd.com \
    --cc=bhelgaas@google.com \
    --cc=dan.carpenter@linaro.org \
    --cc=dan.j.williams@intel.com \
    --cc=dave.jiang@intel.com \
    --cc=dave@stgolabs.net \
    --cc=ira.weiny@intel.com \
    --cc=jonathan.cameron@huawei.com \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lukas@wunner.de \
    --cc=ming.li@zohomail.com \
    --cc=rrichter@amd.com \
    --cc=sathyanarayanan.kuppuswamy@linux.intel.com \
    --cc=shiju.jose@huawei.com \
    --cc=vishal.l.verma@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox