From: Dave Jiang <dave.jiang@intel.com>
To: Alison Schofield <alison.schofield@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jic23@kernel.org>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>, Dan Williams <djbw@kernel.org>
Cc: linux-cxl@vger.kernel.org
Subject: Re: [PATCH v2] Documentation: Update the CXL Maturity Map
Date: Fri, 17 Apr 2026 15:26:19 -0700 [thread overview]
Message-ID: <f55fd271-1951-4a2d-9d3a-e84e165ab33c@intel.com> (raw)
In-Reply-To: <20260417201300.3438995-1-alison.schofield@intel.com>
On 4/17/26 1:12 PM, Alison Schofield wrote:
> Here are a few updates to scores of existing items.
>
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
With the expectation of Terry's protocol error series merged for 7.2.
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
>
> Changes in v2:
> - Update after walkthru w DaveJ
>
>
> Documentation/driver-api/cxl/maturity-map.rst | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst
> index 282c1102dd81..1ba528c82755 100644
> --- a/Documentation/driver-api/cxl/maturity-map.rst
> +++ b/Documentation/driver-api/cxl/maturity-map.rst
> @@ -52,12 +52,12 @@ in place, but there are several corner cases that are pending closure.
> * [2] CXL Window Enumeration
>
> * [2] :ref:`Extended-linear memory-side cache <extended-linear>`
> - * [0] Low Memory-hole
> + * [X] Low Memory-hole
> * [X] Hetero-interleave
>
> * [2] Switch Enumeration
>
> - * [0] CXL register enumeration link-up dependency
> + * [2] CXL register enumeration link-up dependency
>
> * [2] HDM Decoder Configuration
>
> @@ -78,7 +78,7 @@ in place, but there are several corner cases that are pending closure.
> * [2] Hotplug
> (see CXL Window Enumeration)
>
> - * [0] Handle Soft Reserved conflicts
> + * [2] Handle Soft Reserved conflicts
>
> * [0] :ref:`RCH link status <rch-link-status>`
> * [0] Fabrics / G-FAM (chapter 7)
> @@ -95,15 +95,15 @@ mainly caused by the enumeration corner cases above.
> * [2] Component events (FFM)
> * [1] Endpoint protocol errors (OS)
> * [1] Endpoint protocol errors (FFM)
> -* [0] Switch protocol errors (OS)
> +* [1] Switch protocol errors (OS)
> * [1] Switch protocol errors (FFM)
> * [2] DPA->HPA Address translation
>
> - * [1] XOR Interleave translation
> + * [2] XOR Interleave translation
> (see CXL Window Enumeration)
>
> * [1] Memory Failure coordination
> -* [0] Scrub control
> +* [1] Scrub control
> * [2] ACPI error injection EINJ
>
> * [0] EINJ v2
> @@ -112,8 +112,8 @@ mainly caused by the enumeration corner cases above.
> * [2] Native error injection
> * [3] RCH error handling
> * [1] VH error handling
> -* [0] PPR
> -* [0] Sparing
> +* [1] PPR
> +* [1] Sparing
> * [0] Device built in test
>
>
>
> base-commit: 028ef9c96e96197026887c0f092424679298aae8
next prev parent reply other threads:[~2026-04-17 22:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-17 20:12 [PATCH v2] Documentation: Update the CXL Maturity Map Alison Schofield
2026-04-17 22:26 ` Dave Jiang [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-05-12 21:42 alison.schofield
2025-05-12 22:37 ` Dave Jiang
2025-05-13 22:21 ` Dave Jiang
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