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From: Alejandro Lucero Palau <alucerop@amd.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	alejandro.lucero-palau@amd.com
Cc: linux-cxl@vger.kernel.org, netdev@vger.kernel.org,
	dan.j.williams@intel.com, edward.cree@amd.com,
	davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com,
	edumazet@google.com, dave.jiang@intel.com
Subject: Re: [PATCH v9 03/27] cxl: add capabilities field to cxl_dev_state and cxl_port
Date: Fri, 3 Jan 2025 07:20:48 +0000	[thread overview]
Message-ID: <ffbca9f2-80fa-530a-9ec1-9f811ee61e38@amd.com> (raw)
In-Reply-To: <20250102143656.000061c9@huawei.com>


On 1/2/25 14:36, Jonathan Cameron wrote:
> On Mon, 30 Dec 2024 21:44:21 +0000
> <alejandro.lucero-palau@amd.com> wrote:
>
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Type2 devices have some Type3 functionalities as optional like an mbox
>> or an hdm decoder, and CXL core needs a way to know what an CXL accelerator
>> implements.
>>
>> Add a new field to cxl_dev_state for keeping device capabilities as
>> discovered during initialization. Add same field to cxl_port as registers
>> discovery is also used during port initialization.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> Reviewed-by: Ben Cheatham <benjamin.cheatham@amd.com>
>> Reviewed-by: Fan Ni <fan.ni@samsung.com>
> Comment in thread on v8.  I don't see a reason to have any specific
> bitmap length - just use a final entry in the enum without a value set
> to let us know how long it actually is.


I could do this but it implies to clear/zeroing the bitmaps with the 
final entry value and to mask bitmaps with that when comparing them.

I tried to avoid the masking, and it led to that use of sizeof and then 
CXL_MAX_CAPS=64.


> Using the bit / bitmap functions should work fine without constraining
> that to any particular value - also allowing for greater than 64 entries
> with no need to fix up call sites etc.
>
>
>> diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c
>> index 59cb35b40c7e..144ae9eb6253 100644
>> --- a/drivers/cxl/core/regs.c
>> +++ b/drivers/cxl/core/regs.c
>> @@ -4,6 +4,7 @@
>> +enum cxl_dev_cap {
>> +	/* capabilities from Component Registers */
>> +	CXL_DEV_CAP_RAS,
>> +	CXL_DEV_CAP_HDM,
>> +	/* capabilities from Device Registers */
>> +	CXL_DEV_CAP_DEV_STATUS,
>> +	CXL_DEV_CAP_MAILBOX_PRIMARY,
>> +	CXL_DEV_CAP_MEMDEV,
>> +	CXL_MAX_CAPS = 64
> As in v8. I'm not seeing any reason for this.  If you need
> a bitmap to be a particular number of unsigned longs, then that
> code should be fixed. (only exception being compile time constant
> bitmaps where this is tricky to do!)
>
> Obviously I replied with that to v8 after you posted this
> so time machines aside no way you could have acted on it yet.
>
>
> Jonathan
>
>> +};
>> +
>>   struct cxl_dev_state;
>>   struct device;
>>   

  reply	other threads:[~2025-01-03  7:21 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-30 21:44 [PATCH v9 00/27] cxl: add type2 device basic support alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 01/27] " alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 02/27] sfc: add cxl support using new CXL API alejandro.lucero-palau
2025-01-02 14:32   ` Jonathan Cameron
2025-01-03  7:21     ` Alejandro Lucero Palau
2025-01-18  1:30   ` Dan Williams
2025-01-20 14:35     ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 03/27] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2025-01-02 14:36   ` Jonathan Cameron
2025-01-03  7:20     ` Alejandro Lucero Palau [this message]
2025-01-03 10:50       ` Jonathan Cameron
2025-01-03 11:50         ` Alejandro Lucero Palau
2025-01-18  1:37   ` Dan Williams
2025-01-20 14:58     ` Alejandro Lucero Palau
2025-01-21 22:39       ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 04/27] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2025-01-02 14:38   ` Jonathan Cameron
2025-01-18  1:40   ` Dan Williams
2025-01-20 15:14     ` Alejandro Lucero Palau
2025-01-21 22:42       ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 05/27] cxl: move pci generic code alejandro.lucero-palau
2025-01-02 14:41   ` Jonathan Cameron
2025-01-18  1:43   ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 06/27] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2025-01-02 14:53   ` Jonathan Cameron
2025-01-03  7:23     ` Alejandro Lucero Palau
2025-01-18  1:51   ` Dan Williams
2025-01-20 15:40     ` Alejandro Lucero Palau
2025-01-21 22:51       ` Dan Williams
2025-01-22  9:05         ` Alejandro Lucero Palau
2025-01-22 23:34           ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 07/27] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2025-01-02 14:54   ` Jonathan Cameron
2025-01-18  1:53   ` Dan Williams
2025-01-20 15:44     ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 08/27] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 09/27] sfc: request cxl ram resource alejandro.lucero-palau
2025-01-18  1:58   ` Dan Williams
2025-01-20 16:00     ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 10/27] resource: harden resource_contains alejandro.lucero-palau
2025-01-18  2:03   ` Dan Williams
2025-01-20 16:10     ` Alejandro Lucero Palau
2025-01-20 16:16       ` Alejandro Lucero Palau
2025-01-20 16:26         ` Alejandro Lucero Palau
2025-01-21 20:38           ` Alison Schofield
2025-01-22  9:37             ` Alejandro Lucero Palau
2025-01-21 23:01       ` Dan Williams
2025-01-22  9:41         ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 11/27] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 12/27] sfc: set cxl media ready alejandro.lucero-palau
2025-01-02 14:55   ` Jonathan Cameron
2024-12-30 21:44 ` [PATCH v9 13/27] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2025-01-02 15:01   ` Jonathan Cameron
2025-01-03  7:24     ` Alejandro Lucero Palau
2025-01-18  2:27   ` Dan Williams
2025-01-20 17:15     ` Alejandro Lucero Palau
2025-01-21 23:11       ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 14/27] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-01-18  2:41   ` Dan Williams
2025-01-20 17:27     ` Alejandro Lucero Palau
2025-01-21 23:22       ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 15/27] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-01-02 15:10   ` Jonathan Cameron
2025-01-03  7:55     ` Alejandro Lucero Palau
2025-01-18  3:02   ` Dan Williams
2025-01-20 18:16     ` Alejandro Lucero Palau
2025-01-21 14:00       ` Alejandro Lucero Palau
2025-01-21 23:44         ` Dan Williams
2025-01-22  9:26           ` Alejandro Lucero Palau
2025-01-21 23:35       ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 16/27] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 17/27] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2025-01-02 15:15   ` Jonathan Cameron
2025-01-03  7:58     ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 18/27] sfc: get endpoint decoder alejandro.lucero-palau
2025-01-02 15:17   ` Jonathan Cameron
2025-01-02 16:38   ` Edward Cree
2024-12-30 21:44 ` [PATCH v9 19/27] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 20/27] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 21/27] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 22/27] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2025-01-02 15:22   ` Jonathan Cameron
2025-01-03  8:16     ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 23/27] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2025-01-02 15:24   ` Jonathan Cameron
2024-12-30 21:44 ` [PATCH v9 24/27] sfc: create cxl region alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 25/27] cxl: add function for obtaining region range alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 26/27] sfc: update MCDI protocol headers alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 27/27] sfc: support pio mapping based on cxl alejandro.lucero-palau

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