Re: [PATCH] cxl/port: Unmask AER internal errors for VH endpoints

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] cxl/port: unreachable pci_aer_unmask_internal_errors() in cxl_ras_unmask()
--

commit d1558f7f8a341adaa60fba2aa3820ba77f94d9bf
Author: Richard Cheng <icheng@nvidia.com>

cxl/port: Unmask AER internal errors for VH endpoints

This commit unmasks PCIe AER internal errors during CXL endpoint RAS setup
for Virtual Host (VH) devices and exports pci_aer_unmask_internal_errors()
to the cxl_port module.

> diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
> index c12fd0b89883a..2da8fd9e33a39 100644
> --- a/drivers/cxl/port.c
> +++ b/drivers/cxl/port.c
> @@ -118,6 +118,13 @@ static int cxl_ras_unmask(struct cxl_port *port)
>  			orig_val, val);
>  	}
>  
> +	/*
> +	 * RCH errors are reported by the RCEC. VH endpoints report CXL
> +	 * protocol errors as PCIe AER internal errors.
> +	 */
> +	if (!is_cxl_restricted(pdev))
> +		pci_aer_unmask_internal_errors(pdev);

[Severity: High]
Can pci_aer_unmask_internal_errors(pdev) ever be reached here?

The only caller of cxl_ras_unmask() is cxl_endpoint_port_probe(), where
port->uport_dev is the struct cxl_memdev device on cxl_bus_type rather than
the underlying struct pci_dev (which is port->uport_dev->parent):

drivers/cxl/port.c:devm_cxl_add_endpoint() {
	...
	endpoint = devm_cxl_add_port(host, &cxlmd->dev, CXL_RESOURCE_NONE,
				     parent_dport);
	...
}

drivers/cxl/port.c:cxl_endpoint_port_probe() {
	struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev);
	...
	devm_cxl_port_ras_setup(port);
	if (cxl_ras_unmask(port))
		dev_dbg(&port->dev, "failed to unmask RAS interrupts\n");
	...
}

At the start of cxl_ras_unmask(), port->uport_dev is checked with
dev_is_pci():

drivers/cxl/port.c:cxl_ras_unmask() {
	...
	if (!dev_is_pci(port->uport_dev))
		return 0;
	pdev = to_pci_dev(port->uport_dev);
	...
}

Because port->uport_dev is &cxlmd->dev on cxl_bus_type,
dev_is_pci(port->uport_dev) always evaluates to false, causing
cxl_ras_unmask() to return 0 immediately without unmasking the CXL RAS
registers or calling pci_aer_unmask_internal_errors(pdev).

Should cxl_ras_unmask() inspect port->uport_dev->parent (similar to how
read_cdat_data() in drivers/cxl/core/pci.c checks uport->parent when
is_cxl_memdev(uport) is true) to obtain the endpoint's struct pci_dev?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261030095951.46080-1-icheng@nvidia.com?part=1