From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jingoo Han" Subject: Re: [PATCH v7 6/9] PCI: dwc: Define maximum number of vectors Date: Tue, 24 Apr 2018 10:39:20 -0400 Message-ID: <000001d3dbda$0a135930$1e3a0b90$@gmail.com> References: <6b2c7ec1835cf422af5703aa14c99dbad8c6ffb8.1524577064.git.gustavo.pimentel@synopsys.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <6b2c7ec1835cf422af5703aa14c99dbad8c6ffb8.1524577064.git.gustavo.pimentel@synopsys.com> Content-Language: en-us Sender: linux-kernel-owner@vger.kernel.org To: 'Gustavo Pimentel' , bhelgaas@google.com, lorenzo.pieralisi@arm.com, Joao.Pinto@synopsys.com, kishon@ti.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org List-Id: devicetree@vger.kernel.org On Tuesday, April 24, 2018 9:45 AM, Gustavo Pimentel wrote: > > Adds a callback that defines the maximum number of vectors that can be use > by the Root Complex. > > Since this is a parameter associated to each SoC IP setting, makes sense > to > be configurable and easily visible to future modifications. > > The designware IP supports a maximum of 256 vectors. > > Signed-off-by: Gustavo Pimentel > Acked-by: Joao Pinto Acked-by: Jingoo Han Best regards, Jingoo Han > --- > Change v1->v2: > - Nothing changed, just to follow the patch set version. > Change v2->v3: > - Nothing changed, just to follow the patch set version. > Changes v3->v4: > - Nothing changed, just to follow the patch set version. > Changes v4->v5: > - Nothing changed, just to follow the patch set version. > Changes v5->v6: > - Nothing changed, just to follow the patch set version. > Changes v6->v7: > - Nothing changed, just to follow the patch set version. > > drivers/pci/dwc/pcie-designware-plat.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/pci/dwc/pcie-designware-plat.c > b/drivers/pci/dwc/pcie-designware-plat.c > index efc315c..5937fed 100644 > --- a/drivers/pci/dwc/pcie-designware-plat.c > +++ b/drivers/pci/dwc/pcie-designware-plat.c > @@ -48,8 +48,14 @@ static int dw_plat_pcie_host_init(struct pcie_port *pp) > return 0; > } > > +static void dw_plat_set_num_vectors(struct pcie_port *pp) > +{ > + pp->num_vectors = MAX_MSI_IRQS; > +} > + > static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = { > .host_init = dw_plat_pcie_host_init, > + .set_num_vectors = dw_plat_set_num_vectors, > }; > > static int dw_plat_pcie_establish_link(struct dw_pcie *pci) > -- > 2.7.4 >