RE: [PATCH v3 2/4] arm64: dts: fix HSI2C drive strength values as per FSD HW UM

["Alim Akhtar" <alim.akhtar@samsung.com>]

>-----Original Message-----
>From: Padmanabhan Rajanbabu [mailto:p.rajanbabu@samsung.com]
>Sent: Thursday, October 13, 2022 4:10 PM
>To: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
>alim.akhtar@samsung.com; chanho61.park@samsung.com;
>linus.walleij@linaro.org; pankaj.dubey@samsung.com
>Cc: devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
>samsung-soc@vger.kernel.org; Padmanabhan Rajanbabu
><p.rajanbabu@samsung.com>
>Subject: [PATCH v3 2/4] arm64: dts: fix HSI2C drive strength values as per FSD
>HW UM
>
>Drive strength values used for HSI2C is not reflecting the default values
>recommended by FSD HW UM.
>
>Fix the drive strength values for HSI2C, thereby ensuring that the existing
>device tree file is using default drive strength values recommended by UM for
>FSD SoC.
>
>Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support")
>Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com>
>---

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>


> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>index 4e151d419909..09a492b1fd6e 100644
>--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>@@ -253,56 +253,56 @@
> 		samsung,pins = "gpb0-0", "gpb0-1";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV1>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	hs_i2c1_bus: hs-i2c1-bus-pins {
> 		samsung,pins = "gpb0-2", "gpb0-3";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV1>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	hs_i2c2_bus: hs-i2c2-bus-pins {
> 		samsung,pins = "gpb0-4", "gpb0-5";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV1>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	hs_i2c3_bus: hs-i2c3-bus-pins {
> 		samsung,pins = "gpb0-6", "gpb0-7";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV1>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	hs_i2c4_bus: hs-i2c4-bus-pins {
> 		samsung,pins = "gpb1-0", "gpb1-1";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV1>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	hs_i2c5_bus: hs-i2c5-bus-pins {
> 		samsung,pins = "gpb1-2", "gpb1-3";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV1>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	hs_i2c6_bus: hs-i2c6-bus-pins {
> 		samsung,pins = "gpb1-4", "gpb1-5";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV1>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	hs_i2c7_bus: hs-i2c7-bus-pins {
> 		samsung,pins = "gpb1-6", "gpb1-7";
> 		samsung,pin-function = <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud = <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv = <FSD_PIN_DRV_LV1>;
>+		samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> 	};
>
> 	uart0_data: uart0-data-pins {
>--
>2.17.1