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From: Seungwon Jeon <tgih.jun-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
To: "'Heiko Stübner'" <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: 'Mike Turquette'
	<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	'Rob Herring'
	<rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>,
	'Jaehoon Chung'
	<jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	'John Stultz'
	<john.stultz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	'Grant Likely'
	<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	'Russell King' <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
	'Thomas Gleixner' <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
	'Chris Ball' <cjb-2X9k7bc8m7Mdnm+yROfE0A@public.gmane.org>,
	devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Subject: RE: [PATCH 06/10] mmc: dw_mmc-pltfm: add Rockchip variant
Date: Wed, 05 Jun 2013 23:00:43 +0900	[thread overview]
Message-ID: <001601ce61f5$11b37b20$351a7160$%jun@samsung.com> (raw)
In-Reply-To: <201306030059.03783.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>

On 06/03/13 7:59 AM, Heiko Stübner wrote:
> Cortex-A9 SoCs from Rockchip use a slightly modified variant of dw_mmc
> controllers that seems to require the SDMMC_CMD_USE_HOLD_REG bit to
> always be set.
> 
> There also seem to be no other modifications (additional register etc)
> present, so to keep the footprint low, add this small variant to the
> pltfm driver.
> 
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  drivers/mmc/host/dw_mmc-pltfm.c |   48 +++++++++++++++++++++++++++-----------
>  1 files changed, 34 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
> index 0048da8..7d041b5 100644
> --- a/drivers/mmc/host/dw_mmc-pltfm.c
> +++ b/drivers/mmc/host/dw_mmc-pltfm.c
> @@ -24,6 +24,16 @@
> 
>  #include "dw_mmc.h"
> 
> +
> +static void dw_mci_rockchip_prepare_command(struct dw_mci *host, u32 *cmdr)
> +{
> +	*cmdr |= SDMMC_CMD_USE_HOLD_REG;
Currently, SDMMC_CMD_USE_HOLD_REG is defined in dw_mmc-exynos.c
It should be moved to dw_mmc.h

Thanks,
Seungwon Jeon
> +}
> +
> +static const struct dw_mci_drv_data rockchip_drv_data = {
> +	.prepare_command	= dw_mci_rockchip_prepare_command,
> +};
> +
>  int dw_mci_pltfm_register(struct platform_device *pdev,
>  				const struct dw_mci_drv_data *drv_data)
>  {
> @@ -63,20 +73,6 @@ int dw_mci_pltfm_register(struct platform_device *pdev,
>  }
>  EXPORT_SYMBOL_GPL(dw_mci_pltfm_register);
> 
> -static int dw_mci_pltfm_probe(struct platform_device *pdev)
> -{
> -	return dw_mci_pltfm_register(pdev, NULL);
> -}
> -
> -int dw_mci_pltfm_remove(struct platform_device *pdev)
> -{
> -	struct dw_mci *host = platform_get_drvdata(pdev);
> -
> -	dw_mci_remove(host);
> -	return 0;
> -}
> -EXPORT_SYMBOL_GPL(dw_mci_pltfm_remove);
> -
>  #ifdef CONFIG_PM_SLEEP
>  /*
>   * TODO: we should probably disable the clock to the card in the suspend path.
> @@ -114,10 +110,34 @@ EXPORT_SYMBOL_GPL(dw_mci_pltfm_pmops);
> 
>  static const struct of_device_id dw_mci_pltfm_match[] = {
>  	{ .compatible = "snps,dw-mshc", },
> +	{ .compatible = "rockchip,cortex-a9-dw-mshc",
> +		.data = &rockchip_drv_data },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);
> 
> +static int dw_mci_pltfm_probe(struct platform_device *pdev)
> +{
> +	const struct dw_mci_drv_data *drv_data = NULL;
> +	const struct of_device_id *match;
> +
> +	if (pdev->dev.of_node) {
> +		match = of_match_node(dw_mci_pltfm_match, pdev->dev.of_node);
> +		drv_data = match->data;
> +	}
> +
> +	return dw_mci_pltfm_register(pdev, drv_data);
> +}
> +
> +int dw_mci_pltfm_remove(struct platform_device *pdev)
> +{
> +	struct dw_mci *host = platform_get_drvdata(pdev);
> +
> +	dw_mci_remove(host);
> +	return 0;
> +}
> +EXPORT_SYMBOL_GPL(dw_mci_pltfm_remove);
> +
>  static struct platform_driver dw_mci_pltfm_driver = {
>  	.probe		= dw_mci_pltfm_probe,
>  	.remove		= dw_mci_pltfm_remove,
> --
> 1.7.2.3
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
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  parent reply	other threads:[~2013-06-05 14:00 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-02 22:55 arm: add basic support for Rockchip Cortex-A9 SoCs Heiko Stübner
     [not found] ` <201306030055.15413.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2013-06-02 22:56   ` [PATCH 01/10] clocksource: dw_apb_timer_of: use the clocksource as sched clock if necessary Heiko Stübner
2013-06-04  6:34     ` Linus Walleij
2013-06-04  8:29       ` Heiko Stübner
2013-06-04  9:43         ` Linus Walleij
2013-06-02 22:56   ` [PATCH 02/10] clocksource: dw_apb_timer_of: add clock-handling Heiko Stübner
2013-06-03  3:22     ` Baruch Siach
2013-06-03  7:51       ` Heiko Stübner
2013-06-02 22:57   ` [PATCH 03/10] clk: flag to use upper half of the register as change indicator Heiko Stübner
2013-06-02 22:57   ` [PATCH 04/10] clk: divider: add flag to limit possible dividers to even numbers Heiko Stübner
2013-06-02 22:58   ` [PATCH 05/10] mmc: dw_mmc-pltfm: remove static from dw_mci_pltfm_remove Heiko Stübner
2013-06-04  3:59     ` Jaehoon Chung
     [not found]     ` <201306030058.27184.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2013-06-05 14:00       ` Seungwon Jeon
2013-06-02 22:59   ` [PATCH 06/10] mmc: dw_mmc-pltfm: add Rockchip variant Heiko Stübner
2013-06-04  4:06     ` Jaehoon Chung
2013-06-04  8:43       ` Heiko Stübner
     [not found]     ` <201306030059.03783.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2013-06-05 14:00       ` Seungwon Jeon [this message]
2013-06-05 14:11         ` Heiko Stübner
2013-06-06 20:01     ` Andy Shevchenko
2013-06-02 22:59   ` [PATCH 07/10] pinctrl: add pinctrl driver for Rockchip SoCs Heiko Stübner
2013-06-04  7:08     ` Linus Walleij
2013-06-04 12:05       ` Heiko Stübner
2013-06-05  7:01         ` Linus Walleij
2013-06-05 17:18           ` Stephen Warren
     [not found]             ` <51AF72F9.3060307-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-05 18:50               ` Heiko Stübner
2013-06-02 23:00 ` [PATCH 08/10] clk: add basic Rockchip rk3066a clock support Heiko Stübner
2013-06-03  3:27   ` Olof Johansson
     [not found]     ` <20130603032711.GA3379-O5ziIzlqnXUVNXGz7ipsyg@public.gmane.org>
2013-06-03  7:52       ` Heiko Stübner
2013-06-02 23:01 ` [PATCH 09/10] arm: add debug uarts for rockchip rk29xx and rk3xxx series Heiko Stübner
2013-06-03  2:08   ` Arnd Bergmann
2013-06-03  7:54     ` Heiko Stübner
2013-06-02 23:02 ` [PATCH 10/10] arm: add basic support for Rockchip RK3066a boards Heiko Stübner
2013-06-03  2:15   ` Arnd Bergmann
2013-06-03  8:23     ` Heiko Stübner
     [not found]       ` <201306031023.49364.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2013-06-03  9:22         ` Arnd Bergmann
2013-06-03  9:46           ` Heiko Stübner
2013-06-03 10:26             ` Arnd Bergmann
2013-06-03 12:15               ` [RFC] dw_apb_timer_of: use clocksource_of_init Heiko Stübner
2013-06-03 12:27                 ` Rob Herring
2013-06-03 13:20                 ` Arnd Bergmann
2013-06-05  7:11   ` [PATCH 10/10] arm: add basic support for Rockchip RK3066a boards Thomas Petazzoni
2013-06-05 21:45     ` Maxime Ripard
2013-06-03  2:07 ` arm: add basic support for Rockchip Cortex-A9 SoCs Arnd Bergmann

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