From: "Jingoo Han" <jingoohan1@gmail.com>
To: 'Gustavo Pimentel' <gustavo.pimentel@synopsys.com>,
bhelgaas@google.com, lorenzo.pieralisi@arm.com,
Joao.Pinto@synopsys.com, kishon@ti.com, robh+dt@kernel.org,
mark.rutland@arm.com
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v2 8/9] PCI: dwc: Small computation improvement
Date: Tue, 10 Apr 2018 20:01:21 -0400 [thread overview]
Message-ID: <003001d3d128$39f3eaa0$addbbfe0$@gmail.com> (raw)
In-Reply-To: <5181f7ffbb9d2889974c49d84e72042251adf8b6.1523266508.git.gustavo.pimentel@synopsys.com>
On Monday, April 9, 2018 5:41 AM, Gustavo Pimentel wrote:
>
> Replaces a simple division by 2 to a right shift rotation of 1 bit.
It looks good. However, would you add a simple reason to the commit
message?
Best regards,
Jingoo Han
>
> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> ---
> Change v1->v2:
> - Nothing changed, just to follow the patch set version.
>
> drivers/pci/dwc/pcie-designware-host.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/dwc/pcie-designware-host.c
> b/drivers/pci/dwc/pcie-designware-host.c
> index 03e9b82..8e6fed4 100644
> --- a/drivers/pci/dwc/pcie-designware-host.c
> +++ b/drivers/pci/dwc/pcie-designware-host.c
> @@ -332,8 +332,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
>
> cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> "config");
> if (cfg_res) {
> - pp->cfg0_size = resource_size(cfg_res) / 2;
> - pp->cfg1_size = resource_size(cfg_res) / 2;
> + pp->cfg0_size = resource_size(cfg_res) >> 1;
> + pp->cfg1_size = resource_size(cfg_res) >> 1;
> pp->cfg0_base = cfg_res->start;
> pp->cfg1_base = cfg_res->start + pp->cfg0_size;
> } else if (!pp->va_cfg0_base) {
> @@ -377,8 +377,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
> break;
> case 0:
> pp->cfg = win->res;
> - pp->cfg0_size = resource_size(pp->cfg) / 2;
> - pp->cfg1_size = resource_size(pp->cfg) / 2;
> + pp->cfg0_size = resource_size(pp->cfg) >> 1;
> + pp->cfg1_size = resource_size(pp->cfg) >> 1;
> pp->cfg0_base = pp->cfg->start;
> pp->cfg1_base = pp->cfg->start + pp->cfg0_size;
> break;
> --
> 2.7.4
>
next prev parent reply other threads:[~2018-04-11 0:01 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-09 9:41 [PATCH v2 0/9] Designware EP support and code clean up Gustavo Pimentel
2018-04-09 9:41 ` [PATCH v2 1/9] bindings: PCI: designware: Example update Gustavo Pimentel
2018-04-09 9:41 ` [PATCH v2 2/9] PCI: dwc: Add support for endpoint mode Gustavo Pimentel
2018-04-10 5:12 ` Kishon Vijay Abraham I
2018-04-10 10:36 ` Gustavo Pimentel
2018-04-10 11:09 ` Kishon Vijay Abraham I
2018-04-09 9:41 ` [PATCH v2 3/9] bindings: PCI: designware: Add support for the EP in Designware driver Gustavo Pimentel
2018-04-09 9:41 ` [PATCH v2 4/9] PCI: Adds device ID for Synopsys Sample Endpoint Gustavo Pimentel
2018-04-09 9:41 ` [PATCH v2 5/9] misc: pci_endpoint_test: Add designware EP entry Gustavo Pimentel
2018-04-09 9:41 ` [PATCH v2 6/9] PCI: dwc: Define maximum number of vectors Gustavo Pimentel
2018-04-09 16:03 ` Lorenzo Pieralisi
2018-04-10 7:59 ` Gustavo Pimentel
2018-04-10 9:56 ` Lorenzo Pieralisi
2018-04-09 9:41 ` [PATCH v2 7/9] PCI: dwc: Replace lower into upper case characters Gustavo Pimentel
2018-04-09 10:25 ` Joe Perches
2018-04-09 13:10 ` Gustavo Pimentel
2018-04-09 14:25 ` Joe Perches
2018-04-11 0:05 ` Jingoo Han
2018-04-09 9:41 ` [PATCH v2 8/9] PCI: dwc: Small computation improvement Gustavo Pimentel
2018-04-11 0:01 ` Jingoo Han [this message]
2018-04-11 7:40 ` Gustavo Pimentel
2018-04-11 19:37 ` Jingoo Han
2018-04-16 8:41 ` Gustavo Pimentel
2018-04-15 13:09 ` Fabio Estevam
2018-04-16 8:35 ` Gustavo Pimentel
2018-04-09 9:41 ` [PATCH v2 9/9] PCI: dwc: Replace magic number by defines Gustavo Pimentel
2018-04-11 0:07 ` Jingoo Han
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