[PATCH 0/2] ARM: imx: imx6sx: Add support for TX clock controls

[PATCH 0/2] ARM: imx: imx6sx: Add support for TX clock controls

[Vesa Jääskeläinen]

Add device tree configuration support whether Ethernet controller's
ENETx_TX_CLK output driver is enabled.

Also add device tree configuration support whether Ethernet controller's
ENETx_TX_CLK pin is used as reference clock for Ethernet. If not defined
then ref_enetpllx is used as reference clock.

If the new properties are not present then the existing behavior is
preserved.

Vesa Jääskeläinen (2):
  dt-bindings: net: fsl,fec: Add TX clock controls
  ARM: imx: imx6sx: Add support for TX clock controls

 .../devicetree/bindings/net/fsl,fec.yaml      | 15 +++++++++++
 arch/arm/mach-imx/mach-imx6sx.c               | 27 +++++++++++++++++--
 2 files changed, 40 insertions(+), 2 deletions(-)

-- 
2.34.1

[PATCH 1/2] dt-bindings: net: fsl,fec: Add TX clock controls

[Vesa Jääskeläinen]

With fsl,fec-tx-clock-output one can control if TX clock is routed outside
of the chip.

With fsl,fec-tx-clk-as-ref-clock one can select if external TX clock is as
reference clock.

Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
---
 .../devicetree/bindings/net/fsl,fec.yaml          | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
index b494e009326e..c09105878bc6 100644
--- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
@@ -166,6 +166,21 @@ properties:
     description:
       If present, indicates that the hardware supports waking up via magic packet.
 
+  fsl,fec-tx-clock-output:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      If present, ENETx_TX_CLK output driver is enabled.
+      If not present, ENETx_TX_CLK output driver is disabled.
+
+  fsl,fec-tx-clk-as-ref-clock:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      If present, gets ENETx TX reference clk from the ENETx_TX_CLK pin. In
+      this use case, an external OSC provides the clock for both the external
+      PHY and the internal controller.
+      If not present, ENETx TX reference clock is driven by ref_enetpllx. This
+      clock is also output to pins via the IOMUX.ENET_REF_CLKx function.
+
   fsl,err006687-workaround-present:
     $ref: /schemas/types.yaml#/definitions/flag
     description:
-- 
2.34.1

Re: [PATCH 1/2] dt-bindings: net: fsl,fec: Add TX clock controls

[Krzysztof Kozlowski]

On 11/07/2023 17:08, Vesa Jääskeläinen wrote:
> With fsl,fec-tx-clock-output one can control if TX clock is routed outside
> of the chip.
> 
> With fsl,fec-tx-clk-as-ref-clock one can select if external TX clock is as
> reference clock.
> 
> Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
> ---
>  .../devicetree/bindings/net/fsl,fec.yaml          | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
> index b494e009326e..c09105878bc6 100644
> --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
> +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
> @@ -166,6 +166,21 @@ properties:
>      description:
>        If present, indicates that the hardware supports waking up via magic packet.
>  
> +  fsl,fec-tx-clock-output:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description:
> +      If present, ENETx_TX_CLK output driver is enabled.
> +      If not present, ENETx_TX_CLK output driver is disabled.

Here...

> +
> +  fsl,fec-tx-clk-as-ref-clock:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description:
> +      If present, gets ENETx TX reference clk from the ENETx_TX_CLK pin. In
> +      this use case, an external OSC provides the clock for both the external
> +      PHY and the internal controller.
> +      If not present, ENETx TX reference clock is driven by ref_enetpllx. This
> +      clock is also output to pins via the IOMUX.ENET_REF_CLKx function.

and here:
In general, Common Clock Framework and its bindings should be used for
handling clock providers and consumers. Why it cannot be used for these
two cases?


Best regards,
Krzysztof

Re: [PATCH 1/2] dt-bindings: net: fsl,fec: Add TX clock controls

[Vesa Jääskeläinen]

Hi Krzysztof,

On 12.7.2023 23.36, Krzysztof Kozlowski wrote:
> On 11/07/2023 17:08, Vesa Jääskeläinen wrote:
>> With fsl,fec-tx-clock-output one can control if TX clock is routed outside
>> of the chip.
>>
>> With fsl,fec-tx-clk-as-ref-clock one can select if external TX clock is as
>> reference clock.
>>
>> Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
>> ---
>>   .../devicetree/bindings/net/fsl,fec.yaml          | 15 +++++++++++++++
>>   1 file changed, 15 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
>> index b494e009326e..c09105878bc6 100644
>> --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
>> +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
>> @@ -166,6 +166,21 @@ properties:
>>       description:
>>         If present, indicates that the hardware supports waking up via magic packet.
>>   
>> +  fsl,fec-tx-clock-output:
>> +    $ref: /schemas/types.yaml#/definitions/flag
>> +    description:
>> +      If present, ENETx_TX_CLK output driver is enabled.
>> +      If not present, ENETx_TX_CLK output driver is disabled.
> Here...
>
>> +
>> +  fsl,fec-tx-clk-as-ref-clock:
>> +    $ref: /schemas/types.yaml#/definitions/flag
>> +    description:
>> +      If present, gets ENETx TX reference clk from the ENETx_TX_CLK pin. In
>> +      this use case, an external OSC provides the clock for both the external
>> +      PHY and the internal controller.
>> +      If not present, ENETx TX reference clock is driven by ref_enetpllx. This
>> +      clock is also output to pins via the IOMUX.ENET_REF_CLKx function.
> and here:
> In general, Common Clock Framework and its bindings should be used for
> handling clock providers and consumers. Why it cannot be used for these
> two cases?

Did you have something specific in mind on how it could be modeled?

I tried to look at:
Documentation/devicetree/bindings/clock/

But didn't spot anything for this.

In net bindings:
Documentation/devicetree/bindings/net

We have some similarities:

- adi,phy-output-clock
- adi,phy-output-reference-clock
- nxp,rmii-refclk-in
- clock_in_out
- ti,clk-output-sel
- ti,sgmii-ref-clock-output-enable

In here clock output generator would be the i.MX not the PHY as what was 
in ADI's.

xMII variants are close but very specific for specific MII interface type.

clock_in_out seems a bit out of place.

Thanks,
Vesa Jääskeläinen

Re: [PATCH 1/2] dt-bindings: net: fsl,fec: Add TX clock controls

[Ahmad Fatoum]

Hello Vesa,

On 13.07.23 10:29, Vesa Jääskeläinen wrote:
> Hi Krzysztof,
> 
> On 12.7.2023 23.36, Krzysztof Kozlowski wrote:
>> On 11/07/2023 17:08, Vesa Jääskeläinen wrote:
>>> With fsl,fec-tx-clock-output one can control if TX clock is routed outside
>>> of the chip.
>>>
>>> With fsl,fec-tx-clk-as-ref-clock one can select if external TX clock is as
>>> reference clock.
>>>
>>> Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
>>> ---
>>>   .../devicetree/bindings/net/fsl,fec.yaml          | 15 +++++++++++++++
>>>   1 file changed, 15 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
>>> index b494e009326e..c09105878bc6 100644
>>> --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
>>> +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
>>> @@ -166,6 +166,21 @@ properties:
>>>       description:
>>>         If present, indicates that the hardware supports waking up via magic packet.
>>>   +  fsl,fec-tx-clock-output:
>>> +    $ref: /schemas/types.yaml#/definitions/flag
>>> +    description:
>>> +      If present, ENETx_TX_CLK output driver is enabled.
>>> +      If not present, ENETx_TX_CLK output driver is disabled.
>> Here...
>>
>>> +
>>> +  fsl,fec-tx-clk-as-ref-clock:
>>> +    $ref: /schemas/types.yaml#/definitions/flag
>>> +    description:
>>> +      If present, gets ENETx TX reference clk from the ENETx_TX_CLK pin. In
>>> +      this use case, an external OSC provides the clock for both the external
>>> +      PHY and the internal controller.
>>> +      If not present, ENETx TX reference clock is driven by ref_enetpllx. This
>>> +      clock is also output to pins via the IOMUX.ENET_REF_CLKx function.
>> and here:
>> In general, Common Clock Framework and its bindings should be used for
>> handling clock providers and consumers. Why it cannot be used for these
>> two cases?
> 
> Did you have something specific in mind on how it could be modeled?
> 
> I tried to look at:
> Documentation/devicetree/bindings/clock/
> 
> But didn't spot anything for this.

This has been implemented for i.MX6Q/DL using CCF. Please follow suit
for SoloX. See series at:
https://lore.kernel.org/all/20230131084642.709385-1-o.rempel@pengutronix.de/

Thanks,
Ahmad



> 
> In net bindings:
> Documentation/devicetree/bindings/net
> 
> We have some similarities:
> 
> - adi,phy-output-clock
> - adi,phy-output-reference-clock
> - nxp,rmii-refclk-in
> - clock_in_out
> - ti,clk-output-sel
> - ti,sgmii-ref-clock-output-enable
> 
> In here clock output generator would be the i.MX not the PHY as what was in ADI's.
> 
> xMII variants are close but very specific for specific MII interface type.
> 
> clock_in_out seems a bit out of place.
> 
> Thanks,
> Vesa Jääskeläinen
> 
> 
> 

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re: [PATCH 1/2] dt-bindings: net: fsl,fec: Add TX clock controls

[Vesa Jääskeläinen]

Hi Ahmad,

On 13.7.2023 11.47, Ahmad Fatoum wrote:
> Hello Vesa,
>
> On 13.07.23 10:29, Vesa Jääskeläinen wrote:
>> Hi Krzysztof,
>>
>> On 12.7.2023 23.36, Krzysztof Kozlowski wrote:
>>> On 11/07/2023 17:08, Vesa Jääskeläinen wrote:
>>>> With fsl,fec-tx-clock-output one can control if TX clock is routed outside
>>>> of the chip.
>>>>
>>>> With fsl,fec-tx-clk-as-ref-clock one can select if external TX clock is as
>>>> reference clock.
>>>>
>>>> Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
>>>> ---
>>>>    .../devicetree/bindings/net/fsl,fec.yaml          | 15 +++++++++++++++
>>>>    1 file changed, 15 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
>>>> index b494e009326e..c09105878bc6 100644
>>>> --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
>>>> +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
>>>> @@ -166,6 +166,21 @@ properties:
>>>>        description:
>>>>          If present, indicates that the hardware supports waking up via magic packet.
>>>>    +  fsl,fec-tx-clock-output:
>>>> +    $ref: /schemas/types.yaml#/definitions/flag
>>>> +    description:
>>>> +      If present, ENETx_TX_CLK output driver is enabled.
>>>> +      If not present, ENETx_TX_CLK output driver is disabled.
>>> Here...
>>>
>>>> +
>>>> +  fsl,fec-tx-clk-as-ref-clock:
>>>> +    $ref: /schemas/types.yaml#/definitions/flag
>>>> +    description:
>>>> +      If present, gets ENETx TX reference clk from the ENETx_TX_CLK pin. In
>>>> +      this use case, an external OSC provides the clock for both the external
>>>> +      PHY and the internal controller.
>>>> +      If not present, ENETx TX reference clock is driven by ref_enetpllx. This
>>>> +      clock is also output to pins via the IOMUX.ENET_REF_CLKx function.
>>> and here:
>>> In general, Common Clock Framework and its bindings should be used for
>>> handling clock providers and consumers. Why it cannot be used for these
>>> two cases?
>> Did you have something specific in mind on how it could be modeled?
>>
>> I tried to look at:
>> Documentation/devicetree/bindings/clock/
>>
>> But didn't spot anything for this.
> This has been implemented for i.MX6Q/DL using CCF. Please follow suit
> for SoloX. See series at:
> https://lore.kernel.org/all/20230131084642.709385-1-o.rempel@pengutronix.de/
>
> Thanks,
> Ahmad

Thanks for the reference. This looks promising.

Let me try it out.

Thanks,
Vesa Jääskeläinen

[PATCH 2/2] ARM: imx: imx6sx: Add support for TX clock controls

[Vesa Jääskeläinen]

Add device tree configuration support whether Ethernet controller's
ENETx_TX_CLK output driver is enabled.

Also add device tree configuration support whether Ethernet controller's
ENETx_TX_CLK pin is used as reference clock for Ethernet. If not defined
then ref_enetpllx is used as reference clock.

If the new properties are not present then the existing behavior is
preserved.

Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
---
 arch/arm/mach-imx/mach-imx6sx.c | 27 +++++++++++++++++++++++++--
 1 file changed, 25 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c
index e65ed5218f53..b535579ccaa4 100644
--- a/arch/arm/mach-imx/mach-imx6sx.c
+++ b/arch/arm/mach-imx/mach-imx6sx.c
@@ -17,14 +17,37 @@
 
 static void __init imx6sx_enet_clk_sel(void)
 {
+	struct device_node *enet_np, *from = NULL;
+	unsigned int clock_mux = 0;
+	unsigned int clock_dir = 0;
 	struct regmap *gpr;
+	int i;
+
+	/* Loop thru both FECs found from chip */
+	for (i = 0; i < 2; i++) {
+		enet_np = of_find_compatible_node(from, NULL, "fsl,imx6sx-fec");
+		if (!enet_np)
+			break;
+
+		if (from)
+			of_node_put(from);
+		from = enet_np;
+
+		if (of_property_read_bool(enet_np, "fsl,fec-tx-clock-output"))
+			clock_dir |= 1 << (17 /* ENETx_TX_CLK_DIR */ + i);
+
+		if (of_property_read_bool(enet_np, "fsl,fec-tx-clk-as-ref-clock"))
+			clock_mux |= 1 << (13 /* ENETx_CLK_SEL */ + i);
+	}
+	if (from)
+		of_node_put(from);
 
 	gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
 	if (!IS_ERR(gpr)) {
 		regmap_update_bits(gpr, IOMUXC_GPR1,
-				   IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0);
+				   IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, clock_mux);
 		regmap_update_bits(gpr, IOMUXC_GPR1,
-				   IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 0);
+				   IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, clock_dir);
 	} else {
 		pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
 	}
-- 
2.34.1